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authorStefano Babic <sbabic@denx.de>2011-11-25 09:08:36 +0100
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-06 23:59:40 +0100
commitfda241d59d12381493f31e38f94a2057a955ec94 (patch)
tree3285d5abe6849adcac1e1caf716801834061ed01 /board
parent40f6fffee5917930597bfcc07de1cd879d4994f6 (diff)
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MX35: flea3: changes due to hardware revision B
Revision B of the board uses CSD0 for the DRAM, as usual for MX3 boards. The patch fixes also some values in the U-Boot environment. Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'board')
-rw-r--r--board/CarMediaLab/flea3/flea3.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/board/CarMediaLab/flea3/flea3.c b/board/CarMediaLab/flea3/flea3.c
index 64f4b57..34ede87 100644
--- a/board/CarMediaLab/flea3/flea3.c
+++ b/board/CarMediaLab/flea3/flea3.c
@@ -160,7 +160,7 @@ static void board_setup_sdram(void)
writel(0x2000, &esdc->esdctl0);
writel(0x2000, &esdc->esdctl1);
- board_setup_sdram_bank(CSD1_BASE_ADDR);
+ board_setup_sdram_bank(CSD0_BASE_ADDR);
}
static void setup_iomux_uart3(void)
@@ -229,7 +229,7 @@ int board_early_init_f(void)
(struct ccm_regs *)IMX_CCM_BASE;
/* setup GPIO3_1 to set HighVCore signal */
- mxc_request_iomux(MX35_PIN_ATA_DATA1, MUX_CONFIG_ALT5);
+ mxc_request_iomux(MX35_PIN_ATA_DA1, MUX_CONFIG_ALT5);
gpio_direction_output(65, 1);
/* initialize PLL and clock configuration */