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| author | Ying Zhang <b40530@freescale.com> | 2013-09-06 17:30:57 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-10-16 16:13:12 -0700 |
| commit | d34e56241de299e12639ea39ef65c537cf0ded18 (patch) | |
| tree | 4f4646d72c876522f4abad40364c39489b2df19d /board | |
| parent | 3e6e69834a31055054b7e5bf5b1ff91c619120e8 (diff) | |
| download | u-boot-imx-d34e56241de299e12639ea39ef65c537cf0ded18.zip u-boot-imx-d34e56241de299e12639ea39ef65c537cf0ded18.tar.gz u-boot-imx-d34e56241de299e12639ea39ef65c537cf0ded18.tar.bz2 | |
powerpc : p1_p2_rdb_pc : Enable p1_p2_rdb_pc to start from eSPI with SPL
Enable p1_p2_rdb_pc to start from eSPI with SPL.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/p1_p2_rdb_pc/spl.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c index 5b8e0ff..07fab46 100644 --- a/board/freescale/p1_p2_rdb_pc/spl.c +++ b/board/freescale/p1_p2_rdb_pc/spl.c @@ -11,6 +11,7 @@ #include <nand.h> #include <i2c.h> #include <fsl_esdhc.h> +#include <spi_flash.h> DECLARE_GLOBAL_DATA_PTR; @@ -39,6 +40,10 @@ void board_init_f(ulong bootflag) /* Read back the register to synchronize the write. */ in_be32(&gur->pmuxcr); +#ifdef CONFIG_SPL_SPI_BOOT + clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); +#endif + /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; @@ -49,6 +54,8 @@ void board_init_f(ulong bootflag) bus_clk / 16 / CONFIG_BAUDRATE); #ifdef CONFIG_SPL_MMC_BOOT puts("\nSD boot...\n"); +#elif defined(CONFIG_SPL_SPI_BOOT) + puts("\nSPI Flash boot...\n"); #endif /* copy code to RAM and jump to it - this should not return */ @@ -94,5 +101,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); +#elif defined(CONFIG_SPL_SPI_BOOT) + spi_boot(); #endif } |