diff options
author | Tom Rini <trini@ti.com> | 2013-07-24 09:22:28 -0400 |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2013-07-24 09:50:24 -0400 |
commit | c2120fbfbc4d1f6953228f86be8bdbf38bacfdab (patch) | |
tree | 14cd8ec9a0a61f7113149be38d79808cd5e955f8 /board | |
parent | e85427fd66a21b39145a47e67871a8863c0e5591 (diff) | |
parent | ecbd7e1ec7280d90d151a99691f74b892588cadd (diff) | |
download | u-boot-imx-c2120fbfbc4d1f6953228f86be8bdbf38bacfdab.zip u-boot-imx-c2120fbfbc4d1f6953228f86be8bdbf38bacfdab.tar.gz u-boot-imx-c2120fbfbc4d1f6953228f86be8bdbf38bacfdab.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-i2c
The sandburst-specific i2c drivers have been deleted, conflict was just
over the SPDX conversion.
Conflicts:
board/sandburst/common/ppc440gx_i2c.c
board/sandburst/common/ppc440gx_i2c.h
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'board')
44 files changed, 117 insertions, 690 deletions
diff --git a/board/BuS/eb_cpux9k2/cpux9k2.c b/board/BuS/eb_cpux9k2/cpux9k2.c index 9fd8e7a..5e4778e 100644 --- a/board/BuS/eb_cpux9k2/cpux9k2.c +++ b/board/BuS/eb_cpux9k2/cpux9k2.c @@ -272,7 +272,7 @@ int drv_video_init(void) } #endif -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT void i2c_init_board(void) { diff --git a/board/BuS/vl_ma2sc/vl_ma2sc.c b/board/BuS/vl_ma2sc/vl_ma2sc.c index 2dba146..e2ae6fd 100644 --- a/board/BuS/vl_ma2sc/vl_ma2sc.c +++ b/board/BuS/vl_ma2sc/vl_ma2sc.c @@ -307,7 +307,7 @@ int board_eth_init(bd_t *bis) return rc; } -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT void i2c_init_board(void) { u32 pin; diff --git a/board/atc/atc.c b/board/atc/atc.c index ee395d9..0038561 100644 --- a/board/atc/atc.c +++ b/board/atc/atc.c @@ -154,7 +154,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */ /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */ /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else diff --git a/board/bluewater/snapper9260/snapper9260.c b/board/bluewater/snapper9260/snapper9260.c index be03553..8a6919d 100644 --- a/board/bluewater/snapper9260/snapper9260.c +++ b/board/bluewater/snapper9260/snapper9260.c @@ -132,7 +132,7 @@ int board_init(void) /* Initialise peripherals */ at91_seriald_hw_init(); - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); nand_hw_init(); macb_hw_init(); diff --git a/board/cm5200/cm5200.c b/board/cm5200/cm5200.c index 58f5a36..e391dfc 100644 --- a/board/cm5200/cm5200.c +++ b/board/cm5200/cm5200.c @@ -309,7 +309,7 @@ int board_early_init_r(void) #ifdef CONFIG_MISC_INIT_R int misc_init_r(void) { -#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) uchar buf[6]; char str[18]; char hostname[MODULE_NAME_MAXLEN]; @@ -332,7 +332,7 @@ int misc_init_r(void) " device at address %02X:%04X\n", CONFIG_SYS_I2C_EEPROM, CONFIG_MAC_OFFSET); } -#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) */ +#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) */ if (!getenv("ethaddr")) printf(LOG_PREFIX "MAC address not set, networking is not " "operational\n"); diff --git a/board/cpu86/cpu86.c b/board/cpu86/cpu86.c index a1f25ba..9292910 100644 --- a/board/cpu86/cpu86.c +++ b/board/cpu86/cpu86.c @@ -145,7 +145,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */ /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */ /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else diff --git a/board/cpu87/cpu87.c b/board/cpu87/cpu87.c index b629307..01f90d2 100644 --- a/board/cpu87/cpu87.c +++ b/board/cpu87/cpu87.c @@ -147,7 +147,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */ /* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */ /* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c index bfc47e0..43a1aa0 100644 --- a/board/csb272/csb272.c +++ b/board/csb272/csb272.c @@ -35,7 +35,7 @@ uchar pll_fs6377_regs[16] = { */ int pll_init(void) { - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); return i2c_write(CONFIG_SYS_I2C_PLL_ADDR, 0, 1, (uchar *) pll_fs6377_regs, sizeof(pll_fs6377_regs)); diff --git a/board/emk/top9000/top9000.c b/board/emk/top9000/top9000.c index 083e5e8..6e2ffdd 100644 --- a/board/emk/top9000/top9000.c +++ b/board/emk/top9000/top9000.c @@ -229,7 +229,7 @@ int board_eth_init(bd_t *bis) * However i2c_get_bus_num() cannot be called before * relocation. */ -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT void iic_init(void) { /* ports are now initialized in board_early_init_f() */ @@ -237,7 +237,7 @@ void iic_init(void) int iic_read(void) { - switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) { + switch (I2C_ADAP_HWNR) { case 0: return at91_get_pio_value(I2C0_PORT, SDA0_PIN); case 1: @@ -248,7 +248,7 @@ int iic_read(void) void iic_sda(int bit) { - switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) { + switch (I2C_ADAP_HWNR) { case 0: at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit); break; @@ -260,7 +260,7 @@ void iic_sda(int bit) void iic_scl(int bit) { - switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) { + switch (I2C_ADAP_HWNR) { case 0: at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit); break; diff --git a/board/esd/du440/du440.c b/board/esd/du440/du440.c index dc35be4..b168b24 100644 --- a/board/esd/du440/du440.c +++ b/board/esd/du440/du440.c @@ -372,7 +372,6 @@ int last_stage_init(void) return 0; } -#if defined(CONFIG_I2C_MULTI_BUS) /* * read field strength from I2C ADC */ @@ -487,7 +486,6 @@ U_BOOT_CMD( "Initialize USB hub", "" ); -#endif /* CONFIG_I2C_MULTI_BUS */ #define CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS 3 int boot_eeprom_write (unsigned dev_addr, diff --git a/board/esd/vme8349/vme8349.c b/board/esd/vme8349/vme8349.c index e9a2578..01365dc 100644 --- a/board/esd/vme8349/vme8349.c +++ b/board/esd/vme8349/vme8349.c @@ -169,11 +169,11 @@ static spd_eeprom_t default_spd_eeprom = { int vme8349_read_spd(uchar chip, uint addr, int alen, uchar *buffer, int len) { - int old_bus = I2C_GET_BUS(); + int old_bus = i2c_get_bus_num(); unsigned int l, sum; int valid = 0; - I2C_SET_BUS(0); + i2c_set_bus_num(0); if (i2c_read(chip, addr, alen, buffer, len) == 0) if (memcmp(&buffer[64], &default_spd_eeprom.mid[0], 8) == 0) { @@ -198,7 +198,7 @@ int vme8349_read_spd(uchar chip, uint addr, int alen, uchar *buffer, int len) buffer[63] = sum; } - I2C_SET_BUS(old_bus); + i2c_set_bus_num(old_bus); return 0; } diff --git a/board/eukrea/cpuat91/cpuat91.c b/board/eukrea/cpuat91/cpuat91.c index f649dd0..ec0ce0b 100644 --- a/board/eukrea/cpuat91/cpuat91.c +++ b/board/eukrea/cpuat91/cpuat91.c @@ -57,7 +57,7 @@ int board_eth_init(bd_t *bis) } #endif -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT void i2c_init_board(void) { u32 pin; diff --git a/board/freescale/m52277evb/README b/board/freescale/m52277evb/README index b6e955b..3178d49 100644 --- a/board/freescale/m52277evb/README +++ b/board/freescale/m52277evb/README @@ -82,9 +82,9 @@ CONFIG_CMD_DATE -- enable to use date feature in u-boot CONFIG_MCFTMR -- define to use DMA timer CONFIG_MCFPIT -- define to use PIT timer -CONFIG_FSL_I2C -- define to use FSL common I2C driver +CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support -CONFIG_SOFT_I2C -- define for I2C bit-banged +CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed CONFIG_SYS_I2C_SLAVE -- define for I2C slave address CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset diff --git a/board/freescale/m53017evb/README b/board/freescale/m53017evb/README index 64a3d42..84fc1ec 100644 --- a/board/freescale/m53017evb/README +++ b/board/freescale/m53017evb/README @@ -90,9 +90,9 @@ MCFFEC_TOUT_LOOP -- set FEC timeout loop CONFIG_MCFTMR -- define to use DMA timer CONFIG_MCFPIT -- define to use PIT timer -CONFIG_FSL_I2C -- define to use FSL common I2C driver +CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support -CONFIG_SOFT_I2C -- define for I2C bit-banged +CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed CONFIG_SYS_I2C_SLAVE -- define for I2C slave address CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset diff --git a/board/freescale/m5373evb/README b/board/freescale/m5373evb/README index 419d4d6..52eac7b 100644 --- a/board/freescale/m5373evb/README +++ b/board/freescale/m5373evb/README @@ -89,9 +89,9 @@ MCFFEC_TOUT_LOOP -- set FEC timeout loop CONFIG_MCFTMR -- define to use DMA timer CONFIG_MCFPIT -- define to use PIT timer -CONFIG_FSL_I2C -- define to use FSL common I2C driver +CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support -CONFIG_SOFT_I2C -- define for I2C bit-banged +CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed CONFIG_SYS_I2C_SLAVE -- define for I2C slave address CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset diff --git a/board/freescale/m54455evb/README b/board/freescale/m54455evb/README index 2bc6ce4..c70c4c5 100644 --- a/board/freescale/m54455evb/README +++ b/board/freescale/m54455evb/README @@ -112,9 +112,9 @@ _IO_BASE -- define for IO base address CONFIG_MCFTMR -- define to use DMA timer CONFIG_MCFPIT -- define to use PIT timer -CONFIG_FSL_I2C -- define to use FSL common I2C driver +CONFIG_SYS_FSL_I2C -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support -CONFIG_SOFT_I2C -- define for I2C bit-banged +CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed CONFIG_SYS_I2C_SLAVE -- define for I2C slave address CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset diff --git a/board/freescale/m547xevb/README b/board/freescale/m547xevb/README index d3aec20..ce497c0 100644 --- a/board/freescale/m547xevb/README +++ b/board/freescale/m547xevb/README @@ -97,9 +97,9 @@ CONFIG_DOS_PARTITION -- enable DOS read/write CONFIG_SLTTMR -- define to use SLT timer -CONFIG_FSL_I2C -- define to use FSL common I2C driver +CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support -CONFIG_SOFT_I2C -- define for I2C bit-banged +CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged CONFIG_SYS_I2C_SPEED -- define for I2C speed CONFIG_SYS_I2C_SLAVE -- define for I2C slave address CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c index 510ef04..803d722 100644 --- a/board/freescale/mpc8349itx/mpc8349itx.c +++ b/board/freescale/mpc8349itx/mpc8349itx.c @@ -247,8 +247,7 @@ int misc_init_r(void) { int rc = 0; -#ifdef CONFIG_HARD_I2C - +#if defined(CONFIG_SYS_I2C) unsigned int orig_bus = i2c_get_bus_num(); u8 i2c_data; diff --git a/board/freescale/mpc8349itx/pci.c b/board/freescale/mpc8349itx/pci.c index 6425977..afc9df0 100644 --- a/board/freescale/mpc8349itx/pci.c +++ b/board/freescale/mpc8349itx/pci.c @@ -71,7 +71,7 @@ void pci_init_board(void) #endif u8 reg8; -#ifdef CONFIG_HARD_I2C +#if defined(CONFIG_SYS_I2C) i2c_set_bus_num(1); /* Read the PCI_M66EN jumper setting */ if ((i2c_read(CONFIG_SYS_I2C_8574_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0) || diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index d8b1e41..50553da 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -232,7 +232,7 @@ int checkboard(void) in_8(&cpld_data->pcba_rev) & 0x0F); /* Initialize i2c early for rom_loc and flash bank information */ - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM); if (i2c_read(CONFIG_SYS_I2C_PCA9557_ADDR, 0, 1, &in, 1) < 0 || i2c_read(CONFIG_SYS_I2C_PCA9557_ADDR, 1, 1, &out, 1) < 0 || diff --git a/board/freescale/vf610twr/vf610twr.c b/board/freescale/vf610twr/vf610twr.c index 7c6cb5b..699ea7f 100644 --- a/board/freescale/vf610twr/vf610twr.c +++ b/board/freescale/vf610twr/vf610twr.c @@ -14,6 +14,7 @@ #include <fsl_esdhc.h> #include <miiphy.h> #include <netdev.h> +#include <i2c.h> DECLARE_GLOBAL_DATA_PTR; @@ -267,6 +268,16 @@ static void setup_iomux_enet(void) imx_iomux_v3_setup_multiple_pads(enet0_pads, ARRAY_SIZE(enet0_pads)); } +static void setup_iomux_i2c(void) +{ + static const iomux_v3_cfg_t i2c0_pads[] = { + VF610_PAD_PTB14__I2C0_SCL, + VF610_PAD_PTB15__I2C0_SDA, + }; + + imx_iomux_v3_setup_multiple_pads(i2c0_pads, ARRAY_SIZE(i2c0_pads)); +} + #ifdef CONFIG_FSL_ESDHC struct fsl_esdhc_cfg esdhc_cfg[1] = { {ESDHC1_BASE_ADDR}, @@ -315,7 +326,7 @@ static void clock_init(void) CCM_CCGR3_ANADIG_CTRL_MASK); clrsetbits_le32(&ccm->ccgr4, CCM_REG_CTRL_MASK, CCM_CCGR4_WKUP_CTRL_MASK | CCM_CCGR4_CCM_CTRL_MASK | - CCM_CCGR4_GPC_CTRL_MASK); + CCM_CCGR4_GPC_CTRL_MASK | CCM_CCGR4_I2C0_CTRL_MASK); clrsetbits_le32(&ccm->ccgr6, CCM_REG_CTRL_MASK, CCM_CCGR6_OCOTP_CTRL_MASK | CCM_CCGR6_DDRMC_CTRL_MASK); clrsetbits_le32(&ccm->ccgr7, CCM_REG_CTRL_MASK, @@ -374,6 +385,7 @@ int board_early_init_f(void) setup_iomux_uart(); setup_iomux_enet(); + setup_iomux_i2c(); return 0; } diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c index a51af03..de6b8fb 100644 --- a/board/ids8247/ids8247.c +++ b/board/ids8247/ids8247.c @@ -35,7 +35,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */ /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXER */ /* PA25 */ { 0, 0, 0, 0, 1, 0 }, /* 8247_P0 */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PA24 */ { 1, 0, 0, 0, 1, 1 }, /* I2C_SDA2 */ /* PA23 */ { 1, 0, 0, 1, 1, 1 }, /* I2C_SCL2 */ #else /* normal I/O port pins */ diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index 47c4450..aabd3a8 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -298,29 +298,14 @@ int ivm_analyze_eeprom(unsigned char *buf, int len) int ivm_read_eeprom(void) { -#if defined(CONFIG_I2C_MUX) - I2C_MUX_DEVICE *dev = NULL; -#endif uchar i2c_buffer[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; - uchar *buf; - unsigned long dev_addr = CONFIG_SYS_IVM_EEPROM_ADR; int ret; -#if defined(CONFIG_I2C_MUX) - /* First init the Bus, select the Bus */ - buf = (unsigned char *) getenv("EEprom_ivm"); - if (buf != NULL) - dev = i2c_mux_ident_muxstring(buf); - if (dev == NULL) { - printf("Error couldnt add Bus for IVM\n"); - return -1; - } - i2c_set_bus_num(dev->busid); -#endif + i2c_set_bus_num(CONFIG_KM_IVM_BUS); /* add deblocking here */ i2c_make_abort(); - ret = i2c_read(dev_addr, 0, 1, i2c_buffer, + ret = i2c_read(CONFIG_SYS_IVM_EEPROM_ADR, 0, 1, i2c_buffer, CONFIG_SYS_IVM_EEPROM_MAX_LEN); if (ret != 0) { printf("Error reading EEprom\n"); diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index b5ea7ae..cd861c9 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -92,19 +92,6 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {0, 0, 0, 0, QE_IOP_TAB_END}, }; -static int board_init_i2c_busses(void) -{ - I2C_MUX_DEVICE *dev = NULL; - uchar *dtt_bus = (uchar *)"pca9547:70:a"; - - /* Set up the Bus for the DTTs */ - dev = i2c_mux_ident_muxstring(dtt_bus); - if (dev == NULL) - printf("Error couldn't add Bus for DTT\n"); - - return 0; -} - #if defined(CONFIG_SUVD3) const uint upma_table[] = { 0x1ffedc00, 0x0ffcdc80, 0x0ffcdc80, 0x0ffcdc04, /* Words 0 to 3 */ @@ -203,8 +190,6 @@ int board_early_init_r(void) int misc_init_r(void) { - /* add board specific i2c busses */ - board_init_i2c_busses(); return 0; } diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index e76acc0..481876b 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -47,7 +47,7 @@ static const u32 kwmpp_config[] = { MPP5_NF_IO7, MPP6_SYSRST_OUTn, MPP7_PEX_RST_OUTn, -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) MPP8_GPIO, /* SDA */ MPP9_GPIO, /* SCL */ #endif @@ -218,7 +218,7 @@ int misc_init_r(void) int board_early_init_f(void) { -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) u32 tmp; /* set the 2 bitbang i2c pins as output gpios */ @@ -244,7 +244,7 @@ int board_init(void) kw_gpio_set_valid(KM_FLASH_GPIO_PIN, 1); kw_gpio_direction_output(KM_FLASH_GPIO_PIN, 1); -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* * Reinit the GPIO for I2C Bitbang driver so that the now * available gpio framework is consistent. The calls to @@ -424,7 +424,7 @@ int hush_init_var(void) } #endif -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) void set_sda(int state) { I2C_ACTIVE; diff --git a/board/lwmon/lwmon.c b/board/lwmon/lwmon.c index fb7e54d..225b1ef 100644 --- a/board/lwmon/lwmon.c +++ b/board/lwmon/lwmon.c @@ -464,7 +464,7 @@ static void kbd_init (void) uchar val, errcd; int i; - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); gd->arch.kbd_status = 0; diff --git a/board/lwmon/pcmcia.c b/board/lwmon/pcmcia.c index acbb9d5..b9894cf 100644 --- a/board/lwmon/pcmcia.c +++ b/board/lwmon/pcmcia.c @@ -104,7 +104,7 @@ int pcmcia_hardware_enable(int slot) /* switch VCC on */ val |= MAX1604_OP_SUS | MAX1604_VCCBON; - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); i2c_write (CONFIG_SYS_I2C_POWER_A_ADDR, 0, 0, &val, 1); udelay(500000); @@ -193,7 +193,7 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp) */ debug ("PCMCIA power OFF\n"); val = MAX1604_VCCBHIZ | MAX1604_VPPBHIZ; - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); i2c_write (CONFIG_SYS_I2C_POWER_A_ADDR, 0, 0, &val, 1); val = 0; diff --git a/board/lwmon5/kbd.c b/board/lwmon5/kbd.c index f3562b7..97962da 100644 --- a/board/lwmon5/kbd.c +++ b/board/lwmon5/kbd.c @@ -98,7 +98,7 @@ static void kbd_init (void) uchar val, errcd; int i; - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); gd->arch.kbd_status = 0; diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c index f39bb35..7c7690f 100644 --- a/board/mpl/pip405/pip405.c +++ b/board/mpl/pip405/pip405.c @@ -192,7 +192,7 @@ int board_early_init_f (void) #endif /* Read Serial Presence Detect Information */ - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); for (i = 0; i < 128; i++) datain[i] = 127; i2c_read(SPD_EEPROM_ADDRESS,0,1,datain,128); diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 5f72c02..126e56e 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -135,7 +135,7 @@ int board_init(void) power_det_init(); -#ifdef CONFIG_TEGRA_I2C +#ifdef CONFIG_SYS_I2C_TEGRA #ifndef CONFIG_SYS_I2C_INIT_BOARD #error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards" #endif @@ -149,7 +149,7 @@ int board_init(void) debug("Memory controller init failed: %d\n", err); # endif # endif /* CONFIG_TEGRA_PMU */ -#endif /* CONFIG_TEGRA_I2C */ +#endif /* CONFIG_SYS_I2C_TEGRA */ #ifdef CONFIG_USB_EHCI_TEGRA pin_mux_usb(); diff --git a/board/pm826/pm826.c b/board/pm826/pm826.c index 109b20d..93bb1b4 100644 --- a/board/pm826/pm826.c +++ b/board/pm826/pm826.c @@ -153,7 +153,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */ /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* PD17 */ /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* PD16 */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else diff --git a/board/pm828/pm828.c b/board/pm828/pm828.c index 26c3683..f446543 100644 --- a/board/pm828/pm828.c +++ b/board/pm828/pm828.c @@ -153,7 +153,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */ /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* PD17 */ /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* PD16 */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else diff --git a/board/sacsng/ioconfig.h b/board/sacsng/ioconfig.h index be1ce7c..ac8f152 100644 --- a/board/sacsng/ioconfig.h +++ b/board/sacsng/ioconfig.h @@ -187,7 +187,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD17 */ { CONF, SPEC, 1, DOUT, ACTV, 0 }, /* SPI_MOSI */ /* PD16 */ { CONF, SPEC, 1, DIN, ACTV, 0 }, /* SPI_MISO */ #endif -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { CONF, GPIO, 0, DOUT, OPEN, 1 }, /* I2C_SDA */ /* PD14 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* I2C_SCL */ #else diff --git a/board/sandburst/common/ppc440gx_i2c.c b/board/sandburst/common/ppc440gx_i2c.c deleted file mode 100644 index 1d7f17c..0000000 --- a/board/sandburst/common/ppc440gx_i2c.c +++ /dev/null @@ -1,494 +0,0 @@ -/* - * Copyright (C) 2005 Sandburst Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * Ported from arch/powerpc/cpu/ppc4xx/i2c.c by AS HARNOIS by - * Travis B. Sawyer - * Sandburst Corporation. - */ -#include <common.h> -#include <asm/ppc4xx.h> -#include <asm/ppc4xx-i2c.h> -#include <i2c.h> -#include <command.h> -#include "ppc440gx_i2c.h" -#include <asm/io.h> - -#ifdef CONFIG_I2C_BUS1 - -#define IIC_OK 0 -#define IIC_NOK 1 -#define IIC_NOK_LA 2 /* Lost arbitration */ -#define IIC_NOK_ICT 3 /* Incomplete transfer */ -#define IIC_NOK_XFRA 4 /* Transfer aborted */ -#define IIC_NOK_DATA 5 /* No data in buffer */ -#define IIC_NOK_TOUT 6 /* Transfer timeout */ - -#define IIC_TIMEOUT 1 /* 1 second */ -#if defined(CONFIG_SYS_I2C_NOPROBES) -static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; -#endif - -static struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_REGISTERS_BUS1_BASE_ADDRESS; - -static void _i2c_bus1_reset (void) -{ - int i, status; - - /* Reset status register */ - /* write 1 in SCMP and IRQA to clear these fields */ - out_8 (IIC_STS1, 0x0A); - - /* write 1 in IRQP IRQD LA ICT XFRA to clear these fields */ - out_8 (IIC_EXTSTS1, 0x8F); - __asm__ volatile ("eieio"); - - /* - * Get current state, reset bus - * only if no transfers are pending. - */ - i = 10; - do { - /* Get status */ - status = in_8 (IIC_STS1); - udelay (500); /* 500us */ - i--; - } while ((status & IIC_STS_PT) && (i > 0)); - /* Soft reset controller */ - status = in_8 (IIC_XTCNTLSS1); - out_8 (IIC_XTCNTLSS1, (status | IIC_XTCNTLSS_SRST)); - __asm__ volatile ("eieio"); - - /* make sure where in initial state, data hi, clock hi */ - out_8 (IIC_DIRECTCNTL1, 0xC); - for (i = 0; i < 10; i++) { - if ((in_8 (IIC_DIRECTCNTL1) & 0x3) != 0x3) { - /* clock until we get to known state */ - out_8 (IIC_DIRECTCNTL1, 0x8); /* clock lo */ - udelay (100); /* 100us */ - out_8 (IIC_DIRECTCNTL1, 0xC); /* clock hi */ - udelay (100); /* 100us */ - } else { - break; - } - } - /* send start condition */ - out_8 (IIC_DIRECTCNTL1, 0x4); - udelay (1000); /* 1ms */ - /* send stop condition */ - out_8 (IIC_DIRECTCNTL1, 0xC); - udelay (1000); /* 1ms */ - /* Unreset controller */ - out_8 (IIC_XTCNTLSS1, (status & ~IIC_XTCNTLSS_SRST)); - udelay (1000); /* 1ms */ -} - -void i2c1_init (int speed, int slaveadd) -{ - sys_info_t sysInfo; - unsigned long freqOPB; - int val, divisor; - -#ifdef CONFIG_SYS_I2C_INIT_BOARD - /* call board specific i2c bus reset routine before accessing the */ - /* environment, which might be in a chip on that bus. For details */ - /* about this problem see doc/I2C_Edge_Conditions. */ - i2c_init_board(); -#endif - - /* Handle possible failed I2C state */ - /* FIXME: put this into i2c_init_board()? */ - _i2c_bus1_reset (); - - /* clear lo master address */ - out_8 (IIC_LMADR1, 0); - - /* clear hi master address */ - out_8 (IIC_HMADR1, 0); - - /* clear lo slave address */ - out_8 (IIC_LSADR1, 0); - - /* clear hi slave address */ - out_8 (IIC_HSADR1, 0); - - /* Clock divide Register */ - /* get OPB frequency */ - get_sys_info (&sysInfo); - freqOPB = sysInfo.freqPLB / sysInfo.pllOpbDiv; - /* set divisor according to freqOPB */ - divisor = (freqOPB - 1) / 10000000; - if (divisor == 0) - divisor = 1; - out_8 (IIC_CLKDIV1, divisor); - - /* no interrupts */ - out_8 (IIC_INTRMSK1, 0); - - /* clear transfer count */ - out_8 (IIC_XFRCNT1, 0); - - /* clear extended control & stat */ - /* write 1 in SRC SRS SWC SWS to clear these fields */ - out_8 (IIC_XTCNTLSS1, 0xF0); - - /* Mode Control Register - Flush Slave/Master data buffer */ - out_8 (IIC_MDCNTL1, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB); - __asm__ volatile ("eieio"); - - - val = in_8(IIC_MDCNTL1); - __asm__ volatile ("eieio"); - - /* Ignore General Call, slave transfers are ignored, - disable interrupts, exit unknown bus state, enable hold - SCL - 100kHz normaly or FastMode for 400kHz and above - */ - - val |= IIC_MDCNTL_EUBS|IIC_MDCNTL_HSCL; - if( speed >= 400000 ){ - val |= IIC_MDCNTL_FSM; - } - out_8 (IIC_MDCNTL1, val); - - /* clear control reg */ - out_8 (IIC_CNTL1, 0x00); - __asm__ volatile ("eieio"); - -} - -/* - This code tries to use the features of the 405GP i2c - controller. It will transfer up to 4 bytes in one pass - on the loop. It only does out_8(lbz) to the buffer when it - is possible to do out16(lhz) transfers. - - cmd_type is 0 for write 1 for read. - - addr_len can take any value from 0-255, it is only limited - by the char, we could make it larger if needed. If it is - 0 we skip the address write cycle. - - Typical case is a Write of an addr followd by a Read. The - IBM FAQ does not cover this. On the last byte of the write - we don't set the creg CHT bit, and on the first bytes of the - read we set the RPST bit. - - It does not support address only transfers, there must be - a data part. If you want to write the address yourself, put - it in the data pointer. - - It does not support transfer to/from address 0. - - It does not check XFRCNT. -*/ -static -int i2c_transfer1(unsigned char cmd_type, - unsigned char chip, - unsigned char addr[], - unsigned char addr_len, - unsigned char data[], - unsigned short data_len ) -{ - unsigned char* ptr; - int reading; - int tran,cnt; - int result; - int status; - int i; - uchar creg; - - if( data == 0 || data_len == 0 ){ - /*Don't support data transfer of no length or to address 0*/ - printf( "i2c_transfer: bad call\n" ); - return IIC_NOK; - } - if( addr && addr_len ){ - ptr = addr; - cnt = addr_len; - reading = 0; - }else{ - ptr = data; - cnt = data_len; - reading = cmd_type; - } - - /*Clear Stop Complete Bit*/ - out_8(IIC_STS1,IIC_STS_SCMP); - /* Check init */ - i=10; - do { - /* Get status */ - status = in_8(IIC_STS1); - __asm__ volatile("eieio"); - i--; - } while ((status & IIC_STS_PT) && (i>0)); - - if (status & IIC_STS_PT) { - result = IIC_NOK_TOUT; - return(result); - } - /*flush the Master/Slave Databuffers*/ - out_8(IIC_MDCNTL1, ((in_8(IIC_MDCNTL1))|IIC_MDCNTL_FMDB|IIC_MDCNTL_FSDB)); - /*need to wait 4 OPB clocks? code below should take that long*/ - - /* 7-bit adressing */ - out_8(IIC_HMADR1,0); - out_8(IIC_LMADR1, chip); - __asm__ volatile("eieio"); - - tran = 0; - result = IIC_OK; - creg = 0; - - while ( tran != cnt && (result == IIC_OK)) { - int bc,j; - - /* Control register = - Normal transfer, 7-bits adressing, Transfer up to bc bytes, Normal start, - Transfer is a sequence of transfers - */ - creg |= IIC_CNTL_PT; - - bc = (cnt - tran) > 4 ? 4 : - cnt - tran; - creg |= (bc-1)<<4; - /* if the real cmd type is write continue trans*/ - if ( (!cmd_type && (ptr == addr)) || ((tran+bc) != cnt) ) - creg |= IIC_CNTL_CHT; - - if (reading) - creg |= IIC_CNTL_READ; - else { - for(j=0; j<bc; j++) { - /* Set buffer */ - out_8(IIC_MDBUF1,ptr[tran+j]); - __asm__ volatile("eieio"); - } - } - out_8(IIC_CNTL1, creg ); - __asm__ volatile("eieio"); - - /* Transfer is in progress - we have to wait for upto 5 bytes of data - 1 byte chip address+r/w bit then bc bytes - of data. - udelay(10) is 1 bit time at 100khz - Doubled for slop. 20 is too small. - */ - i=2*5*8; - do { - /* Get status */ - status = in_8(IIC_STS1); - __asm__ volatile("eieio"); - udelay (10); - i--; - } while ((status & IIC_STS_PT) && !(status & IIC_STS_ERR) - && (i>0)); - - if (status & IIC_STS_ERR) { - result = IIC_NOK; - status = in_8 (IIC_EXTSTS1); - /* Lost arbitration? */ - if (status & IIC_EXTSTS_LA) - result = IIC_NOK_LA; - /* Incomplete transfer? */ - if (status & IIC_EXTSTS_ICT) - result = IIC_NOK_ICT; - /* Transfer aborted? */ - if (status & IIC_EXTSTS_XFRA) - result = IIC_NOK_XFRA; - } else if ( status & IIC_STS_PT) { - result = IIC_NOK_TOUT; - } - /* Command is reading => get buffer */ - if ((reading) && (result == IIC_OK)) { - /* Are there data in buffer */ - if (status & IIC_STS_MDBS) { - /* - even if we have data we have to wait 4OPB clocks - for it to hit the front of the FIFO, after that - we can just read. We should check XFCNT here and - if the FIFO is full there is no need to wait. - */ - udelay (1); - for(j=0;j<bc;j++) { - ptr[tran+j] = in_8(IIC_MDBUF1); - __asm__ volatile("eieio"); - } - } else - result = IIC_NOK_DATA; - } - creg = 0; - tran+=bc; - if( ptr == addr && tran == cnt ) { - ptr = data; - cnt = data_len; - tran = 0; - reading = cmd_type; - if( reading ) - creg = IIC_CNTL_RPST; - } - } - return (result); -} - -int i2c_probe1 (uchar chip) -{ - uchar buf[1]; - - buf[0] = 0; - - /* - * What is needed is to send the chip address and verify that the - * address was <ACK>ed (i.e. there was a chip at that address which - * drove the data line low). - */ - return(i2c_transfer1 (1, chip << 1, 0,0, buf, 1) != 0); -} - - -int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len) -{ - uchar xaddr[4]; - int ret; - - if ( alen > 4 ) { - printf ("I2C read: addr len %d not supported\n", alen); - return 1; - } - - if ( alen > 0 ) { - xaddr[0] = (addr >> 24) & 0xFF; - xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; - } - - -#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW - /* - * EEPROM chips that implement "address overflow" are ones - * like Catalyst 24WC04/08/16 which has 9/10/11 bits of - * address and the extra bits end up in the "chip address" - * bit slots. This makes a 24WC08 (1Kbyte) chip look like - * four 256 byte chips. - * - * Note that we consider the length of the address field to - * still be one byte because the extra address bits are - * hidden in the chip address. - */ - if( alen > 0 ) - chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); -#endif - if( (ret = i2c_transfer1( 1, chip<<1, &xaddr[4-alen], alen, buffer, len )) != 0) { - printf( "I2c read: failed %d\n", ret); - return 1; - } - return 0; -} - -int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len) -{ - uchar xaddr[4]; - - if ( alen > 4 ) { - printf ("I2C write: addr len %d not supported\n", alen); - return 1; - - } - if ( alen > 0 ) { - xaddr[0] = (addr >> 24) & 0xFF; - xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; - } - -#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW - /* - * EEPROM chips that implement "address overflow" are ones - * like Catalyst 24WC04/08/16 which has 9/10/11 bits of - * address and the extra bits end up in the "chip address" - * bit slots. This makes a 24WC08 (1Kbyte) chip look like - * four 256 byte chips. - * - * Note that we consider the length of the address field to - * still be one byte because the extra address bits are - * hidden in the chip address. - */ - if( alen > 0 ) - chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); -#endif - - return (i2c_transfer1( 0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0); -} - -/*----------------------------------------------------------------------- - * Read a register - */ -uchar i2c_reg_read1(uchar i2c_addr, uchar reg) -{ - uchar buf; - - i2c_read1(i2c_addr, reg, 1, &buf, (uchar)1); - - return(buf); -} - -/*----------------------------------------------------------------------- - * Write a register - */ -void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write1(i2c_addr, reg, 1, &val, 1); -} - - -int do_i2c1_probe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - int j; -#if defined(CONFIG_SYS_I2C_NOPROBES) - int k, skip; -#endif - - puts ("Valid chip addresses:"); - for(j = 0; j < 128; j++) { -#if defined(CONFIG_SYS_I2C_NOPROBES) - skip = 0; - for (k = 0; k < sizeof(i2c_no_probes); k++){ - if (j == i2c_no_probes[k]){ - skip = 1; - break; - } - } - if (skip) - continue; -#endif - if(i2c_probe1(j) == 0) { - printf(" %02X", j); - } - } - putc ('\n'); - -#if defined(CONFIG_SYS_I2C_NOPROBES) - puts ("Excluded chip addresses:"); - for( k = 0; k < sizeof(i2c_no_probes); k++ ) - printf(" %02X", i2c_no_probes[k] ); - putc ('\n'); -#endif - - return 0; -} - -U_BOOT_CMD( - iprobe1, 1, 1, do_i2c1_probe, - "probe to discover valid I2C chip addresses", - "" -); - -#endif /* CONFIG_I2C_BUS1 */ diff --git a/board/sandburst/common/ppc440gx_i2c.h b/board/sandburst/common/ppc440gx_i2c.h deleted file mode 100644 index b1179bc..0000000 --- a/board/sandburst/common/ppc440gx_i2c.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (C) 2005 Sandburst Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * Ported from i2c driver for ppc4xx by AS HARNOIS by - * Travis B. Sawyer - * Sandburst Corporation - */ -#include <common.h> -#include <asm/ppc4xx.h> -#include <asm/ppc4xx-i2c.h> -#include <i2c.h> - -#ifdef CONFIG_HARD_I2C - -#define I2C_BUS1_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000500) -#define I2C_REGISTERS_BUS1_BASE_ADDRESS I2C_BUS1_BASE_ADDR -#define IIC_MDBUF1 (&i2c->mdbuf) -#define IIC_SDBUF1 (&i2c->sdbuf) -#define IIC_LMADR1 (&i2c->lmadr) -#define IIC_HMADR1 (&i2c->hmadr) -#define IIC_CNTL1 (&i2c->cntl) -#define IIC_MDCNTL1 (&i2c->mdcntl) -#define IIC_STS1 (&i2c->sts) -#define IIC_EXTSTS1 (&i2c->extsts) -#define IIC_LSADR1 (&i2c->lsadr) -#define IIC_HSADR1 (&i2c->hsadr) -#define IIC_CLKDIV1 (&i2c->clkdiv) -#define IIC_INTRMSK1 (&i2c->intrmsk) -#define IIC_XFRCNT1 (&i2c->xfrcnt) -#define IIC_XTCNTLSS1 (&i2c->xtcntlss) -#define IIC_DIRECTCNTL1 (&i2c->directcntl) - -void i2c1_init (int speed, int slaveadd); -int i2c_probe1 (uchar chip); -int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len); -int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len); -uchar i2c_reg_read1(uchar i2c_addr, uchar reg); -void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val); - -#endif /* CONFIG_HARD_I2C */ diff --git a/board/sandburst/common/sb_common.c b/board/sandburst/common/sb_common.c index 12334df..b579812 100644 --- a/board/sandburst/common/sb_common.c +++ b/board/sandburst/common/sb_common.c @@ -10,7 +10,6 @@ #include <asm/io.h> #include <spd_sdram.h> #include <i2c.h> -#include "ppc440gx_i2c.h" #include "sb_common.h" DECLARE_GLOBAL_DATA_PTR; @@ -68,7 +67,7 @@ unsigned short sbcommon_get_serial_number(void) /* Get the board serial number from eeprom */ /* Initialize I2C */ - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); /* Read 256 bytes in EEPROM */ i2c_read (0x50, 0, 1, buff, 0x100); @@ -94,85 +93,87 @@ void sbcommon_fans(void) * Attempt to turn on 2 of the fans... * Need to go through the bridge */ + i2c_set_bus_num(1); puts ("FANS: "); /* select fan4 through the bridge */ - i2c_reg_write1(0x73, /* addr */ - 0x00, /* reg */ - 0x08); /* val = bus 4 */ + i2c_reg_write(0x73, /* addr */ + 0x00, /* reg */ + 0x08); /* val = bus 4 */ /* Turn on FAN 4 */ - i2c_reg_write1(0x2e, - 1, - 0x80); + i2c_reg_write(0x2e, + 1, + 0x80); - i2c_reg_write1(0x2e, - 0, - 0x19); + i2c_reg_write(0x2e, + 0, + 0x19); /* Deselect bus 4 on the bridge */ - i2c_reg_write1(0x73, - 0x00, - 0x00); + i2c_reg_write(0x73, + 0x00, + 0x00); /* select fan3 through the bridge */ - i2c_reg_write1(0x73, /* addr */ - 0x00, /* reg */ - 0x04); /* val = bus 3 */ + i2c_reg_write(0x73, /* addr */ + 0x00, /* reg */ + 0x04); /* val = bus 3 */ /* Turn on FAN 3 */ - i2c_reg_write1(0x2e, - 1, - 0x80); + i2c_reg_write(0x2e, + 1, + 0x80); - i2c_reg_write1(0x2e, - 0, - 0x19); + i2c_reg_write(0x2e, + 0, + 0x19); /* Deselect bus 3 on the bridge */ - i2c_reg_write1(0x73, - 0x00, - 0x00); + i2c_reg_write(0x73, + 0x00, + 0x00); /* select fan2 through the bridge */ - i2c_reg_write1(0x73, /* addr */ - 0x00, /* reg */ - 0x02); /* val = bus 4 */ + i2c_reg_write(0x73, /* addr */ + 0x00, /* reg */ + 0x02); /* val = bus 4 */ /* Turn on FAN 2 */ - i2c_reg_write1(0x2e, - 1, - 0x80); + i2c_reg_write(0x2e, + 1, + 0x80); - i2c_reg_write1(0x2e, - 0, - 0x19); + i2c_reg_write(0x2e, + 0, + 0x19); /* Deselect bus 2 on the bridge */ - i2c_reg_write1(0x73, - 0x00, - 0x00); + i2c_reg_write(0x73, + 0x00, + 0x00); /* select fan1 through the bridge */ - i2c_reg_write1(0x73, /* addr */ - 0x00, /* reg */ - 0x01); /* val = bus 0 */ + i2c_reg_write(0x73, /* addr */ + 0x00, /* reg */ + 0x01); /* val = bus 0 */ /* Turn on FAN 1 */ - i2c_reg_write1(0x2e, - 1, - 0x80); + i2c_reg_write(0x2e, + 1, + 0x80); - i2c_reg_write1(0x2e, - 0, - 0x19); + i2c_reg_write(0x2e, + 0, + 0x19); /* Deselect bus 1 on the bridge */ - i2c_reg_write1(0x73, - 0x00, - 0x00); + i2c_reg_write(0x73, + 0x00, + 0x00); puts ("on\n"); + i2c_set_bus_num(0); return; @@ -303,7 +304,7 @@ void board_get_enetaddr(int macaddr_idx, uchar *enet) if (0 == macaddr_idx) { /* Initialize I2C */ - i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + i2c_set_bus_num(0); /* Read 256 bytes in EEPROM */ i2c_read (0x50, 0, 1, buff, 0x100); diff --git a/board/sandburst/common/sb_common.h b/board/sandburst/common/sb_common.h index c86061c..8716eac 100644 --- a/board/sandburst/common/sb_common.h +++ b/board/sandburst/common/sb_common.h @@ -12,7 +12,6 @@ #include <asm/io.h> #include <spd_sdram.h> #include <i2c.h> -#include "ppc440gx_i2c.h" /* * GPIO Settings diff --git a/board/sandburst/karef/Makefile b/board/sandburst/karef/Makefile index 9cceb47..af758f9 100644 --- a/board/sandburst/karef/Makefile +++ b/board/sandburst/karef/Makefile @@ -24,8 +24,7 @@ CFLAGS += -DBUILDUSER='"$(BUILDUSER)"' LIB = $(obj)lib$(BOARD).o -COBJS = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \ - ../common/sb_common.o +COBJS = $(BOARD).o ../common/flash.o ../common/sb_common.o SOBJS = init.o diff --git a/board/sandburst/karef/karef.c b/board/sandburst/karef/karef.c index 93681c1..683d68b 100644 --- a/board/sandburst/karef/karef.c +++ b/board/sandburst/karef/karef.c @@ -16,7 +16,6 @@ #include <spd_sdram.h> #include <i2c.h> #include "../common/sb_common.h" -#include "../common/ppc440gx_i2c.h" #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) || \ defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) #include <net.h> @@ -322,11 +321,6 @@ int checkboard (void) ************************************************************************/ int misc_init_f (void) { - /* Turn on i2c bus 1 */ - puts ("I2C1: "); - i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - puts ("ready\n"); - /* Turn on fans 3 & 4 */ sbcommon_fans(); diff --git a/board/sandburst/metrobox/Makefile b/board/sandburst/metrobox/Makefile index 4dbd6ed..163f2b9 100644 --- a/board/sandburst/metrobox/Makefile +++ b/board/sandburst/metrobox/Makefile @@ -23,8 +23,7 @@ CFLAGS += -DBUILDUSER='"$(BUILDUSER)"' LIB = $(obj)lib$(BOARD).o -COBJS = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \ - ../common/sb_common.o +COBJS = $(BOARD).o ../common/flash.o ../common/sb_common.o SOBJS = init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/board/sandburst/metrobox/metrobox.c b/board/sandburst/metrobox/metrobox.c index 8d50796..5bc7f2f 100644 --- a/board/sandburst/metrobox/metrobox.c +++ b/board/sandburst/metrobox/metrobox.c @@ -14,7 +14,6 @@ #include <asm/io.h> #include <spd_sdram.h> #include <i2c.h> -#include "../common/ppc440gx_i2c.h" #include "../common/sb_common.h" #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) || \ defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) @@ -289,11 +288,6 @@ int checkboard (void) ************************************************************************/ int misc_init_f (void) { - /* Turn on i2c bus 1 */ - puts ("I2C1: "); - i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - puts ("ready\n"); - /* Turn on fans */ sbcommon_fans(); diff --git a/board/tqc/tqm8260/tqm8260.c b/board/tqc/tqm8260/tqm8260.c index 669e99d..c361f18 100644 --- a/board/tqc/tqm8260/tqm8260.c +++ b/board/tqc/tqm8260/tqm8260.c @@ -144,7 +144,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */ /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */ /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else diff --git a/board/tqc/tqm8272/tqm8272.c b/board/tqc/tqm8272/tqm8272.c index b9dd4fa..334fd6d 100644 --- a/board/tqc/tqm8272/tqm8272.c +++ b/board/tqc/tqm8272/tqm8272.c @@ -164,7 +164,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */ /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */ /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */ -#if defined(CONFIG_SOFT_I2C) +#if defined(CONFIG_SYS_I2C_SOFT) /* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */ /* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */ #else diff --git a/board/tqc/tqm8272/tqm8272.h b/board/tqc/tqm8272/tqm8272.h index fbdbff6..2205d51 100644 --- a/board/tqc/tqm8272/tqm8272.h +++ b/board/tqc/tqm8272/tqm8272.h @@ -34,4 +34,4 @@ typedef struct{ static HWIB_INFO hwinf = {0, 0, 1, 0, 1, 0, 0, 0, 0, 8272, 0 ,0, 0, 0, 0, 0, 0, 0}; -#endif +#endif /* __CONFIG_H */ |