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| author | wdenk <wdenk> | 2004-02-12 00:47:09 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2004-02-12 00:47:09 +0000 |
| commit | bf9e3b38f77c2eac620263dd60437c6ec47a27bf (patch) | |
| tree | d03891090553d167f3eb08d7f9c3f2532e43fcc2 /board | |
| parent | a2d18bb7d31e7b971386fef505ff0218f3b6e893 (diff) | |
| download | u-boot-imx-bf9e3b38f77c2eac620263dd60437c6ec47a27bf.zip u-boot-imx-bf9e3b38f77c2eac620263dd60437c6ec47a27bf.tar.gz u-boot-imx-bf9e3b38f77c2eac620263dd60437c6ec47a27bf.tar.bz2 | |
* Some code cleanup
* Patch by Josef Baumgartner, 10 Feb 2004:
Fixes for Coldfire port
* Patch by Brad Kemp, 11 Feb 2004:
Fix CFI flash driver problems
Diffstat (limited to 'board')
30 files changed, 3508 insertions, 3609 deletions
diff --git a/board/bmw/flash.c b/board/bmw/flash.c index e04af97..7fba174 100644 --- a/board/bmw/flash.c +++ b/board/bmw/flash.c @@ -29,7 +29,7 @@ #define ROM_CS0_START 0xFF800000 #define ROM_CS1_START 0xFF000000 -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ #if defined(CFG_ENV_IS_IN_FLASH) # ifndef CFG_ENV_ADDR @@ -46,9 +46,10 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ /*----------------------------------------------------------------------- * Functions */ -static int write_word (flash_info_t *info, ulong dest, ulong data); +static int write_word (flash_info_t * info, ulong dest, ulong data); + #if 0 -static void flash_get_offsets (ulong base, flash_info_t *info); +static void flash_get_offsets (ulong base, flash_info_t * info); #endif /* 0 */ /*flash command address offsets*/ @@ -69,289 +70,305 @@ static void flash_get_offsets (ulong base, flash_info_t *info); */ #if 0 -static int byte_parity_odd(unsigned char x) __attribute__ ((const)); +static int byte_parity_odd (unsigned char x) __attribute__ ((const)); #endif /* 0 */ -static unsigned long flash_id(unsigned char mfct, unsigned char chip) __attribute__ ((const)); +static unsigned long flash_id (unsigned char mfct, unsigned char chip) + __attribute__ ((const)); -typedef struct -{ - FLASH_WORD_SIZE extval; - unsigned short intval; +typedef struct { + FLASH_WORD_SIZE extval; + unsigned short intval; } map_entry; #if 0 -static int -byte_parity_odd(unsigned char x) +static int byte_parity_odd (unsigned char x) { - x ^= x >> 4; - x ^= x >> 2; - x ^= x >> 1; - return (x & 0x1) != 0; + x ^= x >> 4; + x ^= x >> 2; + x ^= x >> 1; + return (x & 0x1) != 0; } #endif /* 0 */ -static unsigned long -flash_id(unsigned char mfct, unsigned char chip) +static unsigned long flash_id (unsigned char mfct, unsigned char chip) { - static const map_entry mfct_map[] = - { - {(FLASH_WORD_SIZE) AMD_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_AMD >> 16)}, - {(FLASH_WORD_SIZE) FUJ_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_FUJ >> 16)}, - {(FLASH_WORD_SIZE) STM_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_STM >> 16)}, - {(FLASH_WORD_SIZE) MT_MANUFACT, (unsigned short) ((unsigned long) FLASH_MAN_MT >> 16)}, - {(FLASH_WORD_SIZE) INTEL_MANUFACT,(unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)}, - {(FLASH_WORD_SIZE) INTEL_ALT_MANU,(unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)} - }; - - static const map_entry chip_map[] = - { - {AMD_ID_F040B, FLASH_AM040}, - {(FLASH_WORD_SIZE) STM_ID_x800AB, FLASH_STM800AB} - }; - - const map_entry *p; - unsigned long result = FLASH_UNKNOWN; - - /* find chip id */ - for(p = &chip_map[0]; p < &chip_map[sizeof chip_map / sizeof chip_map[0]]; p++) - if(p->extval == chip) - { - result = FLASH_VENDMASK | p->intval; - break; - } - - /* find vendor id */ - for(p = &mfct_map[0]; p < &mfct_map[sizeof mfct_map / sizeof mfct_map[0]]; p++) - if(p->extval == mfct) - { - result &= ~FLASH_VENDMASK; - result |= (unsigned long) p->intval << 16; - break; - } - - return result; + static const map_entry mfct_map[] = { + {(FLASH_WORD_SIZE) AMD_MANUFACT, + (unsigned short) ((unsigned long) FLASH_MAN_AMD >> 16)}, + {(FLASH_WORD_SIZE) FUJ_MANUFACT, + (unsigned short) ((unsigned long) FLASH_MAN_FUJ >> 16)}, + {(FLASH_WORD_SIZE) STM_MANUFACT, + (unsigned short) ((unsigned long) FLASH_MAN_STM >> 16)}, + {(FLASH_WORD_SIZE) MT_MANUFACT, + (unsigned short) ((unsigned long) FLASH_MAN_MT >> 16)}, + {(FLASH_WORD_SIZE) INTEL_MANUFACT, + (unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)}, + {(FLASH_WORD_SIZE) INTEL_ALT_MANU, + (unsigned short) ((unsigned long) FLASH_MAN_INTEL >> 16)} + }; + + static const map_entry chip_map[] = { + {AMD_ID_F040B, FLASH_AM040}, + {(FLASH_WORD_SIZE) STM_ID_x800AB, FLASH_STM800AB} + }; + + const map_entry *p; + unsigned long result = FLASH_UNKNOWN; + + /* find chip id */ + for (p = &chip_map[0]; + p < &chip_map[sizeof chip_map / sizeof chip_map[0]]; p++) + if (p->extval == chip) { + result = FLASH_VENDMASK | p->intval; + break; + } + + /* find vendor id */ + for (p = &mfct_map[0]; + p < &mfct_map[sizeof mfct_map / sizeof mfct_map[0]]; p++) + if (p->extval == mfct) { + result &= ~FLASH_VENDMASK; + result |= (unsigned long) p->intval << 16; + break; + } + + return result; } -unsigned long -flash_init(void) +unsigned long flash_init (void) { - unsigned long i; - unsigned char j; - static const ulong flash_banks[] = CFG_FLASH_BANKS; - - /* Init: no FLASHes known */ - for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) - { - flash_info_t * const pflinfo = &flash_info[i]; - pflinfo->flash_id = FLASH_UNKNOWN; - pflinfo->size = 0; - pflinfo->sector_count = 0; - } - - for(i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++) - { - flash_info_t * const pflinfo = &flash_info[i]; - const unsigned long base_address = flash_banks[i]; - volatile FLASH_WORD_SIZE * const flash = (FLASH_WORD_SIZE *) base_address; + unsigned long i; + unsigned char j; + static const ulong flash_banks[] = CFG_FLASH_BANKS; + + /* Init: no FLASHes known */ + for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + flash_info_t *const pflinfo = &flash_info[i]; + + pflinfo->flash_id = FLASH_UNKNOWN; + pflinfo->size = 0; + pflinfo->sector_count = 0; + } + + for (i = 0; i < sizeof flash_banks / sizeof flash_banks[0]; i++) { + flash_info_t *const pflinfo = &flash_info[i]; + const unsigned long base_address = flash_banks[i]; + volatile FLASH_WORD_SIZE *const flash = + (FLASH_WORD_SIZE *) base_address; #if 0 - volatile FLASH_WORD_SIZE * addr2; + volatile FLASH_WORD_SIZE *addr2; #endif #if 0 - /* write autoselect sequence */ - flash[0x5555] = 0xaa; - flash[0x2aaa] = 0x55; - flash[0x5555] = 0x90; + /* write autoselect sequence */ + flash[0x5555] = 0xaa; + flash[0x2aaa] = 0x55; + flash[0x5555] = 0x90; #else - flash[0xAAA << (3 * i)] = 0xaa; - flash[0x555 << (3 * i)] = 0x55; - flash[0xAAA << (3 * i)] = 0x90; + flash[0xAAA << (3 * i)] = 0xaa; + flash[0x555 << (3 * i)] = 0x55; + flash[0xAAA << (3 * i)] = 0x90; #endif - __asm__ __volatile__("sync"); + __asm__ __volatile__ ("sync"); #if 0 - pflinfo->flash_id = flash_id(flash[0x0], flash[0x1]); + pflinfo->flash_id = flash_id (flash[0x0], flash[0x1]); #else - pflinfo->flash_id = flash_id(flash[0x0], flash[0x2 + 14 * i]); + pflinfo->flash_id = + flash_id (flash[0x0], flash[0x2 + 14 * i]); #endif - switch(pflinfo->flash_id & FLASH_TYPEMASK) - { - case FLASH_AM040: - pflinfo->size = 0x00080000; - pflinfo->sector_count = 8; - for(j = 0; j < 8; j++) - { - pflinfo->start[j] = base_address + 0x00010000 * j; - pflinfo->protect[j] = flash[(j << 16) | 0x2]; - } - break; - case FLASH_STM800AB: - pflinfo->size = 0x00100000; - pflinfo->sector_count = 19; - pflinfo->start[0] = base_address; - pflinfo->start[1] = base_address + 0x4000; - pflinfo->start[2] = base_address + 0x6000; - pflinfo->start[3] = base_address + 0x8000; - for(j = 1; j < 16; j++) - { - pflinfo->start[j+3] = base_address + 0x00010000 * j; - } + switch (pflinfo->flash_id & FLASH_TYPEMASK) { + case FLASH_AM040: + pflinfo->size = 0x00080000; + pflinfo->sector_count = 8; + for (j = 0; j < 8; j++) { + pflinfo->start[j] = + base_address + 0x00010000 * j; + pflinfo->protect[j] = flash[(j << 16) | 0x2]; + } + break; + case FLASH_STM800AB: + pflinfo->size = 0x00100000; + pflinfo->sector_count = 19; + pflinfo->start[0] = base_address; + pflinfo->start[1] = base_address + 0x4000; + pflinfo->start[2] = base_address + 0x6000; + pflinfo->start[3] = base_address + 0x8000; + for (j = 1; j < 16; j++) { + pflinfo->start[j + 3] = + base_address + 0x00010000 * j; + } #if 0 - /* check for protected sectors */ - for (j = 0; j < pflinfo->sector_count; j++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr2 = (volatile FLASH_WORD_SIZE *)(pflinfo->start[j]); - if (pflinfo->flash_id & FLASH_MAN_SST) - pflinfo->protect[j] = 0; - else - pflinfo->protect[j] = addr2[2] & 1; - } + /* check for protected sectors */ + for (j = 0; j < pflinfo->sector_count; j++) { + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ + addr2 = (volatile FLASH_WORD_SIZE + *) (pflinfo->start[j]); + if (pflinfo->flash_id & FLASH_MAN_SST) + pflinfo->protect[j] = 0; + else + pflinfo->protect[j] = addr2[2] & 1; + } #endif - break; - } - /* Protect monitor and environment sectors - */ + break; + } + /* Protect monitor and environment sectors + */ #if CFG_MONITOR_BASE >= CFG_FLASH_BASE - flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, - &flash_info[0]); + flash_protect (FLAG_PROTECT_SET, + CFG_MONITOR_BASE, + CFG_MONITOR_BASE + monitor_flash_len - 1, + &flash_info[0]); #endif #if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR) - flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, - &flash_info[0]); + flash_protect (FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, + &flash_info[0]); #endif - /* reset device to read mode */ - flash[0x0000] = 0xf0; - __asm__ __volatile__("sync"); - } + /* reset device to read mode */ + flash[0x0000] = 0xf0; + __asm__ __volatile__ ("sync"); + } - return flash_info[0].size + flash_info[1].size; + return flash_info[0].size + flash_info[1].size; } #if 0 -static void -flash_get_offsets (ulong base, flash_info_t *info) +static void flash_get_offsets (ulong base, flash_info_t * info) { - int i; - - /* set up sector start address table */ - if (info->flash_id & FLASH_MAN_SST) - { - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00010000); - } - else - if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00004000; - info->start[2] = base + 0x00006000; - info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; - } - } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00004000; - info->start[i--] = base + info->size - 0x00006000; - info->start[i--] = base + info->size - 0x00008000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00010000; + int i; + + /* set up sector start address table */ + if (info->flash_id & FLASH_MAN_SST) { + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00010000); + } else if (info->flash_id & FLASH_BTYPE) { + /* set sector offsets for bottom boot block type */ + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; + } + } else { + /* set sector offsets for top boot block type */ + i = info->sector_count - 1; + info->start[i--] = base + info->size - 0x00004000; + info->start[i--] = base + info->size - 0x00006000; + info->start[i--] = base + info->size - 0x00008000; + for (; i >= 0; i--) { + info->start[i] = base + i * 0x00010000; + } } - } } #endif /* 0 */ /*----------------------------------------------------------------------- */ -void -flash_print_info(flash_info_t *info) +void flash_print_info (flash_info_t * info) { - static const char unk[] = "Unknown"; - const char *mfct = unk, *type = unk; - unsigned int i; - - if(info->flash_id != FLASH_UNKNOWN) - { - switch(info->flash_id & FLASH_VENDMASK) - { - case FLASH_MAN_AMD: mfct = "AMD"; break; - case FLASH_MAN_FUJ: mfct = "FUJITSU"; break; - case FLASH_MAN_STM: mfct = "STM"; break; - case FLASH_MAN_SST: mfct = "SST"; break; - case FLASH_MAN_BM: mfct = "Bright Microelectonics"; break; - case FLASH_MAN_INTEL: mfct = "Intel"; break; - } - - switch(info->flash_id & FLASH_TYPEMASK) - { - case FLASH_AM040: type = "AM29F040B (512K * 8, uniform sector size)"; break; - case FLASH_AM400B: type = "AM29LV400B (4 Mbit, bottom boot sect)"; break; - case FLASH_AM400T: type = "AM29LV400T (4 Mbit, top boot sector)"; break; - case FLASH_AM800B: type = "AM29LV800B (8 Mbit, bottom boot sect)"; break; - case FLASH_AM800T: type = "AM29LV800T (8 Mbit, top boot sector)"; break; - case FLASH_AM160T: type = "AM29LV160T (16 Mbit, top boot sector)"; break; - case FLASH_AM320B: type = "AM29LV320B (32 Mbit, bottom boot sect)"; break; - case FLASH_AM320T: type = "AM29LV320T (32 Mbit, top boot sector)"; break; - case FLASH_STM800AB: type = "M29W800AB (8 Mbit, bottom boot sect)"; break; - case FLASH_SST800A: type = "SST39LF/VF800 (8 Mbit, uniform sector size)"; break; - case FLASH_SST160A: type = "SST39LF/VF160 (16 Mbit, uniform sector size)"; break; - } - } - - printf( - "\n Brand: %s Type: %s\n" - " Size: %lu KB in %d Sectors\n", - mfct, - type, - info->size >> 10, - info->sector_count - ); - - printf (" Sector Start Addresses:"); - - for (i = 0; i < info->sector_count; i++) - { - unsigned long size; - unsigned int erased; - unsigned long * flash = (unsigned long *) info->start[i]; - - /* - * Check if whole sector is erased - */ - size = - (i != (info->sector_count - 1)) ? - (info->start[i + 1] - info->start[i]) >> 2 : - (info->start[0] + info->size - info->start[i]) >> 2; - - for( - flash = (unsigned long *) info->start[i], erased = 1; - (flash != (unsigned long *) info->start[i] + size) && erased; - flash++ - ) - erased = *flash == ~0x0UL; - - printf( - "%s %08lX %s %s", - (i % 5) ? "" : "\n ", - info->start[i], - erased ? "E" : " ", - info->protect[i] ? "RO" : " " - ); - } - - puts("\n"); - return; + static const char unk[] = "Unknown"; + const char *mfct = unk, *type = unk; + unsigned int i; + + if (info->flash_id != FLASH_UNKNOWN) { + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_AMD: + mfct = "AMD"; + break; + case FLASH_MAN_FUJ: + mfct = "FUJITSU"; + break; + case FLASH_MAN_STM: + mfct = "STM"; + break; + case FLASH_MAN_SST: + mfct = "SST"; + break; + case FLASH_MAN_BM: + mfct = "Bright Microelectonics"; + break; + case FLASH_MAN_INTEL: + mfct = "Intel"; + break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_AM040: + type = "AM29F040B (512K * 8, uniform sector size)"; + break; + case FLASH_AM400B: + type = "AM29LV400B (4 Mbit, bottom boot sect)"; + break; + case FLASH_AM400T: + type = "AM29LV400T (4 Mbit, top boot sector)"; + break; + case FLASH_AM800B: + type = "AM29LV800B (8 Mbit, bottom boot sect)"; + break; + case FLASH_AM800T: + type = "AM29LV800T (8 Mbit, top boot sector)"; + break; + case FLASH_AM160T: + type = "AM29LV160T (16 Mbit, top boot sector)"; + break; + case FLASH_AM320B: + type = "AM29LV320B (32 Mbit, bottom boot sect)"; + break; + case FLASH_AM320T: + type = "AM29LV320T (32 Mbit, top boot sector)"; + break; + case FLASH_STM800AB: + type = "M29W800AB (8 Mbit, bottom boot sect)"; + break; + case FLASH_SST800A: + type = "SST39LF/VF800 (8 Mbit, uniform sector size)"; + break; + case FLASH_SST160A: + type = "SST39LF/VF160 (16 Mbit, uniform sector size)"; + break; + } + } + + printf ("\n Brand: %s Type: %s\n" + " Size: %lu KB in %d Sectors\n", + mfct, type, info->size >> 10, info->sector_count); + + printf (" Sector Start Addresses:"); + + for (i = 0; i < info->sector_count; i++) { + unsigned long size; + unsigned int erased; + unsigned long *flash = (unsigned long *) info->start[i]; + + /* + * Check if whole sector is erased + */ + size = (i != (info->sector_count - 1)) ? + (info->start[i + 1] - info->start[i]) >> 2 : + (info->start[0] + info->size - info->start[i]) >> 2; + + for (flash = (unsigned long *) info->start[i], erased = 1; + (flash != (unsigned long *) info->start[i] + size) + && erased; flash++) + erased = *flash == ~0x0UL; + + printf ("%s %08lX %s %s", + (i % 5) ? "" : "\n ", + info->start[i], + erased ? "E" : " ", info->protect[i] ? "RO" : " "); + } + + puts ("\n"); + return; } #if 0 @@ -359,268 +376,275 @@ flash_print_info(flash_info_t *info) /* * The following code cannot be run from FLASH! */ -ulong -flash_get_size (vu_long *addr, flash_info_t *info) +ulong flash_get_size (vu_long * addr, flash_info_t * info) { - short i; - FLASH_WORD_SIZE value; - ulong base = (ulong)addr; - volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr; - - printf("flash_get_size: \n"); - /* Write auto select command: read Manufacturer ID */ - eieio(); - addr2[ADDR0] = (FLASH_WORD_SIZE)0xAA; - addr2[ADDR1] = (FLASH_WORD_SIZE)0x55; - addr2[ADDR0] = (FLASH_WORD_SIZE)0x90; - value = addr2[0]; - - switch (value) { - case (FLASH_WORD_SIZE)AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; - case (FLASH_WORD_SIZE)FUJ_MANUFACT: - info->flash_id = FLASH_MAN_FUJ; - break; - case (FLASH_WORD_SIZE)SST_MANUFACT: - info->flash_id = FLASH_MAN_SST; - break; - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* no or unknown flash */ - } - printf("recognised manufacturer"); - - value = addr2[ADDR3]; /* device ID */ + short i; + FLASH_WORD_SIZE value; + ulong base = (ulong) addr; + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr; + + printf ("flash_get_size: \n"); + /* Write auto select command: read Manufacturer ID */ + eieio (); + addr2[ADDR0] = (FLASH_WORD_SIZE) 0xAA; + addr2[ADDR1] = (FLASH_WORD_SIZE) 0x55; + addr2[ADDR0] = (FLASH_WORD_SIZE) 0x90; + value = addr2[0]; + + switch (value) { + case (FLASH_WORD_SIZE) AMD_MANUFACT: + info->flash_id = FLASH_MAN_AMD; + break; + case (FLASH_WORD_SIZE) FUJ_MANUFACT: + info->flash_id = FLASH_MAN_FUJ; + break; + case (FLASH_WORD_SIZE) SST_MANUFACT: + info->flash_id = FLASH_MAN_SST; + break; + default: + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + return (0); /* no or unknown flash */ + } + printf ("recognised manufacturer"); + + value = addr2[ADDR3]; /* device ID */ debug ("\ndev_code=%x\n", value); - switch (value) { - case (FLASH_WORD_SIZE)AMD_ID_LV400T: - info->flash_id += FLASH_AM400T; - info->sector_count = 11; - info->size = 0x00080000; - break; /* => 0.5 MB */ - - case (FLASH_WORD_SIZE)AMD_ID_LV400B: - info->flash_id += FLASH_AM400B; - info->sector_count = 11; - info->size = 0x00080000; - break; /* => 0.5 MB */ - - case (FLASH_WORD_SIZE)AMD_ID_LV800T: - info->flash_id += FLASH_AM800T; - info->sector_count = 19; - info->size = 0x00100000; - break; /* => 1 MB */ - - case (FLASH_WORD_SIZE)AMD_ID_LV800B: - info->flash_id += FLASH_AM800B; - info->sector_count = 19; - info->size = 0x00100000; - break; /* => 1 MB */ - - case (FLASH_WORD_SIZE)AMD_ID_LV160T: - info->flash_id += FLASH_AM160T; - info->sector_count = 35; - info->size = 0x00200000; - break; /* => 2 MB */ - - case (FLASH_WORD_SIZE)AMD_ID_LV160B: - info->flash_id += FLASH_AM160B; - info->sector_count = 35; - info->size = 0x00200000; - break; /* => 2 MB */ - - case (FLASH_WORD_SIZE)SST_ID_xF800A: - info->flash_id += FLASH_SST800A; - info->sector_count = 16; - info->size = 0x00100000; - break; /* => 1 MB */ - - case (FLASH_WORD_SIZE)SST_ID_xF160A: - info->flash_id += FLASH_SST160A; - info->sector_count = 32; - info->size = 0x00200000; - break; /* => 2 MB */ - - case (FLASH_WORD_SIZE)AMD_ID_F040B: - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 0.5 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ - - } - - printf("flash id %lx; sector count %x, size %lx\n", info->flash_id,info->sector_count,info->size); - /* set up sector start address table */ - if (info->flash_id & FLASH_MAN_SST) - { - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00010000); - } - else - if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00004000; - info->start[2] = base + 0x00006000; - info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; + switch (value) { + case (FLASH_WORD_SIZE) AMD_ID_LV400T: + info->flash_id += FLASH_AM400T; + info->sector_count = 11; + info->size = 0x00080000; + break; /* => 0.5 MB */ + + case (FLASH_WORD_SIZE) AMD_ID_LV400B: + info->flash_id += FLASH_AM400B; + info->sector_count = 11; + info->size = 0x00080000; + break; /* => 0.5 MB */ + + case (FLASH_WORD_SIZE) AMD_ID_LV800T: + info->flash_id += FLASH_AM800T; + info->sector_count = 19; + info->size = 0x00100000; + break; /* => 1 MB */ + + case (FLASH_WORD_SIZE) AMD_ID_LV800B: + info->flash_id += FLASH_AM800B; + info->sector_count = 19; + info->size = 0x00100000; + break; /* => 1 MB */ + + case (FLASH_WORD_SIZE) AMD_ID_LV160T: + info->flash_id += FLASH_AM160T; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 2 MB */ + + case (FLASH_WORD_SIZE) AMD_ID_LV160B: + info->flash_id += FLASH_AM160B; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 2 MB */ + + case (FLASH_WORD_SIZE) SST_ID_xF800A: + info->flash_id += FLASH_SST800A; + info->sector_count = 16; + info->size = 0x00100000; + break; /* => 1 MB */ + + case (FLASH_WORD_SIZE) SST_ID_xF160A: + info->flash_id += FLASH_SST160A; + info->sector_count = 32; + info->size = 0x00200000; + break; /* => 2 MB */ + + case (FLASH_WORD_SIZE) AMD_ID_F040B: + info->flash_id += FLASH_AM040; + info->sector_count = 8; + info->size = 0x00080000; + break; /* => 0.5 MB */ + + default: + info->flash_id = FLASH_UNKNOWN; + return (0); /* => no or unknown flash */ + } - } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00004000; - info->start[i--] = base + info->size - 0x00006000; - info->start[i--] = base + info->size - 0x00008000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00010000; + + printf ("flash id %lx; sector count %x, size %lx\n", info->flash_id, + info->sector_count, info->size); + /* set up sector start address table */ + if (info->flash_id & FLASH_MAN_SST) { + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00010000); + } else if (info->flash_id & FLASH_BTYPE) { + /* set sector offsets for bottom boot block type */ + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; + } + } else { + /* set sector offsets for top boot block type */ + i = info->sector_count - 1; + info->start[i--] = base + info->size - 0x00004000; + info->start[i--] = base + info->size - 0x00006000; + info->start[i--] = base + info->size - 0x00008000; + for (; i >= 0; i--) { + info->start[i] = base + i * 0x00010000; + } } - } - /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); + /* check for protected sectors */ + for (i = 0; i < info->sector_count; i++) { + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ + addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]); if (info->flash_id & FLASH_MAN_SST) - info->protect[i] = 0; + info->protect[i] = 0; else - info->protect[i] = addr2[2] & 1; - } - - /* - * Prevent writes to uninitialized FLASH. - */ - if (info->flash_id != FLASH_UNKNOWN) { - addr2 = (FLASH_WORD_SIZE *)info->start[0]; - *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ - } - - return (info->size); + info->protect[i] = addr2[2] & 1; + } + + /* + * Prevent writes to uninitialized FLASH. + */ + if (info->flash_id != FLASH_UNKNOWN) { + addr2 = (FLASH_WORD_SIZE *) info->start[0]; + *addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */ + } + + return (info->size); } #endif -int -flash_erase(flash_info_t *info, int s_first, int s_last) +int flash_erase (flash_info_t * info, int s_first, int s_last) { - volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); - int flag, prot, sect, l_sect; - ulong start, now, last; - unsigned char sh8b; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); + volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]); + int flag, prot, sect, l_sect; + ulong start, now, last; + unsigned char sh8b; + + if ((s_first < 0) || (s_first > s_last)) { + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return 1; } - return 1; - } - - if ((info->flash_id == FLASH_UNKNOWN) || - (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) { - printf ("Can't erase unknown flash type - aborted\n"); - return 1; - } - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; + + if ((info->flash_id == FLASH_UNKNOWN) || + (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) { + printf ("Can't erase unknown flash type - aborted\n"); + return 1; + } + + prot = 0; + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - l_sect = -1; - - /* Check the ROM CS */ - if ((info->start[0] >= ROM_CS1_START) && (info->start[0] < ROM_CS0_START)) - sh8b = 3; - else - sh8b = 0; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080; - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr = (FLASH_WORD_SIZE *)(info->start[0] + ( - (info->start[sect] - info->start[0]) << sh8b)); - if (info->flash_id & FLASH_MAN_SST) - { - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080; - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; - addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ - udelay(30000); /* wait 30 ms */ - } - else - addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ - l_sect = sect; + + if (prot) { + printf ("- Warning: %d protected sectors will not be erased!\n", prot); + } else { + printf ("\n"); } - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* wait at least 80us - let's wait 1 ms */ - udelay (1000); - - /* - * We wait for the last triggered sector - */ - if (l_sect < 0) - goto DONE; - - start = get_timer (0); - last = start; - addr = (FLASH_WORD_SIZE *)(info->start[0] + ( - (info->start[l_sect] - info->start[0]) << sh8b)); - while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return 1; + + l_sect = -1; + + /* Check the ROM CS */ + if ((info->start[0] >= ROM_CS1_START) + && (info->start[0] < ROM_CS0_START)) + sh8b = 3; + else + sh8b = 0; + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts (); + + addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA; + addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055; + addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00800080; + addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA; + addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055; + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect <= s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info-> + start + [sect] + - + info-> + start + [0]) << + sh8b)); + if (info->flash_id & FLASH_MAN_SST) { + addr[ADDR0 << sh8b] = + (FLASH_WORD_SIZE) 0x00AA00AA; + addr[ADDR1 << sh8b] = + (FLASH_WORD_SIZE) 0x00550055; + addr[ADDR0 << sh8b] = + (FLASH_WORD_SIZE) 0x00800080; + addr[ADDR0 << sh8b] = + (FLASH_WORD_SIZE) 0x00AA00AA; + addr[ADDR1 << sh8b] = + (FLASH_WORD_SIZE) 0x00550055; + addr[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */ + udelay (30000); /* wait 30 ms */ + } else + addr[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */ + l_sect = sect; + } } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - serial_putc ('.'); - last = now; + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts (); + + /* wait at least 80us - let's wait 1 ms */ + udelay (1000); + + /* + * We wait for the last triggered sector + */ + if (l_sect < 0) + goto DONE; + + start = get_timer (0); + last = start; + addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->start[l_sect] - + info-> + start[0]) << sh8b)); + while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) != + (FLASH_WORD_SIZE) 0x00800080) { + if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return 1; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + serial_putc ('.'); + last = now; + } } - } -DONE: - /* reset to read mode */ - addr = (FLASH_WORD_SIZE *)info->start[0]; - addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ + DONE: + /* reset to read mode */ + addr = (FLASH_WORD_SIZE *) info->start[0]; + addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */ - printf (" done\n"); - return 0; + printf (" done\n"); + return 0; } /*----------------------------------------------------------------------- @@ -630,68 +654,68 @@ DONE: * 2 - Flash not erased */ -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) { - ulong cp, wp, data; - int i, l, rc; - - wp = (addr & ~3); /* get lower word aligned address */ - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); + ulong cp, wp, data; + int i, l, rc; + + wp = (addr & ~3); /* get lower word aligned address */ + + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i = 0, cp = wp; i < l; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); + } + for (; i < 4 && cnt > 0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt == 0 && i < 4; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); + } + + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + wp += 4; } - for (; i<4 && cnt>0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); + + /* + * handle word aligned part + */ + while (cnt >= 4) { + data = 0; + for (i = 0; i < 4; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + wp += 4; + cnt -= 4; } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); + if (cnt == 0) { + return (0); } - wp += 4; - } - /* - * handle word aligned part - */ - while (cnt >= 4) { + /* + * handle unaligned tail bytes + */ data = 0; - for (i=0; i<4; ++i) { - data = (data << 8) | *src++; + for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { + data = (data << 8) | *src++; + --cnt; } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); + for (; i < 4; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); } - wp += 4; - cnt -= 4; - } - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - - return (write_word(info, wp, data)); + return (write_word (info, wp, data)); } /*----------------------------------------------------------------------- @@ -700,55 +724,55 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) * 1 - write timeout * 2 - Flash not erased */ -static int write_word (flash_info_t *info, ulong dest, ulong data) +static int write_word (flash_info_t * info, ulong dest, ulong data) { - volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)info->start[0]; + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) info->start[0]; volatile FLASH_WORD_SIZE *dest2; - volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; - ulong start; - int flag; + volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data; + ulong start; + int flag; int i; - unsigned char sh8b; - - /* Check the ROM CS */ - if ((info->start[0] >= ROM_CS1_START) && (info->start[0] < ROM_CS0_START)) - sh8b = 3; - else - sh8b = 0; - - dest2 = (FLASH_WORD_SIZE *)(((dest - info->start[0]) << sh8b) + - info->start[0]); - - /* Check if Flash is (sufficiently) erased */ - if ((*dest2 & (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { - return (2); - } - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) - { - addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; - addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; - addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00A000A0; - - dest2[i << sh8b] = data2[i]; - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* data polling for D7 */ - start = get_timer (0); - while ((dest2[i << sh8b] & (FLASH_WORD_SIZE)0x00800080) != - (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - return (1); - } - } - } - - return (0); + unsigned char sh8b; + + /* Check the ROM CS */ + if ((info->start[0] >= ROM_CS1_START) + && (info->start[0] < ROM_CS0_START)) + sh8b = 3; + else + sh8b = 0; + + dest2 = (FLASH_WORD_SIZE *) (((dest - info->start[0]) << sh8b) + + info->start[0]); + + /* Check if Flash is (sufficiently) erased */ + if ((*dest2 & (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) { + return (2); + } + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts (); + + for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) { + addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA; + addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055; + addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00A000A0; + + dest2[i << sh8b] = data2[i]; + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts (); + + /* data polling for D7 */ + start = get_timer (0); + while ((dest2[i << sh8b] & (FLASH_WORD_SIZE) 0x00800080) != + (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) { + if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + } + + return (0); } /*----------------------------------------------------------------------- diff --git a/board/bmw/ns16550.c b/board/bmw/ns16550.c index b1c28eb..7064567 100644 --- a/board/bmw/ns16550.c +++ b/board/bmw/ns16550.c @@ -9,49 +9,49 @@ typedef struct NS16550 *NS16550_t; -const NS16550_t COM_PORTS[] = { (NS16550_t) ((CFG_EUMB_ADDR) + 0x4500), (NS16550_t) ((CFG_EUMB_ADDR) + 0x4600)}; +const NS16550_t COM_PORTS[] = + { (NS16550_t) ((CFG_EUMB_ADDR) + 0x4500), +(NS16550_t) ((CFG_EUMB_ADDR) + 0x4600) }; -volatile struct NS16550 * -NS16550_init(int chan, int baud_divisor) +volatile struct NS16550 *NS16550_init (int chan, int baud_divisor) { - volatile struct NS16550 *com_port; - com_port = (struct NS16550 *) COM_PORTS[chan]; - com_port->ier = 0x00; - com_port->lcr = LCR_BKSE; /* Access baud rate */ - com_port->dll = baud_divisor & 0xff; /* 9600 baud */ - com_port->dlm = (baud_divisor >> 8) & 0xff; - com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */ - com_port->mcr = MCR_RTS; /* RTS/DTR */ - com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR; /* Clear & enable FIFOs */ -return (com_port); + volatile struct NS16550 *com_port; + + com_port = (struct NS16550 *) COM_PORTS[chan]; + com_port->ier = 0x00; + com_port->lcr = LCR_BKSE; /* Access baud rate */ + com_port->dll = baud_divisor & 0xff; /* 9600 baud */ + com_port->dlm = (baud_divisor >> 8) & 0xff; + com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */ + com_port->mcr = MCR_RTS; /* RTS/DTR */ + com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR; /* Clear & enable FIFOs */ + return (com_port); } -void -NS16550_reinit(volatile struct NS16550 *com_port, int baud_divisor) +void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor) { - com_port->ier = 0x00; - com_port->lcr = LCR_BKSE; /* Access baud rate */ - com_port->dll = baud_divisor & 0xff; /* 9600 baud */ - com_port->dlm = (baud_divisor >> 8) & 0xff; - com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */ - com_port->mcr = MCR_RTS; /* RTS/DTR */ - com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR; /* Clear & enable FIFOs */ + com_port->ier = 0x00; + com_port->lcr = LCR_BKSE; /* Access baud rate */ + com_port->dll = baud_divisor & 0xff; /* 9600 baud */ + com_port->dlm = (baud_divisor >> 8) & 0xff; + com_port->lcr = LCR_8N1; /* 8 data, 1 stop, no parity */ + com_port->mcr = MCR_RTS; /* RTS/DTR */ + com_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR; /* Clear & enable FIFOs */ } -void NS16550_putc(volatile struct NS16550 *com_port, unsigned char c) +void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c) { - while ((com_port->lsr & LSR_THRE) == 0) ; - com_port->thr = c; + while ((com_port->lsr & LSR_THRE) == 0); + com_port->thr = c; } -unsigned char -NS16550_getc(volatile struct NS16550 *com_port) +unsigned char NS16550_getc (volatile struct NS16550 *com_port) { - while ((com_port->lsr & LSR_DR) == 0) ; - return (com_port->rbr); + while ((com_port->lsr & LSR_DR) == 0); + return (com_port->rbr); } -int NS16550_tstc(volatile struct NS16550 *com_port) +int NS16550_tstc (volatile struct NS16550 *com_port) { - return ((com_port->lsr & LSR_DR) != 0); + return ((com_port->lsr & LSR_DR) != 0); } diff --git a/board/bmw/ns16550.h b/board/bmw/ns16550.h index 0b7b389..104f45b 100644 --- a/board/bmw/ns16550.h +++ b/board/bmw/ns16550.h @@ -12,20 +12,19 @@ */ -struct NS16550 - { - unsigned char rbrthrdlb; /* 0 */ - unsigned char ierdmb; /* 1 */ - unsigned char iirfcrafr; /* 2 */ - unsigned char lcr; /* 3 */ - unsigned char mcr; /* 4 */ - unsigned char lsr; /* 5 */ - unsigned char msr; /* 6 */ - unsigned char scr; /* 7 */ - unsigned char reserved[2]; /* 8 & 9 */ - unsigned char dsr; /* 10 */ - unsigned char dcr; /* 11 */ - }; +struct NS16550 { + unsigned char rbrthrdlb; /* 0 */ + unsigned char ierdmb; /* 1 */ + unsigned char iirfcrafr; /* 2 */ + unsigned char lcr; /* 3 */ + unsigned char mcr; /* 4 */ + unsigned char lsr; /* 5 */ + unsigned char msr; /* 6 */ + unsigned char scr; /* 7 */ + unsigned char reserved[2]; /* 8 & 9 */ + unsigned char dsr; /* 10 */ + unsigned char dcr; /* 11 */ +}; #define rbr rbrthrdlb @@ -37,44 +36,44 @@ struct NS16550 #define fcr iirfcrafr #define afr iirfcrafr -#define FCR_FIFO_EN 0x01 /*fifo enable*/ -#define FCR_RXSR 0x02 /*reciever soft reset*/ -#define FCR_TXSR 0x04 /*transmitter soft reset*/ -#define FCR_DMS 0x08 /* DMA Mode Select */ +#define FCR_FIFO_EN 0x01 /*fifo enable */ +#define FCR_RXSR 0x02 /*reciever soft reset */ +#define FCR_TXSR 0x04 /*transmitter soft reset */ +#define FCR_DMS 0x08 /* DMA Mode Select */ -#define MCR_RTS 0x02 /* Readyu to Send */ +#define MCR_RTS 0x02 /* Readyu to Send */ #define MCR_LOOP 0x10 /* Local loopback mode enable */ /* #define MCR_DTR 0x01 noton 8245 duart */ /* #define MCR_DMA_EN 0x04 noton 8245 duart */ /* #define MCR_TX_DFR 0x08 noton 8245 duart */ -#define LCR_WLS_MSK 0x03 /* character length slect mask*/ -#define LCR_WLS_5 0x00 /* 5 bit character length */ -#define LCR_WLS_6 0x01 /* 6 bit character length */ -#define LCR_WLS_7 0x02 /* 7 bit character length */ -#define LCR_WLS_8 0x03 /* 8 bit character length */ -#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ -#define LCR_PEN 0x08 /* Parity eneble*/ -#define LCR_EPS 0x10 /* Even Parity Select*/ -#define LCR_STKP 0x20 /* Stick Parity*/ -#define LCR_SBRK 0x40 /* Set Break*/ -#define LCR_BKSE 0x80 /* Bank select enable - aka DLAB on 8245 */ +#define LCR_WLS_MSK 0x03 /* character length slect mask */ +#define LCR_WLS_5 0x00 /* 5 bit character length */ +#define LCR_WLS_6 0x01 /* 6 bit character length */ +#define LCR_WLS_7 0x02 /* 7 bit character length */ +#define LCR_WLS_8 0x03 /* 8 bit character length */ +#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ +#define LCR_PEN 0x08 /* Parity eneble */ +#define LCR_EPS 0x10 /* Even Parity Select */ +#define LCR_STKP 0x20 /* Stick Parity */ +#define LCR_SBRK 0x40 /* Set Break */ +#define LCR_BKSE 0x80 /* Bank select enable - aka DLAB on 8245 */ -#define LSR_DR 0x01 /* Data ready */ -#define LSR_OE 0x02 /* Overrun */ -#define LSR_PE 0x04 /* Parity error */ -#define LSR_FE 0x08 /* Framing error */ -#define LSR_BI 0x10 /* Break */ -#define LSR_THRE 0x20 /* Xmit holding register empty */ -#define LSR_TEMT 0x40 /* Xmitter empty */ -#define LSR_ERR 0x80 /* Error */ +#define LSR_DR 0x01 /* Data ready */ +#define LSR_OE 0x02 /* Overrun */ +#define LSR_PE 0x04 /* Parity error */ +#define LSR_FE 0x08 /* Framing error */ +#define LSR_BI 0x10 /* Break */ +#define LSR_THRE 0x20 /* Xmit holding register empty */ +#define LSR_TEMT 0x40 /* Xmitter empty */ +#define LSR_ERR 0x80 /* Error */ /* useful defaults for LCR*/ #define LCR_8N1 0x03 -volatile struct NS16550 * NS16550_init(int chan, int baud_divisor); -void NS16550_putc(volatile struct NS16550 *com_port, unsigned char c); -unsigned char NS16550_getc(volatile struct NS16550 *com_port); -int NS16550_tstc(volatile struct NS16550 *com_port); -void NS16550_reinit(volatile struct NS16550 *com_port, int baud_divisor); +volatile struct NS16550 *NS16550_init (int chan, int baud_divisor); +void NS16550_putc (volatile struct NS16550 *com_port, unsigned char c); +unsigned char NS16550_getc (volatile struct NS16550 *com_port); +int NS16550_tstc (volatile struct NS16550 *com_port); +void NS16550_reinit (volatile struct NS16550 *com_port, int baud_divisor); diff --git a/board/cogent/mb.c b/board/cogent/mb.c index ff991cf..e84c7dd 100644 --- a/board/cogent/mb.c +++ b/board/cogent/mb.c @@ -43,152 +43,166 @@ const iop_conf_t iop_conf_tab[4][32] = { - /* Port A configuration */ - { /* conf ppar psor pdir podr pdat */ - /* PA31 */ { 0, 0, 0, 0, 0, 0 }, - /* PA30 */ { 0, 0, 0, 0, 0, 0 }, - /* PA29 */ { 0, 0, 0, 0, 0, 0 }, - /* PA28 */ { 0, 0, 0, 0, 0, 0 }, - /* PA27 */ { 0, 0, 0, 0, 0, 0 }, - /* PA26 */ { 0, 0, 0, 0, 0, 0 }, - /* PA25 */ { 0, 0, 0, 0, 0, 0 }, - /* PA24 */ { 0, 0, 0, 0, 0, 0 }, - /* PA23 */ { 0, 0, 0, 0, 0, 0 }, - /* PA22 */ { 0, 0, 0, 0, 0, 0 }, - /* PA21 */ { 0, 0, 0, 0, 0, 0 }, - /* PA20 */ { 0, 0, 0, 0, 0, 0 }, - /* PA19 */ { 0, 0, 0, 0, 0, 0 }, - /* PA18 */ { 0, 0, 0, 0, 0, 0 }, - /* PA17 */ { 0, 0, 0, 0, 0, 0 }, - /* PA16 */ { 0, 0, 0, 0, 0, 0 }, - /* PA15 */ { 0, 0, 0, 0, 0, 0 }, - /* PA14 */ { 0, 0, 0, 0, 0, 0 }, - /* PA13 */ { 0, 0, 0, 0, 0, 0 }, - /* PA12 */ { 0, 0, 0, 0, 0, 0 }, - /* PA11 */ { 0, 0, 0, 0, 0, 0 }, - /* PA10 */ { 0, 0, 0, 0, 0, 0 }, - /* PA9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TXD */ - /* PA8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC2 RXD */ - /* PA7 */ { 0, 0, 0, 0, 0, 0 }, - /* PA6 */ { 0, 0, 0, 0, 0, 0 }, - /* PA5 */ { 0, 0, 0, 0, 0, 0 }, - /* PA4 */ { 0, 0, 0, 0, 0, 0 }, - /* PA3 */ { 0, 0, 0, 0, 0, 0 }, - /* PA2 */ { 0, 0, 0, 0, 0, 0 }, - /* PA1 */ { 0, 0, 0, 0, 0, 0 }, - /* PA0 */ { 0, 0, 0, 0, 0, 0 } - }, - - - { /* conf ppar psor pdir podr pdat */ - /* PB31 */ { 0, 0, 0, 0, 0, 0 }, - /* PB30 */ { 0, 0, 0, 0, 0, 0 }, - /* PB29 */ { 0, 0, 0, 0, 0, 0 }, - /* PB28 */ { 0, 0, 0, 0, 0, 0 }, - /* PB27 */ { 0, 0, 0, 0, 0, 0 }, - /* PB26 */ { 0, 0, 0, 0, 0, 0 }, - /* PB25 */ { 0, 0, 0, 0, 0, 0 }, - /* PB24 */ { 0, 0, 0, 0, 0, 0 }, - /* PB23 */ { 0, 0, 0, 0, 0, 0 }, - /* PB22 */ { 0, 0, 0, 0, 0, 0 }, - /* PB21 */ { 0, 0, 0, 0, 0, 0 }, - /* PB20 */ { 0, 0, 0, 0, 0, 0 }, - /* PB19 */ { 0, 0, 0, 0, 0, 0 }, - /* PB18 */ { 0, 0, 0, 0, 0, 0 }, - /* PB17 */ { 0, 0, 0, 0, 0, 0 }, - /* PB16 */ { 0, 0, 0, 0, 0, 0 }, - /* PB15 */ { 0, 0, 0, 0, 0, 0 }, - /* PB14 */ { 0, 0, 0, 0, 0, 0 }, - /* PB13 */ { 0, 0, 0, 0, 0, 0 }, - /* PB12 */ { 0, 0, 0, 0, 0, 0 }, - /* PB11 */ { 0, 0, 0, 0, 0, 0 }, - /* PB10 */ { 0, 0, 0, 0, 0, 0 }, - /* PB9 */ { 0, 0, 0, 0, 0, 0 }, - /* PB8 */ { 0, 0, 0, 0, 0, 0 }, - /* PB7 */ { 0, 0, 0, 0, 0, 0 }, - /* PB6 */ { 0, 0, 0, 0, 0, 0 }, - /* PB5 */ { 0, 0, 0, 0, 0, 0 }, - /* PB4 */ { 0, 0, 0, 0, 0, 0 }, - /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ - }, - - - { /* conf ppar psor pdir podr pdat */ - /* PC31 */ { 0, 0, 0, 0, 0, 0 }, - /* PC30 */ { 0, 0, 0, 0, 0, 0 }, - /* PC29 */ { 0, 0, 0, 0, 0, 0 }, - /* PC28 */ { 0, 0, 0, 0, 0, 0 }, - /* PC27 */ { 0, 0, 0, 0, 0, 0 }, - /* PC26 */ { 0, 0, 0, 0, 0, 0 }, - /* PC25 */ { 0, 0, 0, 0, 0, 0 }, - /* PC24 */ { 0, 0, 0, 0, 0, 0 }, - /* PC23 */ { 0, 0, 0, 0, 0, 0 }, - /* PC22 */ { 0, 0, 0, 0, 0, 0 }, - /* PC21 */ { 0, 0, 0, 0, 0, 0 }, - /* PC20 */ { 0, 0, 0, 0, 0, 0 }, - /* PC19 */ { 0, 0, 0, 0, 0, 0 }, - /* PC18 */ { 0, 0, 0, 0, 0, 0 }, - /* PC17 */ { 0, 0, 0, 0, 0, 0 }, - /* PC16 */ { 0, 0, 0, 0, 0, 0 }, - /* PC15 */ { 0, 0, 0, 0, 0, 0 }, - /* PC14 */ { 0, 0, 0, 0, 0, 0 }, - /* PC13 */ { 0, 0, 0, 0, 0, 0 }, - /* PC12 */ { 0, 0, 0, 0, 0, 0 }, - /* PC11 */ { 0, 0, 0, 0, 0, 0 }, - /* PC10 */ { 0, 0, 0, 0, 0, 0 }, - /* PC9 */ { 0, 0, 0, 0, 0, 0 }, - /* PC8 */ { 0, 0, 0, 0, 0, 0 }, - /* PC7 */ { 0, 0, 0, 0, 0, 0 }, - /* PC6 */ { 0, 0, 0, 0, 0, 0 }, - /* PC5 */ { 0, 0, 0, 0, 0, 0 }, - /* PC4 */ { 0, 0, 0, 0, 0, 0 }, - /* PC3 */ { 0, 0, 0, 0, 0, 0 }, - /* PC2 */ { 0, 0, 0, 0, 0, 0 }, - /* PC1 */ { 0, 0, 0, 0, 0, 0 }, - /* PC0 */ { 0, 0, 0, 0, 0, 0 } - }, - - - { /* conf ppar psor pdir podr pdat */ - /* PD31 */ { 0, 0, 0, 0, 0, 0 }, - /* PD30 */ { 0, 0, 0, 0, 0, 0 }, - /* PD29 */ { 0, 0, 0, 0, 0, 0 }, - /* PD28 */ { 0, 0, 0, 0, 0, 0 }, - /* PD27 */ { 0, 0, 0, 0, 0, 0 }, - /* PD26 */ { 0, 0, 0, 0, 0, 0 }, - /* PD25 */ { 0, 0, 0, 0, 0, 0 }, - /* PD24 */ { 0, 0, 0, 0, 0, 0 }, - /* PD23 */ { 0, 0, 0, 0, 0, 0 }, - /* PD22 */ { 0, 0, 0, 0, 0, 0 }, - /* PD21 */ { 0, 0, 0, 0, 0, 0 }, - /* PD20 */ { 0, 0, 0, 0, 0, 0 }, - /* PD19 */ { 0, 0, 0, 0, 0, 0 }, - /* PD18 */ { 0, 0, 0, 0, 0, 0 }, - /* PD17 */ { 0, 0, 0, 0, 0, 0 }, - /* PD16 */ { 0, 0, 0, 0, 0, 0 }, - /* PD15 */ { 1, 1, 1, 0, 0, 0 }, /* I2C SDA */ - /* PD14 */ { 1, 1, 1, 0, 0, 0 }, /* I2C SCL */ - /* PD13 */ { 0, 0, 0, 0, 0, 0 }, - /* PD12 */ { 0, 0, 0, 0, 0, 0 }, - /* PD11 */ { 0, 0, 0, 0, 0, 0 }, - /* PD10 */ { 0, 0, 0, 0, 0, 0 }, - /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */ - /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */ - /* PD7 */ { 0, 0, 0, 0, 0, 0 }, - /* PD6 */ { 0, 0, 0, 0, 0, 0 }, - /* PD5 */ { 0, 0, 0, 0, 0, 0 }, - /* PD4 */ { 0, 0, 0, 0, 0, 0 }, - /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ - } + /* Port A configuration */ + { /* conf ppar psor pdir podr pdat */ + /* PA31 */ {0, 0, 0, 0, 0, 0}, + /* PA30 */ {0, 0, 0, 0, 0, 0}, + /* PA29 */ {0, 0, 0, 0, 0, 0}, + /* PA28 */ {0, 0, 0, 0, 0, 0}, + /* PA27 */ {0, 0, 0, 0, 0, 0}, + /* PA26 */ {0, 0, 0, 0, 0, 0}, + /* PA25 */ {0, 0, 0, 0, 0, 0}, + /* PA24 */ {0, 0, 0, 0, 0, 0}, + /* PA23 */ {0, 0, 0, 0, 0, 0}, + /* PA22 */ {0, 0, 0, 0, 0, 0}, + /* PA21 */ {0, 0, 0, 0, 0, 0}, + /* PA20 */ {0, 0, 0, 0, 0, 0}, + /* PA19 */ {0, 0, 0, 0, 0, 0}, + /* PA18 */ {0, 0, 0, 0, 0, 0}, + /* PA17 */ {0, 0, 0, 0, 0, 0}, + /* PA16 */ {0, 0, 0, 0, 0, 0}, + /* PA15 */ {0, 0, 0, 0, 0, 0}, + /* PA14 */ {0, 0, 0, 0, 0, 0}, + /* PA13 */ {0, 0, 0, 0, 0, 0}, + /* PA12 */ {0, 0, 0, 0, 0, 0}, + /* PA11 */ {0, 0, 0, 0, 0, 0}, + /* PA10 */ {0, 0, 0, 0, 0, 0}, + /* PA9 */ {1, 1, 0, 1, 0, 0}, + /* SMC2 TXD */ + /* PA8 */ {1, 1, 0, 0, 0, 0}, + /* SMC2 RXD */ + /* PA7 */ {0, 0, 0, 0, 0, 0}, + /* PA6 */ {0, 0, 0, 0, 0, 0}, + /* PA5 */ {0, 0, 0, 0, 0, 0}, + /* PA4 */ {0, 0, 0, 0, 0, 0}, + /* PA3 */ {0, 0, 0, 0, 0, 0}, + /* PA2 */ {0, 0, 0, 0, 0, 0}, + /* PA1 */ {0, 0, 0, 0, 0, 0}, + /* PA0 */ {0, 0, 0, 0, 0, 0} + }, + + + { /* conf ppar psor pdir podr pdat */ + /* PB31 */ {0, 0, 0, 0, 0, 0}, + /* PB30 */ {0, 0, 0, 0, 0, 0}, + /* PB29 */ {0, 0, 0, 0, 0, 0}, + /* PB28 */ {0, 0, 0, 0, 0, 0}, + /* PB27 */ {0, 0, 0, 0, 0, 0}, + /* PB26 */ {0, 0, 0, 0, 0, 0}, + /* PB25 */ {0, 0, 0, 0, 0, 0}, + /* PB24 */ {0, 0, 0, 0, 0, 0}, + /* PB23 */ {0, 0, 0, 0, 0, 0}, + /* PB22 */ {0, 0, 0, 0, 0, 0}, + /* PB21 */ {0, 0, 0, 0, 0, 0}, + /* PB20 */ {0, 0, 0, 0, 0, 0}, + /* PB19 */ {0, 0, 0, 0, 0, 0}, + /* PB18 */ {0, 0, 0, 0, 0, 0}, + /* PB17 */ {0, 0, 0, 0, 0, 0}, + /* PB16 */ {0, 0, 0, 0, 0, 0}, + /* PB15 */ {0, 0, 0, 0, 0, 0}, + /* PB14 */ {0, 0, 0, 0, 0, 0}, + /* PB13 */ {0, 0, 0, 0, 0, 0}, + /* PB12 */ {0, 0, 0, 0, 0, 0}, + /* PB11 */ {0, 0, 0, 0, 0, 0}, + /* PB10 */ {0, 0, 0, 0, 0, 0}, + /* PB9 */ {0, 0, 0, 0, 0, 0}, + /* PB8 */ {0, 0, 0, 0, 0, 0}, + /* PB7 */ {0, 0, 0, 0, 0, 0}, + /* PB6 */ {0, 0, 0, 0, 0, 0}, + /* PB5 */ {0, 0, 0, 0, 0, 0}, + /* PB4 */ {0, 0, 0, 0, 0, 0}, + /* PB3 */ {0, 0, 0, 0, 0, 0}, + /* pin doesn't exist */ + /* PB2 */ {0, 0, 0, 0, 0, 0}, + /* pin doesn't exist */ + /* PB1 */ {0, 0, 0, 0, 0, 0}, + /* pin doesn't exist */ + /* PB0 */ {0, 0, 0, 0, 0, 0} + /* pin doesn't exist */ + }, + + + { /* conf ppar psor pdir podr pdat */ + /* PC31 */ {0, 0, 0, 0, 0, 0}, + /* PC30 */ {0, 0, 0, 0, 0, 0}, + /* PC29 */ {0, 0, 0, 0, 0, 0}, + /* PC28 */ {0, 0, 0, 0, 0, 0}, + /* PC27 */ {0, 0, 0, 0, 0, 0}, + /* PC26 */ {0, 0, 0, 0, 0, 0}, + /* PC25 */ {0, 0, 0, 0, 0, 0}, + /* PC24 */ {0, 0, 0, 0, 0, 0}, + /* PC23 */ {0, 0, 0, 0, 0, 0}, + /* PC22 */ {0, 0, 0, 0, 0, 0}, + /* PC21 */ {0, 0, 0, 0, 0, 0}, + /* PC20 */ {0, 0, 0, 0, 0, 0}, + /* PC19 */ {0, 0, 0, 0, 0, 0}, + /* PC18 */ {0, 0, 0, 0, 0, 0}, + /* PC17 */ {0, 0, 0, 0, 0, 0}, + /* PC16 */ {0, 0, 0, 0, 0, 0}, + /* PC15 */ {0, 0, 0, 0, 0, 0}, + /* PC14 */ {0, 0, 0, 0, 0, 0}, + /* PC13 */ {0, 0, 0, 0, 0, 0}, + /* PC12 */ {0, 0, 0, 0, 0, 0}, + /* PC11 */ {0, 0, 0, 0, 0, 0}, + /* PC10 */ {0, 0, 0, 0, 0, 0}, + /* PC9 */ {0, 0, 0, 0, 0, 0}, + /* PC8 */ {0, 0, 0, 0, 0, 0}, + /* PC7 */ {0, 0, 0, 0, 0, 0}, + /* PC6 */ {0, 0, 0, 0, 0, 0}, + /* PC5 */ {0, 0, 0, 0, 0, 0}, + /* PC4 */ {0, 0, 0, 0, 0, 0}, + /* PC3 */ {0, 0, 0, 0, 0, 0}, + /* PC2 */ {0, 0, 0, 0, 0, 0}, + /* PC1 */ {0, 0, 0, 0, 0, 0}, + /* PC0 */ {0, 0, 0, 0, 0, 0} + }, + + + { /* conf ppar psor pdir podr pdat */ + /* PD31 */ {0, 0, 0, 0, 0, 0}, + /* PD30 */ {0, 0, 0, 0, 0, 0}, + /* PD29 */ {0, 0, 0, 0, 0, 0}, + /* PD28 */ {0, 0, 0, 0, 0, 0}, + /* PD27 */ {0, 0, 0, 0, 0, 0}, + /* PD26 */ {0, 0, 0, 0, 0, 0}, + /* PD25 */ {0, 0, 0, 0, 0, 0}, + /* PD24 */ {0, 0, 0, 0, 0, 0}, + /* PD23 */ {0, 0, 0, 0, 0, 0}, + /* PD22 */ {0, 0, 0, 0, 0, 0}, + /* PD21 */ {0, 0, 0, 0, 0, 0}, + /* PD20 */ {0, 0, 0, 0, 0, 0}, + /* PD19 */ {0, 0, 0, 0, 0, 0}, + /* PD18 */ {0, 0, 0, 0, 0, 0}, + /* PD17 */ {0, 0, 0, 0, 0, 0}, + /* PD16 */ {0, 0, 0, 0, 0, 0}, + /* PD15 */ {1, 1, 1, 0, 0, 0}, + /* I2C SDA */ + /* PD14 */ {1, 1, 1, 0, 0, 0}, + /* I2C SCL */ + /* PD13 */ {0, 0, 0, 0, 0, 0}, + /* PD12 */ {0, 0, 0, 0, 0, 0}, + /* PD11 */ {0, 0, 0, 0, 0, 0}, + /* PD10 */ {0, 0, 0, 0, 0, 0}, + /* PD9 */ {1, 1, 0, 1, 0, 0}, + /* SMC1 TXD */ + /* PD8 */ {1, 1, 0, 0, 0, 0}, + /* SMC1 RXD */ + /* PD7 */ {0, 0, 0, 0, 0, 0}, + /* PD6 */ {0, 0, 0, 0, 0, 0}, + /* PD5 */ {0, 0, 0, 0, 0, 0}, + /* PD4 */ {0, 0, 0, 0, 0, 0}, + /* PD3 */ {0, 0, 0, 0, 0, 0}, + /* pin doesn't exist */ + /* PD2 */ {0, 0, 0, 0, 0, 0}, + /* pin doesn't exist */ + /* PD1 */ {0, 0, 0, 0, 0, 0}, + /* pin doesn't exist */ + /* PD0 */ {0, 0, 0, 0, 0, 0} + /* pin doesn't exist */ + } }; -#endif /* CONFIG_8260 */ +#endif /* CONFIG_8260 */ /* ------------------------------------------------------------------------- */ @@ -196,12 +210,11 @@ const iop_conf_t iop_conf_tab[4][32] = { * Check Board Identity: */ -int -checkboard(void) +int checkboard (void) { - puts ("Board: Cogent " COGENT_MOTHERBOARD " motherboard with a " - COGENT_CPU_MODULE " CPU Module\n"); - return (0); + puts ("Board: Cogent " COGENT_MOTHERBOARD " motherboard with a " + COGENT_CPU_MODULE " CPU Module\n"); + return (0); } /* ------------------------------------------------------------------------- */ @@ -213,46 +226,44 @@ checkboard(void) int misc_init_f (void) { - printf ("DIPSW: "); - dipsw_init(); - return (0); + printf ("DIPSW: "); + dipsw_init (); + return (0); } /* ------------------------------------------------------------------------- */ -long int -initdram(int board_type) +long int initdram (int board_type) { #if CONFIG_CMA111 - return (32L * 1024L * 1024L); + return (32L * 1024L * 1024L); #else - unsigned char dipsw_val; - int dual, size0, size1; - long int memsize; - - dipsw_val = dipsw_cooked(); - - dual = dipsw_val & 0x01; - size0 = (dipsw_val & 0x08) >> 3; - size1 = (dipsw_val & 0x04) >> 2; - - if (size0) - if (size1) - memsize = 16L * 1024L * 1024L; - else - memsize = 1L * 1024L * 1024L; - else - if (size1) - memsize = 4L * 1024L * 1024L; + unsigned char dipsw_val; + int dual, size0, size1; + long int memsize; + + dipsw_val = dipsw_cooked (); + + dual = dipsw_val & 0x01; + size0 = (dipsw_val & 0x08) >> 3; + size1 = (dipsw_val & 0x04) >> 2; + + if (size0) + if (size1) + memsize = 16L * 1024L * 1024L; + else + memsize = 1L * 1024L * 1024L; + else if (size1) + memsize = 4L * 1024L * 1024L; else { - printf("[Illegal dip switch settings - assuming 16Mbyte SIMMs] "); - memsize = 16L * 1024L * 1024L; /* shouldn't happen - guess 16M */ + printf ("[Illegal dip switch settings - assuming 16Mbyte SIMMs] "); + memsize = 16L * 1024L * 1024L; /* shouldn't happen - guess 16M */ } - if (dual) - memsize *= 2L; + if (dual) + memsize *= 2L; - return (memsize); + return (memsize); #endif } @@ -265,21 +276,21 @@ initdram(int board_type) int misc_init_r (void) { - printf ("LCD: "); - lcd_init(); + printf ("LCD: "); + lcd_init (); #if 0 - printf ("RTC: "); - rtc_init(); + printf ("RTC: "); + rtc_init (); - printf ("PAR: "); - par_init(); + printf ("PAR: "); + par_init (); - printf ("KBM: "); - kbm_init(); + printf ("KBM: "); + kbm_init (); - printf ("PCI: "); - pci_init(); + printf ("PCI: "); + pci_init (); #endif - return (0); + return (0); } diff --git a/board/eltec/bab7xx/bab7xx.c b/board/eltec/bab7xx/bab7xx.c index c75137a..fc48ed5 100644 --- a/board/eltec/bab7xx/bab7xx.c +++ b/board/eltec/bab7xx/bab7xx.c @@ -37,17 +37,18 @@ */ ulong bab7xx_get_bus_freq (void) { - /* - * The GPIO Port 1 on BAB7xx reflects the bus speed. - */ - volatile struct GPIO *gpio = (struct GPIO *)(CFG_ISA_IO + CFG_NS87308_GPIO_BASE); + /* + * The GPIO Port 1 on BAB7xx reflects the bus speed. + */ + volatile struct GPIO *gpio = + (struct GPIO *) (CFG_ISA_IO + CFG_NS87308_GPIO_BASE); - unsigned char data = gpio->dta1; + unsigned char data = gpio->dta1; - if (data & 0x02) - return 66666666; + if (data & 0x02) + return 66666666; - return 83333333; + return 83333333; } /*---------------------------------------------------------------------------*/ @@ -57,24 +58,26 @@ ulong bab7xx_get_bus_freq (void) */ ulong bab7xx_get_gclk_freq (void) { - static const int pllratio_to_factor[] = { - 00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35, 00, - }; + static const int pllratio_to_factor[] = { + 00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35, + 00, + }; - return pllratio_to_factor[get_hid1 () >> 28] * (bab7xx_get_bus_freq() / 10); + return pllratio_to_factor[get_hid1 () >> 28] * + (bab7xx_get_bus_freq () / 10); } /*----------------------------------------------------------------------------*/ int checkcpu (void) { - uint pvr = get_pvr(); + uint pvr = get_pvr (); - printf ("MPC7xx V%d.%d",(pvr >> 8) & 0xFF, pvr & 0xFF); - printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq()/1000000, - bab7xx_get_bus_freq()/1000000); + printf ("MPC7xx V%d.%d", (pvr >> 8) & 0xFF, pvr & 0xFF); + printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq () / 1000000, + bab7xx_get_bus_freq () / 1000000); - return (0); + return (0); } /* ------------------------------------------------------------------------- */ @@ -82,20 +85,20 @@ int checkcpu (void) int checkboard (void) { #ifdef CFG_ADDRESS_MAP_A - puts ("Board: ELTEC BAB7xx PReP\n"); + puts ("Board: ELTEC BAB7xx PReP\n"); #else - puts ("Board: ELTEC BAB7xx CHRP\n"); + puts ("Board: ELTEC BAB7xx CHRP\n"); #endif - return (0); + return (0); } /* ------------------------------------------------------------------------- */ int checkflash (void) { - /* TODO: XXX XXX XXX */ - printf ("2 MB ## Test not implemented yet ##\n"); - return (0); + /* TODO: XXX XXX XXX */ + printf ("2 MB ## Test not implemented yet ##\n"); + return (0); } /* ------------------------------------------------------------------------- */ @@ -103,77 +106,75 @@ int checkflash (void) static unsigned int mpc106_read_cfg_dword (unsigned int reg) { - unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC); + unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC); - out32r(MPC106_REG_ADDR, reg_addr); + out32r (MPC106_REG_ADDR, reg_addr); - return (in32r(MPC106_REG_DATA | (reg & 0x3))); + return (in32r (MPC106_REG_DATA | (reg & 0x3))); } /* ------------------------------------------------------------------------- */ long int dram_size (int board_type) { - /* No actual initialisation to do - done when setting up - * PICRs MCCRs ME/SARs etc in ram_init.S. - */ + /* No actual initialisation to do - done when setting up + * PICRs MCCRs ME/SARs etc in ram_init.S. + */ - register unsigned long i, msar1, mear1, memSize; + register unsigned long i, msar1, mear1, memSize; #if defined(CFG_MEMTEST) - register unsigned long reg; + register unsigned long reg; - printf("Testing DRAM\n"); + printf ("Testing DRAM\n"); - /* write each mem addr with it's address */ - for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4) - *reg = reg; + /* write each mem addr with it's address */ + for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) + *reg = reg; - for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4) - { - if (*reg != reg) - return -1; - } + for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) { + if (*reg != reg) + return -1; + } #endif - /* - * Since MPC106 memory controller chip has already been set to - * control all memory, just read and interpret its memory boundery register. - */ - memSize = 0; - msar1 = mpc106_read_cfg_dword(MPC106_MSAR1); - mear1 = mpc106_read_cfg_dword(MPC106_MEAR1); - i = mpc106_read_cfg_dword(MPC106_MBER) & 0xf; - - do - { - if (i & 0x01) /* is bank enabled ? */ - memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1; - msar1 >>= 8; - mear1 >>= 8; - i >>= 1; - } while (i); - - return (memSize * 0x100000); + /* + * Since MPC106 memory controller chip has already been set to + * control all memory, just read and interpret its memory boundery register. + */ + memSize = 0; + msar1 = mpc106_read_cfg_dword (MPC106_MSAR1); + mear1 = mpc106_read_cfg_dword (MPC106_MEAR1); + i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf; + + do { + if (i & 0x01) /* is bank enabled ? */ + memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1; + msar1 >>= 8; + mear1 >>= 8; + i >>= 1; + } while (i); + + return (memSize * 0x100000); } /* ------------------------------------------------------------------------- */ -long int initdram(int board_type) +long int initdram (int board_type) { - return dram_size(board_type); + return dram_size (board_type); } /* ------------------------------------------------------------------------- */ void after_reloc (ulong dest_addr) { - DECLARE_GLOBAL_DATA_PTR; + DECLARE_GLOBAL_DATA_PTR; - /* - * Jump to the main U-Boot board init code - */ - board_init_r((gd_t *)gd, dest_addr); + /* + * Jump to the main U-Boot board init code + */ + board_init_r ((gd_t *) gd, dest_addr); } /* ------------------------------------------------------------------------- */ @@ -182,14 +183,13 @@ void after_reloc (ulong dest_addr) * do_reset is done here because in this case it is board specific, since the * 7xx CPUs can only be reset by external HW (the RTC in this case). */ -void -do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) +void do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) { #if defined(CONFIG_RTC_MK48T59) - /* trigger watchdog immediately */ - rtc_set_watchdog(1, RTC_WD_RB_16TH); + /* trigger watchdog immediately */ + rtc_set_watchdog (1, RTC_WD_RB_16TH); #else - #error "You must define the macro CONFIG_RTC_MK48T59." +#error "You must define the macro CONFIG_RTC_MK48T59." #endif } @@ -200,16 +200,16 @@ do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) * Since the 7xx CPUs don't have an internal watchdog, this function is * board specific. We use the RTC here. */ -void watchdog_reset(void) +void watchdog_reset (void) { #if defined(CONFIG_RTC_MK48T59) - /* we use a 32 sec watchdog timer */ - rtc_set_watchdog(8, RTC_WD_RB_4); + /* we use a 32 sec watchdog timer */ + rtc_set_watchdog (8, RTC_WD_RB_4); #else - #error "You must define the macro CONFIG_RTC_MK48T59." +#error "You must define the macro CONFIG_RTC_MK48T59." #endif } -#endif /* CONFIG_WATCHDOG */ +#endif /* CONFIG_WATCHDOG */ /* ------------------------------------------------------------------------- */ @@ -218,29 +218,28 @@ extern GraphicDevice smi; void video_get_info_str (int line_number, char *info) { - /* init video info strings for graphic console */ - switch (line_number) - { - case 1: - sprintf (info," MPC7xx V%d.%d at %ld / %ld MHz", - (get_pvr() >> 8) & 0xFF, - get_pvr() & 0xFF, - bab7xx_get_gclk_freq()/1000000, - bab7xx_get_bus_freq()/1000000); + /* init video info strings for graphic console */ + switch (line_number) { + case 1: + sprintf (info, " MPC7xx V%d.%d at %ld / %ld MHz", + (get_pvr () >> 8) & 0xFF, + get_pvr () & 0xFF, + bab7xx_get_gclk_freq () / 1000000, + bab7xx_get_bus_freq () / 1000000); + return; + case 2: + sprintf (info, + " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH", + dram_size (0) / 0x100000, flash_init () / 0x100000); + return; + case 3: + sprintf (info, " %s", smi.modeIdent); + return; + } + + /* no more info lines */ + *info = 0; return; - case 2: - sprintf (info, " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH", - dram_size(0)/0x100000, - flash_init()/0x100000); - return; - case 3: - sprintf (info, " %s", smi.modeIdent); - return; - } - - /* no more info lines */ - *info = 0; - return; } #endif diff --git a/board/eltec/elppc/misc.c b/board/eltec/elppc/misc.c index f33aef7..1505660 100644 --- a/board/eltec/elppc/misc.c +++ b/board/eltec/elppc/misc.c @@ -31,32 +31,32 @@ /* imports */ extern char console_buffer[CFG_CBSIZE]; extern int l2_cache_enable (int l2control); -extern int eepro100_write_eeprom (struct eth_device* dev, int location, - int addr_len, unsigned short data); -extern int read_eeprom (struct eth_device* dev, int location, int addr_len); +extern int eepro100_write_eeprom (struct eth_device *dev, int location, + int addr_len, unsigned short data); +extern int read_eeprom (struct eth_device *dev, int location, int addr_len); /*----------------------------------------------------------------------------*/ /* * read/write to nvram is only byte access */ -void *nvram_read(void *dest, const long src, size_t count) +void *nvram_read (void *dest, const long src, size_t count) { - uchar *d = (uchar *) dest; - uchar *s = (uchar *) (CFG_ENV_MAP_ADRS + src); + uchar *d = (uchar *) dest; + uchar *s = (uchar *) (CFG_ENV_MAP_ADRS + src); - while (count--) - *d++ = *s++; + while (count--) + *d++ = *s++; - return dest; + return dest; } -void nvram_write(long dest, const void *src, size_t count) +void nvram_write (long dest, const void *src, size_t count) { - uchar *d = (uchar *) (CFG_ENV_MAP_ADRS + dest); - uchar *s = (uchar *) src; + uchar *d = (uchar *) (CFG_ENV_MAP_ADRS + dest); + uchar *s = (uchar *) src; - while (count--) - *d++ = *s++; + while (count--) + *d++ = *s++; } /*----------------------------------------------------------------------------*/ @@ -67,192 +67,199 @@ void nvram_write(long dest, const void *src, size_t count) */ int misc_init_r (void) { - revinfo eerev; - u_char *ptr; - u_int i, l, initSrom, copyNv; - char buf[256]; - char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0, - 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 }; - - /* Clock setting for MPC107 i2c */ - mpc107_i2c_init (MPC107_EUMB_ADDR, 0x2b); - - /* Reset the EPIC */ - out32r (MPC107_EUMB_GCR, 0xa0000000); - while (in32r (MPC107_EUMB_GCR) & 0x80000000); /* Wait for reset to complete */ - out32r (MPC107_EUMB_GCR, 0x20000000); /* Put into into mixed mode */ - while (in32r (MPC107_EUMB_IACKR) != 0xff); /* Clear all pending interrupts */ - - /* - * Check/Remake revision info - */ - initSrom = 0; - copyNv = 0; - - /* read out current revision srom contens */ - mpc107_srom_load (0x0000, (u_char*)&eerev, sizeof(revinfo), - SECOND_DEVICE, FIRST_BLOCK); - - /* read out current nvram shadow image */ - nvram_read (buf, CFG_NV_SROM_COPY_ADDR, CFG_SROM_SIZE); - - if (strcmp (eerev.magic, "ELTEC") != 0) - { - /* srom is not initialized -> create a default revision info */ - for (i = 0, ptr = (u_char *)&eerev; i < sizeof(revinfo); i++) - *ptr++ = 0x00; - strcpy(eerev.magic, "ELTEC"); - eerev.revrev[0] = 1; - eerev.revrev[1] = 0; - eerev.size = 0x00E0; - eerev.category[0] = 0x01; - - /* node id from dead e128 as default */ - eerev.etheraddr[0] = 0x00; - eerev.etheraddr[1] = 0x00; - eerev.etheraddr[2] = 0x5B; - eerev.etheraddr[3] = 0x00; - eerev.etheraddr[4] = 0x2E; - eerev.etheraddr[5] = 0x4D; - - /* cache config word for ELPPC */ - *(int*)&eerev.res[0] = 0; - - initSrom = 1; /* force dialog */ - copyNv = 1; /* copy to nvram */ - } - - if ((copyNv == 0) && (el_srom_checksum((u_char*)&eerev, CFG_SROM_SIZE) != - el_srom_checksum((u_char*)buf, CFG_SROM_SIZE))) - { - printf ("Invalid revision info copy in nvram !\n"); - printf ("Press key:\n <c> to copy current revision info to nvram.\n"); - printf (" <r> to reenter revision info.\n"); - printf ("=> "); - if (0 != readline (NULL)) - { - switch ((char)toupper(console_buffer[0])) - { - case 'C': - copyNv = 1; - break; - case 'R': - copyNv = 1; - initSrom = 1; - break; - } - } - } - - if (initSrom) - { - memcpy (buf, &eerev.revision[0][0], 14); /* save all revision info */ - printf ("Enter revision number (0-9): %c ", eerev.revision[0][0]); - if (0 != readline (NULL)) - { - eerev.revision[0][0] = (char)toupper(console_buffer[0]); - memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */ - } - - printf ("Enter revision character (A-Z): %c ", eerev.revision[0][1]); - if (1 == readline (NULL)) - { - eerev.revision[0][1] = (char)toupper(console_buffer[0]); + revinfo eerev; + u_char *ptr; + u_int i, l, initSrom, copyNv; + char buf[256]; + char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0, + 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 + }; + + /* Clock setting for MPC107 i2c */ + mpc107_i2c_init (MPC107_EUMB_ADDR, 0x2b); + + /* Reset the EPIC */ + out32r (MPC107_EUMB_GCR, 0xa0000000); + while (in32r (MPC107_EUMB_GCR) & 0x80000000); /* Wait for reset to complete */ + out32r (MPC107_EUMB_GCR, 0x20000000); /* Put into into mixed mode */ + while (in32r (MPC107_EUMB_IACKR) != 0xff); /* Clear all pending interrupts */ + + /* + * Check/Remake revision info + */ + initSrom = 0; + copyNv = 0; + + /* read out current revision srom contens */ + mpc107_srom_load (0x0000, (u_char *) & eerev, sizeof (revinfo), + SECOND_DEVICE, FIRST_BLOCK); + + /* read out current nvram shadow image */ + nvram_read (buf, CFG_NV_SROM_COPY_ADDR, CFG_SROM_SIZE); + + if (strcmp (eerev.magic, "ELTEC") != 0) { + /* srom is not initialized -> create a default revision info */ + for (i = 0, ptr = (u_char *) & eerev; i < sizeof (revinfo); + i++) + *ptr++ = 0x00; + strcpy (eerev.magic, "ELTEC"); + eerev.revrev[0] = 1; + eerev.revrev[1] = 0; + eerev.size = 0x00E0; + eerev.category[0] = 0x01; + + /* node id from dead e128 as default */ + eerev.etheraddr[0] = 0x00; + eerev.etheraddr[1] = 0x00; + eerev.etheraddr[2] = 0x5B; + eerev.etheraddr[3] = 0x00; + eerev.etheraddr[4] = 0x2E; + eerev.etheraddr[5] = 0x4D; + + /* cache config word for ELPPC */ + *(int *) &eerev.res[0] = 0; + + initSrom = 1; /* force dialog */ + copyNv = 1; /* copy to nvram */ } - printf ("Enter board name (V-XXXX-XXXX): %s ", (char *)&eerev.board); - if (11 == readline (NULL)) - { - for (i=0; i<11; i++) - eerev.board[i] = (char)toupper(console_buffer[i]); - eerev.board[11] = '\0'; + if ((copyNv == 0) + && (el_srom_checksum ((u_char *) & eerev, CFG_SROM_SIZE) != + el_srom_checksum ((u_char *) buf, CFG_SROM_SIZE))) { + printf ("Invalid revision info copy in nvram !\n"); + printf ("Press key:\n <c> to copy current revision info to nvram.\n"); + printf (" <r> to reenter revision info.\n"); + printf ("=> "); + if (0 != readline (NULL)) { + switch ((char) toupper (console_buffer[0])) { + case 'C': + copyNv = 1; + break; + case 'R': + copyNv = 1; + initSrom = 1; + break; + } + } } - printf ("Enter serial number: %s ", (char *)&eerev.serial ); - if (6 == readline (NULL)) - { - for (i=0; i<6; i++) - eerev.serial[i] = console_buffer[i]; - eerev.serial[6] = '\0'; - } - - printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", - eerev.etheraddr[0], eerev.etheraddr[1], - eerev.etheraddr[2], eerev.etheraddr[3], - eerev.etheraddr[4], eerev.etheraddr[5]); - if (12 == readline (NULL)) - { - for (i=0; i<12; i+=2) - eerev.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] + - hex[toupper(console_buffer[i+1])-'0']); - } + if (initSrom) { + memcpy (buf, &eerev.revision[0][0], 14); /* save all revision info */ + printf ("Enter revision number (0-9): %c ", + eerev.revision[0][0]); + if (0 != readline (NULL)) { + eerev.revision[0][0] = + (char) toupper (console_buffer[0]); + memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */ + } + + printf ("Enter revision character (A-Z): %c ", + eerev.revision[0][1]); + if (1 == readline (NULL)) { + eerev.revision[0][1] = + (char) toupper (console_buffer[0]); + } + + printf ("Enter board name (V-XXXX-XXXX): %s ", + (char *) &eerev.board); + if (11 == readline (NULL)) { + for (i = 0; i < 11; i++) + eerev.board[i] = + (char) toupper (console_buffer[i]); + eerev.board[11] = '\0'; + } + + printf ("Enter serial number: %s ", (char *) &eerev.serial); + if (6 == readline (NULL)) { + for (i = 0; i < 6; i++) + eerev.serial[i] = console_buffer[i]; + eerev.serial[6] = '\0'; + } + + printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", eerev.etheraddr[0], eerev.etheraddr[1], eerev.etheraddr[2], eerev.etheraddr[3], eerev.etheraddr[4], eerev.etheraddr[5]); + if (12 == readline (NULL)) { + for (i = 0; i < 12; i += 2) + eerev.etheraddr[i >> 1] = + (char) (16 * + hex[toupper + (console_buffer[i]) - + '0'] + + hex[toupper + (console_buffer[i + 1]) - + '0']); + } + + l = strlen ((char *) &eerev.text); + printf ("Add to text section (max 64 chr): %s ", + (char *) &eerev.text); + if (0 != readline (NULL)) { + for (i = l; i < 63; i++) + eerev.text[i] = console_buffer[i - l]; + eerev.text[63] = '\0'; + } + + /* prepare network eeprom */ + memset (buf, 0, 128); + + buf[0] = eerev.etheraddr[1]; + buf[1] = eerev.etheraddr[0]; + buf[2] = eerev.etheraddr[3]; + buf[3] = eerev.etheraddr[2]; + buf[4] = eerev.etheraddr[5]; + buf[5] = eerev.etheraddr[4]; + + *(unsigned short *) &buf[20] = 0x48B2; + *(unsigned short *) &buf[22] = 0x0004; + *(unsigned short *) &buf[24] = 0x1433; + + printf ("\nSRom: Writing i82559 info ........ "); + if (eepro100_srom_store ((unsigned short *) buf) == -1) + printf ("FAILED\n"); + else + printf ("OK\n"); + + /* update CRC */ + eerev.crc = + el_srom_checksum ((u_char *) eerev.board, eerev.size); + + /* write new values */ + printf ("\nSRom: Writing revision info ...... "); + if (mpc107_srom_store + ((BLOCK_SIZE - sizeof (revinfo)), (u_char *) & eerev, + sizeof (revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1) + printf ("FAILED\n\n"); + else + printf ("OK\n\n"); + + /* write new values as shadow image to nvram */ + nvram_write (CFG_NV_SROM_COPY_ADDR, (void *) &eerev, + CFG_SROM_SIZE); - l = strlen ((char *)&eerev.text); - printf("Add to text section (max 64 chr): %s ", (char *)&eerev.text ); - if (0 != readline (NULL)) - { - for (i = l; i<63; i++) - eerev.text[i] = console_buffer[i-l]; - eerev.text[63] = '\0'; } - /* prepare network eeprom */ - memset (buf, 0, 128); - - buf[0] = eerev.etheraddr[1]; - buf[1] = eerev.etheraddr[0]; - buf[2] = eerev.etheraddr[3]; - buf[3] = eerev.etheraddr[2]; - buf[4] = eerev.etheraddr[5]; - buf[5] = eerev.etheraddr[4]; - - *(unsigned short *)&buf[20] = 0x48B2; - *(unsigned short *)&buf[22] = 0x0004; - *(unsigned short *)&buf[24] = 0x1433; - - printf("\nSRom: Writing i82559 info ........ "); - if (eepro100_srom_store ((unsigned short *)buf) == -1) - printf("FAILED\n"); - else - printf("OK\n"); - - /* update CRC */ - eerev.crc = el_srom_checksum((u_char *)eerev.board, eerev.size); - - /* write new values */ - printf("\nSRom: Writing revision info ...... "); - if (mpc107_srom_store((BLOCK_SIZE-sizeof(revinfo)), (u_char *)&eerev, - sizeof(revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1) - printf("FAILED\n\n"); - else - printf("OK\n\n"); - - /* write new values as shadow image to nvram */ - nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE); - - } /*if (initSrom) */ - - /* copy current values as shadow image to nvram */ - if (initSrom == 0 && copyNv == 1) - nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE); - - /* update environment */ - sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x", - eerev.etheraddr[0], eerev.etheraddr[1], - eerev.etheraddr[2], eerev.etheraddr[3], - eerev.etheraddr[4], eerev.etheraddr[5]); - setenv ("ethaddr", buf); - - /* set serial console as default */ - if ((ptr = getenv ("console")) == NULL) - setenv ("console", "serial"); - - /* print actual board identification */ - printf("Ident: %s Ser %s Rev %c%c\n", - eerev.board, (char *)&eerev.serial, - eerev.revision[0][0], eerev.revision[0][1]); - - return (0); + /*if (initSrom) */ + /* copy current values as shadow image to nvram */ + if (initSrom == 0 && copyNv == 1) + nvram_write (CFG_NV_SROM_COPY_ADDR, (void *) &eerev, + CFG_SROM_SIZE); + + /* update environment */ + sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x", + eerev.etheraddr[0], eerev.etheraddr[1], + eerev.etheraddr[2], eerev.etheraddr[3], + eerev.etheraddr[4], eerev.etheraddr[5]); + setenv ("ethaddr", buf); + + /* set serial console as default */ + if ((ptr = getenv ("console")) == NULL) + setenv ("console", "serial"); + + /* print actual board identification */ + printf ("Ident: %s Ser %s Rev %c%c\n", + eerev.board, (char *) &eerev.serial, + eerev.revision[0][0], eerev.revision[0][1]); + + return (0); } /*----------------------------------------------------------------------------*/ diff --git a/board/eltec/mhpc/mhpc.c b/board/eltec/mhpc/mhpc.c index 76f9f37..bc3d9f4 100644 --- a/board/eltec/mhpc/mhpc.c +++ b/board/eltec/mhpc/mhpc.c @@ -38,19 +38,19 @@ /* imports from common/main.c */ extern char console_buffer[CFG_CBSIZE]; -extern void eeprom_init (void); -extern int eeprom_read (unsigned dev_addr, unsigned offset, - unsigned char *buffer, unsigned cnt); -extern int eeprom_write (unsigned dev_addr, unsigned offset, - unsigned char *buffer, unsigned cnt); +extern void eeprom_init (void); +extern int eeprom_read (unsigned dev_addr, unsigned offset, + unsigned char *buffer, unsigned cnt); +extern int eeprom_write (unsigned dev_addr, unsigned offset, + unsigned char *buffer, unsigned cnt); /* globals */ -void *video_hw_init(void); -void video_set_lut (unsigned int index, /* color number */ - unsigned char r, /* red */ - unsigned char g, /* green */ - unsigned char b /* blue */ - ); +void *video_hw_init (void); +void video_set_lut (unsigned int index, /* color number */ + unsigned char r, /* red */ + unsigned char g, /* green */ + unsigned char b /* blue */ + ); GraphicDevice gdev; @@ -60,79 +60,78 @@ static void video_test_image (void); static void video_default_lut (unsigned int clut_type); /* revision info foer MHPC EEPROM offset 480 */ -typedef struct { - char board[12]; /* 000 - Board Revision information */ - char sensor; /* 012 - Sensor Type information */ - char serial[8]; /* 013 - Board serial number */ - char etheraddr[6]; /* 021 - Ethernet node addresse */ - char revision[2]; /* 027 - Revision code */ - char option[3]; /* 029 - resevered for options */ +typedef struct { + char board[12]; /* 000 - Board Revision information */ + char sensor; /* 012 - Sensor Type information */ + char serial[8]; /* 013 - Board serial number */ + char etheraddr[6]; /* 021 - Ethernet node addresse */ + char revision[2]; /* 027 - Revision code */ + char option[3]; /* 029 - resevered for options */ } revinfo; /* ------------------------------------------------------------------------- */ -static const unsigned int sdram_table[] = -{ - /* read single beat cycle */ - 0xef0efc04, 0x0e2dac04, 0x01ba5c04, 0x1ff5fc00, - 0xfffffc05, 0xeffafc34, 0x0ff0bc34, 0x1ff57c35, - - /* read burst cycle */ - 0xef0efc04, 0x0e3dac04, 0x10ff5c04, 0xf0fffc00, - 0xf0fffc00, 0xf1fffc00, 0xfffffc00, 0xfffffc05, - 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, - 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, - - /* write single beat cycle */ - 0xef0efc04, 0x0e29ac00, 0x01b25c04, 0x1ff5fc05, - 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, - - /* write burst cycle */ - 0xef0ef804, 0x0e39a000, 0x10f75000, 0xf0fff440, - 0xf0fffc40, 0xf1fffc04, 0xfffffc05, 0xfffffc04, - 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, - 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, - - /* periodic timer expired */ - 0xeffebc84, 0x1ffd7c04, 0xfffffc04, 0xfffffc84, - 0xeffebc04, 0x1ffd7c04, 0xfffffc04, 0xfffffc05, - 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, - - /* exception */ - 0xfffffc04, 0xfffffc05, 0xfffffc04, 0xfffffc04 +static const unsigned int sdram_table[] = { + /* read single beat cycle */ + 0xef0efc04, 0x0e2dac04, 0x01ba5c04, 0x1ff5fc00, + 0xfffffc05, 0xeffafc34, 0x0ff0bc34, 0x1ff57c35, + + /* read burst cycle */ + 0xef0efc04, 0x0e3dac04, 0x10ff5c04, 0xf0fffc00, + 0xf0fffc00, 0xf1fffc00, 0xfffffc00, 0xfffffc05, + 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, + 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, + + /* write single beat cycle */ + 0xef0efc04, 0x0e29ac00, 0x01b25c04, 0x1ff5fc05, + 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, + + /* write burst cycle */ + 0xef0ef804, 0x0e39a000, 0x10f75000, 0xf0fff440, + 0xf0fffc40, 0xf1fffc04, 0xfffffc05, 0xfffffc04, + 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, + 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, + + /* periodic timer expired */ + 0xeffebc84, 0x1ffd7c04, 0xfffffc04, 0xfffffc84, + 0xeffebc04, 0x1ffd7c04, 0xfffffc04, 0xfffffc05, + 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, + + /* exception */ + 0xfffffc04, 0xfffffc05, 0xfffffc04, 0xfffffc04 }; /* ------------------------------------------------------------------------- */ int board_early_init_f (void) { - volatile immap_t *im = (immap_t *)CFG_IMMR; - volatile cpm8xx_t *cp = &(im->im_cpm); - volatile iop8xx_t *ip = (iop8xx_t *)&(im->im_ioport); - - /* reset the port A s.a. cpm-routines */ - ip->iop_padat = 0x0000; - ip->iop_papar = 0x0000; - ip->iop_padir = 0x0800; - ip->iop_paodr = 0x0000; - - /* reset the port B for digital and LCD output */ - cp->cp_pbdat = 0x0300; - cp->cp_pbpar = 0x5001; - cp->cp_pbdir = 0x5301; - cp->cp_pbodr = 0x0000; - - /* reset the port C configured for SMC1 serial port and aqc. control */ - ip->iop_pcdat = 0x0800; - ip->iop_pcpar = 0x0000; - ip->iop_pcdir = 0x0e30; - ip->iop_pcso = 0x0000; - - /* Config port D for LCD output */ - ip->iop_pdpar = 0x1fff; - ip->iop_pddir = 0x1fff; - - return (0); + volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile cpm8xx_t *cp = &(im->im_cpm); + volatile iop8xx_t *ip = (iop8xx_t *) & (im->im_ioport); + + /* reset the port A s.a. cpm-routines */ + ip->iop_padat = 0x0000; + ip->iop_papar = 0x0000; + ip->iop_padir = 0x0800; + ip->iop_paodr = 0x0000; + + /* reset the port B for digital and LCD output */ + cp->cp_pbdat = 0x0300; + cp->cp_pbpar = 0x5001; + cp->cp_pbdir = 0x5301; + cp->cp_pbodr = 0x0000; + + /* reset the port C configured for SMC1 serial port and aqc. control */ + ip->iop_pcdat = 0x0800; + ip->iop_pcpar = 0x0000; + ip->iop_pcdir = 0x0e30; + ip->iop_pcso = 0x0000; + + /* Config port D for LCD output */ + ip->iop_pdpar = 0x1fff; + ip->iop_pddir = 0x1fff; + + return (0); } /* ------------------------------------------------------------------------- */ @@ -142,322 +141,327 @@ int board_early_init_f (void) */ int checkboard (void) { - puts ("Board: ELTEC miniHiperCam\n"); - return(0); + puts ("Board: ELTEC miniHiperCam\n"); + return (0); } /* ------------------------------------------------------------------------- */ -int misc_init_r(void) +int misc_init_r (void) { - revinfo mhpcRevInfo; - char nid[32]; - char *mhpcSensorTypes[] = { "OMNIVISON OV7610/7620 color", - "OMNIVISON OV7110 b&w", NULL }; - char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0, - 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 }; - int i; - - /* check revision data */ - eeprom_read (CFG_I2C_EEPROM_ADDR, 480, (char*)&mhpcRevInfo, 32); - - if (strncmp((char *)&mhpcRevInfo.board[2], "MHPC", 4) != 0) - { - printf ("Enter revision number (0-9): %c ", mhpcRevInfo.revision[0]); - if (0 != readline (NULL)) - { - mhpcRevInfo.revision[0] = (char)toupper(console_buffer[0]); - } - - printf ("Enter revision character (A-Z): %c ", mhpcRevInfo.revision[1]); - if (1 == readline (NULL)) - { - mhpcRevInfo.revision[1] = (char)toupper(console_buffer[0]); - } - - printf("Enter board name (V-XXXX-XXXX): %s ", (char *)&mhpcRevInfo.board); - if (11 == readline (NULL)) - { - for (i=0; i<11; i++) - { - mhpcRevInfo.board[i] = (char)toupper(console_buffer[i]); - mhpcRevInfo.board[11] = '\0'; - } - } - - printf("Supported sensor types:\n"); - i=0; - do - { - printf("\n \'%d\' : %s\n", i, mhpcSensorTypes[i]); - } while ( mhpcSensorTypes[++i] != NULL ); - - do - { - printf("\nEnter sensor number (0-255): %d ", (int)mhpcRevInfo.sensor ); - if (0 != readline (NULL)) - { - mhpcRevInfo.sensor = (unsigned char)simple_strtoul(console_buffer, NULL, 10); - } - } while ( mhpcRevInfo.sensor >= i ); - - printf("Enter serial number: %s ", (char *)&mhpcRevInfo.serial ); - if (6 == readline (NULL)) - { - for (i=0; i<6; i++) - { - mhpcRevInfo.serial[i] = console_buffer[i]; - } - mhpcRevInfo.serial[6] = '\0'; - } - - printf("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", - mhpcRevInfo.etheraddr[0], mhpcRevInfo.etheraddr[1], - mhpcRevInfo.etheraddr[2], mhpcRevInfo.etheraddr[3], - mhpcRevInfo.etheraddr[4], mhpcRevInfo.etheraddr[5] ); - if (12 == readline (NULL)) - { - for (i=0; i<12; i+=2) - { - mhpcRevInfo.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] + - hex[toupper(console_buffer[i+1])-'0']); + revinfo mhpcRevInfo; + char nid[32]; + char *mhpcSensorTypes[] = { "OMNIVISON OV7610/7620 color", + "OMNIVISON OV7110 b&w", NULL + }; + char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0, + 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 + }; + int i; + + /* check revision data */ + eeprom_read (CFG_I2C_EEPROM_ADDR, 480, (char *) &mhpcRevInfo, 32); + + if (strncmp ((char *) &mhpcRevInfo.board[2], "MHPC", 4) != 0) { + printf ("Enter revision number (0-9): %c ", + mhpcRevInfo.revision[0]); + if (0 != readline (NULL)) { + mhpcRevInfo.revision[0] = + (char) toupper (console_buffer[0]); + } + + printf ("Enter revision character (A-Z): %c ", + mhpcRevInfo.revision[1]); + if (1 == readline (NULL)) { + mhpcRevInfo.revision[1] = + (char) toupper (console_buffer[0]); + } + + printf ("Enter board name (V-XXXX-XXXX): %s ", + (char *) &mhpcRevInfo.board); + if (11 == readline (NULL)) { + for (i = 0; i < 11; i++) { + mhpcRevInfo.board[i] = + (char) toupper (console_buffer[i]); + mhpcRevInfo.board[11] = '\0'; + } + } + + printf ("Supported sensor types:\n"); + i = 0; + do { + printf ("\n \'%d\' : %s\n", i, mhpcSensorTypes[i]); + } while (mhpcSensorTypes[++i] != NULL); + + do { + printf ("\nEnter sensor number (0-255): %d ", + (int) mhpcRevInfo.sensor); + if (0 != readline (NULL)) { + mhpcRevInfo.sensor = + (unsigned char) + simple_strtoul (console_buffer, NULL, + 10); + } + } while (mhpcRevInfo.sensor >= i); + + printf ("Enter serial number: %s ", + (char *) &mhpcRevInfo.serial); + if (6 == readline (NULL)) { + for (i = 0; i < 6; i++) { + mhpcRevInfo.serial[i] = console_buffer[i]; + } + mhpcRevInfo.serial[6] = '\0'; + } + + printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", mhpcRevInfo.etheraddr[0], mhpcRevInfo.etheraddr[1], mhpcRevInfo.etheraddr[2], mhpcRevInfo.etheraddr[3], mhpcRevInfo.etheraddr[4], mhpcRevInfo.etheraddr[5]); + if (12 == readline (NULL)) { + for (i = 0; i < 12; i += 2) { + mhpcRevInfo.etheraddr[i >> 1] = + (char) (16 * + hex[toupper + (console_buffer[i]) - + '0'] + + hex[toupper + (console_buffer[i + 1]) - + '0']); + } + } + + /* setup new revision data */ + eeprom_write (CFG_I2C_EEPROM_ADDR, 480, (char *) &mhpcRevInfo, + 32); } - } - - /* setup new revision data */ - eeprom_write (CFG_I2C_EEPROM_ADDR, 480, (char*)&mhpcRevInfo, 32); - } - - /* set environment */ - sprintf( nid, "%02x:%02x:%02x:%02x:%02x:%02x", - mhpcRevInfo.etheraddr[0], mhpcRevInfo.etheraddr[1], - mhpcRevInfo.etheraddr[2], mhpcRevInfo.etheraddr[3], - mhpcRevInfo.etheraddr[4], mhpcRevInfo.etheraddr[5]); - setenv("ethaddr", nid); - - /* print actual board identification */ - printf("Ident: %s %s Ser %s Rev %c%c\n", - mhpcRevInfo.board, (mhpcRevInfo.sensor==0?"color":"b&w"), - (char *)&mhpcRevInfo.serial, - mhpcRevInfo.revision[0], mhpcRevInfo.revision[1]); - - return (0); + + /* set environment */ + sprintf (nid, "%02x:%02x:%02x:%02x:%02x:%02x", + mhpcRevInfo.etheraddr[0], mhpcRevInfo.etheraddr[1], + mhpcRevInfo.etheraddr[2], mhpcRevInfo.etheraddr[3], + mhpcRevInfo.etheraddr[4], mhpcRevInfo.etheraddr[5]); + setenv ("ethaddr", nid); + + /* print actual board identification */ + printf ("Ident: %s %s Ser %s Rev %c%c\n", + mhpcRevInfo.board, + (mhpcRevInfo.sensor == 0 ? "color" : "b&w"), + (char *) &mhpcRevInfo.serial, mhpcRevInfo.revision[0], + mhpcRevInfo.revision[1]); + + return (0); } /* ------------------------------------------------------------------------- */ long int initdram (int board_type) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile memctl8xx_t *memctl = &immap->im_memctl; - - upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint)); - - memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */ - memctl->memc_mbmr = MBMR_GPL_B4DIS; /* should this be mamr? - NTL */ - memctl->memc_mptpr = MPTPR_PTP_DIV64; - memctl->memc_mar = 0x00008800; - - /* - * Map controller SDRAM bank 0 - */ - memctl->memc_or1 = CFG_OR1_PRELIM; - memctl->memc_br1 = CFG_BR1_PRELIM; - udelay(200); - - /* - * Map controller SDRAM bank 1 - */ - memctl->memc_or2 = CFG_OR2; - memctl->memc_br2 = CFG_BR2; - - /* - * Perform SDRAM initializsation sequence - */ - memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */ - udelay(1); - memctl->memc_mcr = 0x80002730; /* SDRAM bank 0 - execute twice */ - udelay(1); - memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */ - - udelay(10000); - - /* leave place for framebuffers */ - return (SDRAM_MAX_SIZE-SDRAM_RES_SIZE); + volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile memctl8xx_t *memctl = &immap->im_memctl; + + upmconfig (UPMA, (uint *) sdram_table, + sizeof (sdram_table) / sizeof (uint)); + + memctl->memc_mamr = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */ + memctl->memc_mbmr = MBMR_GPL_B4DIS; /* should this be mamr? - NTL */ + memctl->memc_mptpr = MPTPR_PTP_DIV64; + memctl->memc_mar = 0x00008800; + + /* + * Map controller SDRAM bank 0 + */ + memctl->memc_or1 = CFG_OR1_PRELIM; + memctl->memc_br1 = CFG_BR1_PRELIM; + udelay (200); + + /* + * Map controller SDRAM bank 1 + */ + memctl->memc_or2 = CFG_OR2; + memctl->memc_br2 = CFG_BR2; + + /* + * Perform SDRAM initializsation sequence + */ + memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */ + udelay (1); + memctl->memc_mcr = 0x80002730; /* SDRAM bank 0 - execute twice */ + udelay (1); + memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */ + + udelay (10000); + + /* leave place for framebuffers */ + return (SDRAM_MAX_SIZE - SDRAM_RES_SIZE); } /* ------------------------------------------------------------------------- */ static void video_circle (char *center, int radius, int color, int pitch) { - int x,y,d,dE,dSE; - - x = 0; - y = radius; - d = 1-radius; - dE = 3; - dSE = -2*radius+5; - - *(center+x+y*pitch) = color; - *(center+y+x*pitch) = color; - *(center+y-x*pitch) = color; - *(center+x-y*pitch) = color; - *(center-x-y*pitch) = color; - *(center-y-x*pitch) = color; - *(center-y+x*pitch) = color; - *(center-x+y*pitch) = color; - while(y>x) - { - if (d<0) - { - d += dE; - dE += 2; - dSE += 2; - x++; + int x, y, d, dE, dSE; + + x = 0; + y = radius; + d = 1 - radius; + dE = 3; + dSE = -2 * radius + 5; + + *(center + x + y * pitch) = color; + *(center + y + x * pitch) = color; + *(center + y - x * pitch) = color; + *(center + x - y * pitch) = color; + *(center - x - y * pitch) = color; + *(center - y - x * pitch) = color; + *(center - y + x * pitch) = color; + *(center - x + y * pitch) = color; + while (y > x) { + if (d < 0) { + d += dE; + dE += 2; + dSE += 2; + x++; + } else { + d += dSE; + dE += 2; + dSE += 4; + x++; + y--; + } + *(center + x + y * pitch) = color; + *(center + y + x * pitch) = color; + *(center + y - x * pitch) = color; + *(center + x - y * pitch) = color; + *(center - x - y * pitch) = color; + *(center - y - x * pitch) = color; + *(center - y + x * pitch) = color; + *(center - x + y * pitch) = color; } - else - { - d += dSE; - dE += 2; - dSE += 4; - x++; - y--; - } - *(center+x+y*pitch) = color; - *(center+y+x*pitch) = color; - *(center+y-x*pitch) = color; - *(center+x-y*pitch) = color; - *(center-x-y*pitch) = color; - *(center-y-x*pitch) = color; - *(center-y+x*pitch) = color; - *(center-x+y*pitch) = color; - } } /* ------------------------------------------------------------------------- */ -static void video_test_image(void) +static void video_test_image (void) { - char *di; - int i, n; - - /* draw raster */ - for (i=0; i<LCD_VIDEO_ROWS; i+=32) - { - memset((char*)(LCD_VIDEO_ADDR+i*LCD_VIDEO_COLS), LCD_VIDEO_FG, LCD_VIDEO_COLS); - for (n=i+1;n<i+32;n++) - memset((char*)(LCD_VIDEO_ADDR+n*LCD_VIDEO_COLS), LCD_VIDEO_BG, LCD_VIDEO_COLS); - } - - for (i=0; i<LCD_VIDEO_COLS; i+=32) - { - for (n=0; n<LCD_VIDEO_ROWS; n++) - *(char*)(LCD_VIDEO_ADDR+n*LCD_VIDEO_COLS+i) = LCD_VIDEO_FG; - } - - /* draw gray bar */ - di = (char *)(LCD_VIDEO_ADDR + (LCD_VIDEO_COLS-256)/64*32 + 97*LCD_VIDEO_COLS); - for (n=0; n<63; n++) - { - for (i=0; i<256; i++) - { - *di++ = (char)i; - *(di+LCD_VIDEO_COLS*64) = (i&1)*255; + char *di; + int i, n; + + /* draw raster */ + for (i = 0; i < LCD_VIDEO_ROWS; i += 32) { + memset ((char *) (LCD_VIDEO_ADDR + i * LCD_VIDEO_COLS), + LCD_VIDEO_FG, LCD_VIDEO_COLS); + for (n = i + 1; n < i + 32; n++) + memset ((char *) (LCD_VIDEO_ADDR + + n * LCD_VIDEO_COLS), LCD_VIDEO_BG, + LCD_VIDEO_COLS); + } + + for (i = 0; i < LCD_VIDEO_COLS; i += 32) { + for (n = 0; n < LCD_VIDEO_ROWS; n++) + *(char *) (LCD_VIDEO_ADDR + n * LCD_VIDEO_COLS + i) = + LCD_VIDEO_FG; } - di += LCD_VIDEO_COLS-256; - } - video_circle ((char*)LCD_VIDEO_ADDR+LCD_VIDEO_COLS/2+LCD_VIDEO_ROWS/2*LCD_VIDEO_COLS, - LCD_VIDEO_ROWS/2,LCD_VIDEO_FG, LCD_VIDEO_COLS); + /* draw gray bar */ + di = (char *) (LCD_VIDEO_ADDR + (LCD_VIDEO_COLS - 256) / 64 * 32 + + 97 * LCD_VIDEO_COLS); + for (n = 0; n < 63; n++) { + for (i = 0; i < 256; i++) { + *di++ = (char) i; + *(di + LCD_VIDEO_COLS * 64) = (i & 1) * 255; + } + di += LCD_VIDEO_COLS - 256; + } + + video_circle ((char *) LCD_VIDEO_ADDR + LCD_VIDEO_COLS / 2 + + LCD_VIDEO_ROWS / 2 * LCD_VIDEO_COLS, LCD_VIDEO_ROWS / 2, + LCD_VIDEO_FG, LCD_VIDEO_COLS); } /* ------------------------------------------------------------------------- */ static void video_default_lut (unsigned int clut_type) { - unsigned int i; - unsigned char RGB[] = - { - 0x00, 0x00, 0x00, /* black */ - 0x80, 0x80, 0x80, /* gray */ - 0xff, 0x00, 0x00, /* red */ - 0x00, 0xff, 0x00, /* green */ - 0x00, 0x00, 0xff, /* blue */ - 0x00, 0xff, 0xff, /* cyan */ - 0xff, 0x00, 0xff, /* magenta */ - 0xff, 0xff, 0x00, /* yellow */ - 0x80, 0x00, 0x00, /* dark red */ - 0x00, 0x80, 0x00, /* dark green */ - 0x00, 0x00, 0x80, /* dark blue */ - 0x00, 0x80, 0x80, /* dark cyan */ - 0x80, 0x00, 0x80, /* dark magenta */ - 0x80, 0x80, 0x00, /* dark yellow */ - 0xc0, 0xc0, 0xc0, /* light gray */ - 0xff, 0xff, 0xff, /* white */ + unsigned int i; + unsigned char RGB[] = { + 0x00, 0x00, 0x00, /* black */ + 0x80, 0x80, 0x80, /* gray */ + 0xff, 0x00, 0x00, /* red */ + 0x00, 0xff, 0x00, /* green */ + 0x00, 0x00, 0xff, /* blue */ + 0x00, 0xff, 0xff, /* cyan */ + 0xff, 0x00, 0xff, /* magenta */ + 0xff, 0xff, 0x00, /* yellow */ + 0x80, 0x00, 0x00, /* dark red */ + 0x00, 0x80, 0x00, /* dark green */ + 0x00, 0x00, 0x80, /* dark blue */ + 0x00, 0x80, 0x80, /* dark cyan */ + 0x80, 0x00, 0x80, /* dark magenta */ + 0x80, 0x80, 0x00, /* dark yellow */ + 0xc0, 0xc0, 0xc0, /* light gray */ + 0xff, 0xff, 0xff, /* white */ }; - switch (clut_type) - { - case 1: - for (i=0; i<240; i++) - video_set_lut (i, i, i, i); - for (i=0; i<16; i++) - video_set_lut (i+240, RGB[i*3], RGB[i*3+1], RGB[i*3+2]); - break; - default: - for (i=0; i<256; i++) - video_set_lut (i, i, i, i); - } + switch (clut_type) { + case 1: + for (i = 0; i < 240; i++) + video_set_lut (i, i, i, i); + for (i = 0; i < 16; i++) + video_set_lut (i + 240, RGB[i * 3], RGB[i * 3 + 1], + RGB[i * 3 + 2]); + break; + default: + for (i = 0; i < 256; i++) + video_set_lut (i, i, i, i); + } } /* ------------------------------------------------------------------------- */ void *video_hw_init (void) { - unsigned int clut = 0; - unsigned char *penv; - immap_t *immr = (immap_t *) CFG_IMMR; - - /* enable video only on CLUT value */ - if ((penv = getenv ("clut")) != NULL) - clut = (u_int)simple_strtoul (penv, NULL, 10); - else - return NULL; - - /* disable graphic before write LCD regs. */ - immr->im_lcd.lcd_lccr = 0x96000866; - - /* config LCD regs. */ - immr->im_lcd.lcd_lcfaa = LCD_VIDEO_ADDR; - immr->im_lcd.lcd_lchcr = 0x010a0093; - immr->im_lcd.lcd_lcvcr = 0x900f0024; - - printf ("Video: 640x480 8Bit Index Lut %s\n", - (clut==1?"240/16 (gray/vga)":"256(gray)")); - - video_default_lut (clut); - - /* clear framebuffer */ - memset ( (char*)(LCD_VIDEO_ADDR), LCD_VIDEO_BG, LCD_VIDEO_ROWS*LCD_VIDEO_COLS ); - - /* enable graphic */ - immr->im_lcd.lcd_lccr = 0x96000867; - - /* fill in Graphic Device */ - gdev.frameAdrs = LCD_VIDEO_ADDR; - gdev.winSizeX = LCD_VIDEO_COLS; - gdev.winSizeY = LCD_VIDEO_ROWS; - gdev.gdfBytesPP = 1; - gdev.gdfIndex = GDF__8BIT_INDEX; - - if (clut > 1) - /* return Graphic Device for console */ - return (void *)&gdev; - else - /* just graphic enabled - draw something beautiful */ - video_test_image(); - - return NULL; /* this disabels cfb - console */ + unsigned int clut = 0; + unsigned char *penv; + immap_t *immr = (immap_t *) CFG_IMMR; + + /* enable video only on CLUT value */ + if ((penv = getenv ("clut")) != NULL) + clut = (u_int) simple_strtoul (penv, NULL, 10); + else + return NULL; + + /* disable graphic before write LCD regs. */ + immr->im_lcd.lcd_lccr = 0x96000866; + + /* config LCD regs. */ + immr->im_lcd.lcd_lcfaa = LCD_VIDEO_ADDR; + immr->im_lcd.lcd_lchcr = 0x010a0093; + immr->im_lcd.lcd_lcvcr = 0x900f0024; + + printf ("Video: 640x480 8Bit Index Lut %s\n", + (clut == 1 ? "240/16 (gray/vga)" : "256(gray)")); + + video_default_lut (clut); + + /* clear framebuffer */ + memset ((char *) (LCD_VIDEO_ADDR), LCD_VIDEO_BG, + LCD_VIDEO_ROWS * LCD_VIDEO_COLS); + + /* enable graphic */ + immr->im_lcd.lcd_lccr = 0x96000867; + + /* fill in Graphic Device */ + gdev.frameAdrs = LCD_VIDEO_ADDR; + gdev.winSizeX = LCD_VIDEO_COLS; + gdev.winSizeY = LCD_VIDEO_ROWS; + gdev.gdfBytesPP = 1; + gdev.gdfIndex = GDF__8BIT_INDEX; + + if (clut > 1) + /* return Graphic Device for console */ + return (void *) &gdev; + else + /* just graphic enabled - draw something beautiful */ + video_test_image (); + + return NULL; /* this disabels cfb - console */ } /* ------------------------------------------------------------------------- */ @@ -465,13 +469,15 @@ void *video_hw_init (void) void video_set_lut (unsigned int index, unsigned char r, unsigned char g, unsigned char b) { - unsigned int lum; - unsigned short *pLut = (unsigned short *)(CFG_IMMR + 0x0e00); - - /* 16 bit lut values, 12 bit used, xxxx BBGG RRii iiii */ - /* y = 0.299*R + 0.587*G + 0.114*B */ - lum = (2990*r + 5870*g + 1140*b)/10000; - pLut[index] = ((b & 0xc0)<<4) | ((g & 0xc0)<<2) | (r & 0xc0) | (lum & 0x3f); + unsigned int lum; + unsigned short *pLut = (unsigned short *) (CFG_IMMR + 0x0e00); + + /* 16 bit lut values, 12 bit used, xxxx BBGG RRii iiii */ + /* y = 0.299*R + 0.587*G + 0.114*B */ + lum = (2990 * r + 5870 * g + 1140 * b) / 10000; + pLut[index] = + ((b & 0xc0) << 4) | ((g & 0xc0) << 2) | (r & 0xc0) | (lum & + 0x3f); } /* ------------------------------------------------------------------------- */ diff --git a/board/ep8260/ep8260.c b/board/ep8260/ep8260.c index 7a2c23f..fb4d325 100644 --- a/board/ep8260/ep8260.c +++ b/board/ep8260/ep8260.c @@ -190,21 +190,22 @@ const iop_conf_t iop_conf_tab[4][32] = { */ int board_early_init_f (void) { - volatile t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE; - volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile memctl8260_t *memctl = &immap->im_memctl; - memctl->memc_br4 = CFG_BR4_PRELIM; - memctl->memc_or4 = CFG_OR4_PRELIM; - regs->bcsr1 = 0x62; /* to enable terminal on SMC1 */ - regs->bcsr2 = 0x30; /* enable NVRAM and writing FLASH */ - return 0; + volatile t_ep_regs *regs = (t_ep_regs *) CFG_REGS_BASE; + volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile memctl8260_t *memctl = &immap->im_memctl; + + memctl->memc_br4 = CFG_BR4_PRELIM; + memctl->memc_or4 = CFG_OR4_PRELIM; + regs->bcsr1 = 0x62; /* to enable terminal on SMC1 */ + regs->bcsr2 = 0x30; /* enable NVRAM and writing FLASH */ + return 0; } -void -reset_phy(void) +void reset_phy (void) { - volatile t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE; - regs->bcsr4 = 0xC0; + volatile t_ep_regs *regs = (t_ep_regs *) CFG_REGS_BASE; + + regs->bcsr4 = 0xC0; } /* @@ -213,15 +214,21 @@ reset_phy(void) * Thats why its a static interpretation ... */ -int -checkboard(void) +int checkboard (void) { - volatile t_ep_regs *regs = (t_ep_regs*)CFG_REGS_BASE; - uint major=0, minor=0; + volatile t_ep_regs *regs = (t_ep_regs *) CFG_REGS_BASE; + uint major = 0, minor = 0; + switch (regs->bcsr0) { - case 0x02: major = 1; break; - case 0x03: major = 1; minor = 1; break; - default: break; + case 0x02: + major = 1; + break; + case 0x03: + major = 1; + minor = 1; + break; + default: + break; } printf ("Board: Embedded Planet EP8260, Revision %d.%d\n", major, minor); @@ -232,13 +239,13 @@ checkboard(void) /* ------------------------------------------------------------------------- */ -long int -initdram(int board_type) +long int initdram (int board_type) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; volatile uchar c = 0; - volatile uchar *ramaddr = (uchar *)(CFG_SDRAM_BASE) + 0x110; + volatile uchar *ramaddr = (uchar *) (CFG_SDRAM_BASE) + 0x110; + /* ulong psdmr = CFG_PSDMR; #ifdef CFG_LSDRAM @@ -288,7 +295,7 @@ initdram(int board_type) #ifndef CFG_RAMBOOT #ifdef CFG_LSDRAM size += CFG_SDRAM1_SIZE; - ramaddr = (uchar *)(CFG_SDRAM1_BASE) + 0x8c; + ramaddr = (uchar *) (CFG_SDRAM1_BASE) + 0x8c; memctl->memc_lsrt = CFG_LSRT; memctl->memc_lsdmr = (ulong) CFG_LSDMR | PSDMR_OP_PREA; diff --git a/board/evb64260/ecctest.c b/board/evb64260/ecctest.c index e7c58b3..5d3679a 100644 --- a/board/evb64260/ecctest.c +++ b/board/evb64260/ecctest.c @@ -1,91 +1,111 @@ +indent: Standard input:27: Warning:old style assignment ambiguity in "=*". Assuming "= *" + #ifdef ECC_TEST -static inline void ecc_off(void) +static inline void ecc_off (void) { - *(volatile int *)(INTERNAL_REG_BASE_ADDR+0x4b4) &= ~0x00200000; + *(volatile int *) (INTERNAL_REG_BASE_ADDR + 0x4b4) &= ~0x00200000; } -static inline void ecc_on(void) +static inline void ecc_on (void) { - *(volatile int *)(INTERNAL_REG_BASE_ADDR+0x4b4) |= 0x00200000; + *(volatile int *) (INTERNAL_REG_BASE_ADDR + 0x4b4) |= 0x00200000; } -static int putshex(const char *buf, int len) +static int putshex (const char *buf, int len) { - int i; - for (i=0;i<len;i++) { - printf("%02x", buf[i]); - } - return 0; + int i; + + for (i = 0; i < len; i++) { + printf ("%02x", buf[i]); + } + return 0; } -static int char_memcpy(void *d, const void *s, int len) +static int char_memcpy (void *d, const void *s, int len) { - int i; - char *cd=d; - const char *cs=s; - for(i=0;i<len;i++) { - *(cd++)=*(cs++); - } - return 0; + int i; + char *cd = d; + const char *cs = s; + + for (i = 0; i < len; i++) { + *(cd++) = *(cs++); + } + return 0; } -static int memory_test(char *buf) +static int memory_test (char *buf) { - const char src[][16]={ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - {0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01}, - {0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02}, - {0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04}, - {0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08}, - {0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10}, - {0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20}, - {0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40}, - {0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80}, - {0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55}, - {0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa,0xaa}, - {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff} - }; - const int foo[] = {0}; - int i,j,a; + const char src[][16] = { + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01}, + {0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, + 0x02, 0x02, 0x02, 0x02, 0x02, 0x02}, + {0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04}, + {0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, + 0x08, 0x08, 0x08, 0x08, 0x08, 0x08}, + {0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, + 0x10, 0x10, 0x10, 0x10, 0x10, 0x10}, + {0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20}, + {0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, + 0x40, 0x40, 0x40, 0x40, 0x40, 0x40}, + {0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, + 0x80, 0x80, 0x80, 0x80, 0x80, 0x80}, + {0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, + 0x55, 0x55, 0x55, 0x55, 0x55, 0x55}, + {0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa}, + {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff} + }; + const int foo[] = { 0 }; + int i, j, a; - printf("\ntest @ %d %p\n", foo[0], buf); - for(i=0;i<12;i++) { - for(a=0;a<8;a++) { - const char *s=src[i]+a; - int align=(unsigned)(s)&0x7; - /* ecc_off(); */ - memcpy(buf,s,8); - /* ecc_on(); */ - putshex(s,8); - if(memcmp(buf,s,8)) { - putc('\n'); - putshex(buf,8); - printf(" [FAIL] (%p) align=%d\n", s, align); - for(j=0;j<8;j++) { - s[j]==buf[j]?puts(" "):printf("%02x", (s[j])^(buf[j])); - } - putc('\n'); - } else { - printf(" [PASS] (%p) align=%d\n", s, align); - } - /* ecc_off(); */ - char_memcpy(buf,s,8); - /* ecc_on(); */ - putshex(s,8); - if(memcmp(buf,s,8)) { - putc('\n'); - putshex(buf,8); - printf(" [FAIL] (%p) align=%d\n", s, align); - for(j=0;j<8;j++) { - s[j]==buf[j]?puts(" "):printf("%02x", (s[j])^(buf[j])); + printf ("\ntest @ %d %p\n", foo[0], buf); + for (i = 0; i < 12; i++) { + for (a = 0; a < 8; a++) { + const char *s = src[i] + a; + int align = (unsigned) (s) & 0x7; + + /* ecc_off(); */ + memcpy (buf, s, 8); + /* ecc_on(); */ + putshex (s, 8); + if (memcmp (buf, s, 8)) { + putc ('\n'); + putshex (buf, 8); + printf (" [FAIL] (%p) align=%d\n", s, align); + for (j = 0; j < 8; j++) { + s[j] == buf[j] ? puts (" ") : + printf ("%02x", + (s[j]) ^ (buf[j])); + } + putc ('\n'); + } else { + printf (" [PASS] (%p) align=%d\n", s, align); + } + /* ecc_off(); */ + char_memcpy (buf, s, 8); + /* ecc_on(); */ + putshex (s, 8); + if (memcmp (buf, s, 8)) { + putc ('\n'); + putshex (buf, 8); + printf (" [FAIL] (%p) align=%d\n", s, align); + for (j = 0; j < 8; j++) { + s[j] == buf[j] ? puts (" ") : + printf ("%02x", + (s[j]) ^ (buf[j])); + } + putc ('\n'); + } else { + printf (" [PASS] (%p) align=%d\n", s, align); + } } - putc('\n'); - } else { - printf(" [PASS] (%p) align=%d\n", s, align); - } } - } - return 0; + return 0; } #endif diff --git a/board/evb64260/eth_addrtbl.c b/board/evb64260/eth_addrtbl.c index ef463c3..0abc7d4 100644 --- a/board/evb64260/eth_addrtbl.c +++ b/board/evb64260/eth_addrtbl.c @@ -13,66 +13,68 @@ #ifdef CONFIG_GT_USE_MAC_HASH_TABLE -static u32 addressTableHashMode[ GAL_ETH_DEVS ] = { 0, }; -static u32 addressTableHashSize[ GAL_ETH_DEVS ] = { 0, }; -static addrTblEntry *addressTableBase[ GAL_ETH_DEVS ] = { 0, }; -static void *realAddrTableBase[ GAL_ETH_DEVS ] = { 0, }; - -static const u32 hashLength[ 2 ] = { - (0x8000), /* 8K * 4 entries */ - (0x8000/16), /* 512 * 4 entries */ +static u32 addressTableHashMode[GAL_ETH_DEVS] = { 0, }; +static u32 addressTableHashSize[GAL_ETH_DEVS] = { 0, }; +static addrTblEntry *addressTableBase[GAL_ETH_DEVS] = { 0, }; +static void *realAddrTableBase[GAL_ETH_DEVS] = { 0, }; + +static const u32 hashLength[2] = { + (0x8000), /* 8K * 4 entries */ + (0x8000 / 16), /* 512 * 4 entries */ }; /* Initialize the address table for a port, if needed */ -unsigned int initAddressTable( u32 port, u32 hashMode, u32 hashSizeSelector) +unsigned int initAddressTable (u32 port, u32 hashMode, u32 hashSizeSelector) { - unsigned int tableBase; + unsigned int tableBase; - if( port < 0 || port >= GAL_ETH_DEVS ) { - printf("%s: Invalid port number %d\n", __FUNCTION__, port ); + if (port < 0 || port >= GAL_ETH_DEVS) { + printf ("%s: Invalid port number %d\n", __FUNCTION__, port); return 0; } if (hashMode > 1) { - printf("%s: Invalid Hash Mode %d\n", __FUNCTION__, port ); + printf ("%s: Invalid Hash Mode %d\n", __FUNCTION__, port); return 0; } - if ( realAddrTableBase[port] && - ( addressTableHashSize[port] != hashSizeSelector )) { + if (realAddrTableBase[port] && + (addressTableHashSize[port] != hashSizeSelector)) { /* we have been here before, * but now we want a different sized table */ - free( realAddrTableBase[port] ); + free (realAddrTableBase[port]); realAddrTableBase[port] = 0; addressTableBase[port] = 0; } - tableBase = (unsigned int)addressTableBase[port]; + tableBase = (unsigned int) addressTableBase[port]; /* we get called for every probe, so only do this once */ - if ( !tableBase ) { - int bytes = hashLength[hashSizeSelector] * sizeof(addrTblEntry); + if (!tableBase) { + int bytes = + hashLength[hashSizeSelector] * sizeof (addrTblEntry); - tableBase = (unsigned int)realAddrTableBase[port] = malloc(bytes+64); + tableBase = (unsigned int) realAddrTableBase[port] = + malloc (bytes + 64); - if(!tableBase) - { - printf("%s: alloc memory failed \n", __FUNCTION__); + if (!tableBase) { + printf ("%s: alloc memory failed \n", __FUNCTION__); return 0; } - /* align to octal byte */ - if(tableBase&63) tableBase=(tableBase+63) & ~63; + /* align to octal byte */ + if (tableBase & 63) + tableBase = (tableBase + 63) & ~63; - addressTableHashMode[port] = hashMode; - addressTableHashSize[port] = hashSizeSelector; - addressTableBase[port] = (addrTblEntry *)tableBase; + addressTableHashMode[port] = hashMode; + addressTableHashSize[port] = hashSizeSelector; + addressTableBase[port] = (addrTblEntry *) tableBase; - memset((void *)tableBase,0,bytes); + memset ((void *) tableBase, 0, bytes); } - return tableBase; + return tableBase; } /* @@ -87,61 +89,61 @@ unsigned int initAddressTable( u32 port, u32 hashMode, u32 hashSizeSelector) * Outputs * return the calculated entry. */ -u32 -hashTableFunction( u32 macH, u32 macL, u32 HashSize, u32 hash_mode) +u32 hashTableFunction (u32 macH, u32 macL, u32 HashSize, u32 hash_mode) { - u32 hashResult; - u32 addrH; - u32 addrL; - u32 addr0; - u32 addr1; - u32 addr2; - u32 addr3; - u32 addrHSwapped; - u32 addrLSwapped; - - - addrH = NIBBLE_SWAPPING_16_BIT( macH ); - addrL = NIBBLE_SWAPPING_32_BIT( macL ); - - addrHSwapped = FLIP_4_BITS( addrH & 0xf ) - + ((FLIP_4_BITS( (addrH >> 4) & 0xf)) << 4) - + ((FLIP_4_BITS( (addrH >> 8) & 0xf)) << 8) - + ((FLIP_4_BITS( (addrH >> 12) & 0xf)) << 12); - - addrLSwapped = FLIP_4_BITS( addrL & 0xf ) - + ((FLIP_4_BITS( (addrL >> 4) & 0xf)) << 4) - + ((FLIP_4_BITS( (addrL >> 8) & 0xf)) << 8) - + ((FLIP_4_BITS( (addrL >> 12) & 0xf)) << 12) - + ((FLIP_4_BITS( (addrL >> 16) & 0xf)) << 16) - + ((FLIP_4_BITS( (addrL >> 20) & 0xf)) << 20) - + ((FLIP_4_BITS( (addrL >> 24) & 0xf)) << 24) - + ((FLIP_4_BITS( (addrL >> 28) & 0xf)) << 28); - - addrH = addrHSwapped; - addrL = addrLSwapped; - - if( hash_mode == 0 ) { - addr0 = (addrL >> 2) & 0x03f; - addr1 = (addrL & 0x003) | ((addrL >> 8) & 0x7f) << 2; - addr2 = (addrL >> 15) & 0x1ff; - addr3 = ((addrL >> 24) & 0x0ff) | ((addrH & 1) << 8); - } else { - addr0 = FLIP_6_BITS( addrL & 0x03f ); - addr1 = FLIP_9_BITS( ((addrL >> 6) & 0x1ff)); - addr2 = FLIP_9_BITS( (addrL >> 15) & 0x1ff); - addr3 = FLIP_9_BITS( (((addrL >> 24) & 0x0ff) | ((addrH & 0x1) << 8))); - } - - hashResult = (addr0 << 9) | (addr1 ^ addr2 ^ addr3); - - if( HashSize == _8K_TABLE ) { - hashResult = hashResult & 0xffff; - } else { - hashResult = hashResult & 0x07ff; - } - - return( hashResult ); + u32 hashResult; + u32 addrH; + u32 addrL; + u32 addr0; + u32 addr1; + u32 addr2; + u32 addr3; + u32 addrHSwapped; + u32 addrLSwapped; + + + addrH = NIBBLE_SWAPPING_16_BIT (macH); + addrL = NIBBLE_SWAPPING_32_BIT (macL); + + addrHSwapped = FLIP_4_BITS (addrH & 0xf) + + ((FLIP_4_BITS ((addrH >> 4) & 0xf)) << 4) + + ((FLIP_4_BITS ((addrH >> 8) & 0xf)) << 8) + + ((FLIP_4_BITS ((addrH >> 12) & 0xf)) << 12); + + addrLSwapped = FLIP_4_BITS (addrL & 0xf) + + ((FLIP_4_BITS ((addrL >> 4) & 0xf)) << 4) + + ((FLIP_4_BITS ((addrL >> 8) & 0xf)) << 8) + + ((FLIP_4_BITS ((addrL >> 12) & 0xf)) << 12) + + ((FLIP_4_BITS ((addrL >> 16) & 0xf)) << 16) + + ((FLIP_4_BITS ((addrL >> 20) & 0xf)) << 20) + + ((FLIP_4_BITS ((addrL >> 24) & 0xf)) << 24) + + ((FLIP_4_BITS ((addrL >> 28) & 0xf)) << 28); + + addrH = addrHSwapped; + addrL = addrLSwapped; + + if (hash_mode == 0) { + addr0 = (addrL >> 2) & 0x03f; + addr1 = (addrL & 0x003) | ((addrL >> 8) & 0x7f) << 2; + addr2 = (addrL >> 15) & 0x1ff; + addr3 = ((addrL >> 24) & 0x0ff) | ((addrH & 1) << 8); + } else { + addr0 = FLIP_6_BITS (addrL & 0x03f); + addr1 = FLIP_9_BITS (((addrL >> 6) & 0x1ff)); + addr2 = FLIP_9_BITS ((addrL >> 15) & 0x1ff); + addr3 = FLIP_9_BITS ((((addrL >> 24) & 0x0ff) | + ((addrH & 0x1) << 8))); + } + + hashResult = (addr0 << 9) | (addr1 ^ addr2 ^ addr3); + + if (HashSize == _8K_TABLE) { + hashResult = hashResult & 0xffff; + } else { + hashResult = hashResult & 0x07ff; + } + + return (hashResult); } @@ -160,66 +162,59 @@ hashTableFunction( u32 macH, u32 macL, u32 HashSize, u32 hash_mode) * TRUE if success. * FALSE if table full */ -int -addAddressTableEntry( - u32 port, - u32 macH, - u32 macL, - u32 rd, - u32 skip ) +int addAddressTableEntry (u32 port, u32 macH, u32 macL, u32 rd, u32 skip) { - addrTblEntry *entry; - u32 newHi; - u32 newLo; - u32 i; - - newLo = (((macH >> 4) & 0xf) << 15) - | (((macH >> 0) & 0xf) << 11) - | (((macH >> 12) & 0xf) << 7) - | (((macH >> 8) & 0xf) << 3) - | (((macL >> 20) & 0x1) << 31) - | (((macL >> 16) & 0xf) << 27) - | (((macL >> 28) & 0xf) << 23) - | (((macL >> 24) & 0xf) << 19) - | (skip << SKIP_BIT) | (rd << 2) | VALID; - - newHi = (((macL >> 4) & 0xf) << 15) - | (((macL >> 0) & 0xf) << 11) - | (((macL >> 12) & 0xf) << 7) - | (((macL >> 8) & 0xf) << 3) - | (((macL >> 21) & 0x7) << 0); - - /* - * Pick the appropriate table, start scanning for free/reusable - * entries at the index obtained by hashing the specified MAC address - */ - entry = addressTableBase[port]; - entry += hashTableFunction( macH, macL, addressTableHashSize[port], - addressTableHashMode[port] ); - for( i = 0; i < HOP_NUMBER; i++, entry++ ) { - if( !(entry->lo & VALID) /*|| (entry->lo & SKIP)*/ ) { - break; - } else { /* if same address put in same position */ - if( ((entry->lo & 0xfffffff8) == (newLo & 0xfffffff8)) - && (entry->hi == newHi) ) - { - break; - } + addrTblEntry *entry; + u32 newHi; + u32 newLo; + u32 i; + + newLo = (((macH >> 4) & 0xf) << 15) + | (((macH >> 0) & 0xf) << 11) + | (((macH >> 12) & 0xf) << 7) + | (((macH >> 8) & 0xf) << 3) + | (((macL >> 20) & 0x1) << 31) + | (((macL >> 16) & 0xf) << 27) + | (((macL >> 28) & 0xf) << 23) + | (((macL >> 24) & 0xf) << 19) + | (skip << SKIP_BIT) | (rd << 2) | VALID; + + newHi = (((macL >> 4) & 0xf) << 15) + | (((macL >> 0) & 0xf) << 11) + | (((macL >> 12) & 0xf) << 7) + | (((macL >> 8) & 0xf) << 3) + | (((macL >> 21) & 0x7) << 0); + + /* + * Pick the appropriate table, start scanning for free/reusable + * entries at the index obtained by hashing the specified MAC address + */ + entry = addressTableBase[port]; + entry += hashTableFunction (macH, macL, addressTableHashSize[port], + addressTableHashMode[port]); + for (i = 0; i < HOP_NUMBER; i++, entry++) { + if (!(entry->lo & VALID) /*|| (entry->lo & SKIP) */ ) { + break; + } else { /* if same address put in same position */ + if (((entry->lo & 0xfffffff8) == (newLo & 0xfffffff8)) + && (entry->hi == newHi)) { + break; + } + } + } + + if (i == HOP_NUMBER) { + PRINTF ("addGT64260addressTableEntry: table section is full\n"); + return (FALSE); } - } - - if( i == HOP_NUMBER ) { - PRINTF( "addGT64260addressTableEntry: table section is full\n" ); - return( FALSE ); - } - - /* - * Update the selected entry - */ - entry->hi = newHi; - entry->lo = newLo; - DCACHE_FLUSH_N_SYNC( (u32)entry, MAC_ENTRY_SIZE ); - return( TRUE ); + + /* + * Update the selected entry + */ + entry->hi = newHi; + entry->lo = newLo; + DCACHE_FLUSH_N_SYNC ((u32) entry, MAC_ENTRY_SIZE); + return (TRUE); } #endif /* CONFIG_GT_USE_MAC_HASH_TABLE */ diff --git a/board/evb64260/pci.c b/board/evb64260/pci.c index 22da746..e3172b2 100644 --- a/board/evb64260/pci.c +++ b/board/evb64260/pci.c @@ -9,50 +9,62 @@ static const unsigned char pci_irq_swizzle[2][PCI_MAX_DEVICES] = { #ifdef CONFIG_ZUMA_V2 - {0,0,0,0,0,0,0,29, [8 ... PCI_MAX_DEVICES-1]=0}, - {0,0,0,0,0,0,0,28, [8 ... PCI_MAX_DEVICES-1]=0} -#else /* EVB??? This is a guess */ - {0,0,0,0,0,0,0,27,27, [9 ... PCI_MAX_DEVICES-1]=0}, - {0,0,0,0,0,0,0,29,29, [9 ... PCI_MAX_DEVICES-1]=0} + {0, 0, 0, 0, 0, 0, 0, 29,[8...PCI_MAX_DEVICES - 1] = 0}, + {0, 0, 0, 0, 0, 0, 0, 28,[8...PCI_MAX_DEVICES - 1] = 0} +#else /* EVB??? This is a guess */ + {0, 0, 0, 0, 0, 0, 0, 27, 27,[9...PCI_MAX_DEVICES - 1] = 0}, + {0, 0, 0, 0, 0, 0, 0, 29, 29,[9...PCI_MAX_DEVICES - 1] = 0} #endif }; -static const unsigned int pci_p2p_configuration_reg[]={ - PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION}; +static const unsigned int pci_p2p_configuration_reg[] = { + PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION +}; -static const unsigned int pci_configuration_address[]={ - PCI_0CONFIGURATION_ADDRESS, PCI_1CONFIGURATION_ADDRESS}; +static const unsigned int pci_configuration_address[] = { + PCI_0CONFIGURATION_ADDRESS, PCI_1CONFIGURATION_ADDRESS +}; -static const unsigned int pci_configuration_data[]={ - PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER, - PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER}; +static const unsigned int pci_configuration_data[] = { + PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER, + PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER +}; -static const unsigned int pci_error_cause_reg[]={ - PCI_0ERROR_CAUSE, PCI_1ERROR_CAUSE}; +static const unsigned int pci_error_cause_reg[] = { + PCI_0ERROR_CAUSE, PCI_1ERROR_CAUSE +}; -static const unsigned int pci_arbiter_control[]={ - PCI_0ARBITER_CONTROL, PCI_1ARBITER_CONTROL}; +static const unsigned int pci_arbiter_control[] = { + PCI_0ARBITER_CONTROL, PCI_1ARBITER_CONTROL +}; -static const unsigned int pci_snoop_control_base_0_low[]={ - PCI_0SNOOP_CONTROL_BASE_0_LOW, PCI_1SNOOP_CONTROL_BASE_0_LOW}; -static const unsigned int pci_snoop_control_top_0[]={ - PCI_0SNOOP_CONTROL_TOP_0, PCI_1SNOOP_CONTROL_TOP_0}; +static const unsigned int pci_snoop_control_base_0_low[] = { + PCI_0SNOOP_CONTROL_BASE_0_LOW, PCI_1SNOOP_CONTROL_BASE_0_LOW +}; +static const unsigned int pci_snoop_control_top_0[] = { + PCI_0SNOOP_CONTROL_TOP_0, PCI_1SNOOP_CONTROL_TOP_0 +}; -static const unsigned int pci_access_control_base_0_low[]={ - PCI_0ACCESS_CONTROL_BASE_0_LOW, PCI_1ACCESS_CONTROL_BASE_0_LOW}; -static const unsigned int pci_access_control_top_0[]={ - PCI_0ACCESS_CONTROL_TOP_0, PCI_1ACCESS_CONTROL_TOP_0}; +static const unsigned int pci_access_control_base_0_low[] = { + PCI_0ACCESS_CONTROL_BASE_0_LOW, PCI_1ACCESS_CONTROL_BASE_0_LOW +}; +static const unsigned int pci_access_control_top_0[] = { + PCI_0ACCESS_CONTROL_TOP_0, PCI_1ACCESS_CONTROL_TOP_0 +}; static const unsigned int pci_scs_bank_size[2][4] = { - {PCI_0SCS_0_BANK_SIZE, PCI_0SCS_1_BANK_SIZE, - PCI_0SCS_2_BANK_SIZE, PCI_0SCS_3_BANK_SIZE}, - {PCI_1SCS_0_BANK_SIZE, PCI_1SCS_1_BANK_SIZE, - PCI_1SCS_2_BANK_SIZE, PCI_1SCS_3_BANK_SIZE}}; + {PCI_0SCS_0_BANK_SIZE, PCI_0SCS_1_BANK_SIZE, + PCI_0SCS_2_BANK_SIZE, PCI_0SCS_3_BANK_SIZE}, + {PCI_1SCS_0_BANK_SIZE, PCI_1SCS_1_BANK_SIZE, + PCI_1SCS_2_BANK_SIZE, PCI_1SCS_3_BANK_SIZE} +}; static const unsigned int pci_p2p_configuration[] = { - PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION}; + PCI_0P2P_CONFIGURATION, PCI_1P2P_CONFIGURATION +}; + +static unsigned int local_buses[] = { 0, 0 }; -static unsigned int local_buses[] = { 0, 0}; /******************************************************************** * pciWriteConfigReg - Write to a PCI configuration register * - Make sure the GT is configured as a master before writing @@ -71,28 +83,33 @@ static unsigned int local_buses[] = { 0, 0}; * |Enable| |Number|Number| Number | Number | | <=field Name * *********************************************************************/ -void pciWriteConfigReg(PCI_HOST host, unsigned int regOffset,unsigned int pciDevNum,unsigned int data) +void pciWriteConfigReg (PCI_HOST host, unsigned int regOffset, + unsigned int pciDevNum, unsigned int data) { - volatile unsigned int DataForAddrReg; - unsigned int functionNum; - unsigned int busNum = PCI_BUS(pciDevNum); - unsigned int addr; - - if(pciDevNum > 32) /* illegal device Number */ - return; - if(pciDevNum == SELF) /* configure our configuration space. */ - { - pciDevNum = (GTREGREAD(pci_p2p_configuration_reg[host]) >> 24) & 0x1f; - busNum = GTREGREAD(pci_p2p_configuration_reg[host]) & 0xff0000; - } - functionNum = regOffset & 0x00000700; - pciDevNum = pciDevNum << 11; - regOffset = regOffset & 0xfc; - DataForAddrReg = ( regOffset | pciDevNum | functionNum | busNum) | BIT31; - GT_REG_WRITE(pci_configuration_address[host],DataForAddrReg); - GT_REG_READ(pci_configuration_address[host], &addr); - if (addr != DataForAddrReg) return; - GT_REG_WRITE(pci_configuration_data[host],data); + volatile unsigned int DataForAddrReg; + unsigned int functionNum; + unsigned int busNum = PCI_BUS (pciDevNum); + unsigned int addr; + + if (pciDevNum > 32) /* illegal device Number */ + return; + if (pciDevNum == SELF) { /* configure our configuration space. */ + pciDevNum = + (GTREGREAD (pci_p2p_configuration_reg[host]) >> 24) & + 0x1f; + busNum = GTREGREAD (pci_p2p_configuration_reg[host]) & + 0xff0000; + } + functionNum = regOffset & 0x00000700; + pciDevNum = pciDevNum << 11; + regOffset = regOffset & 0xfc; + DataForAddrReg = + (regOffset | pciDevNum | functionNum | busNum) | BIT31; + GT_REG_WRITE (pci_configuration_address[host], DataForAddrReg); + GT_REG_READ (pci_configuration_address[host], &addr); + if (addr != DataForAddrReg) + return; + GT_REG_WRITE (pci_configuration_data[host], data); } /******************************************************************** @@ -113,30 +130,34 @@ void pciWriteConfigReg(PCI_HOST host, unsigned int regOffset,unsigned int pciDev * |Enable| |Number|Number| Number | Number | | <=field Name * *********************************************************************/ -unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,unsigned int pciDevNum) +unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset, + unsigned int pciDevNum) { - volatile unsigned int DataForAddrReg; + volatile unsigned int DataForAddrReg; unsigned int data; - unsigned int functionNum; - unsigned int busNum = PCI_BUS(pciDevNum); - - if(pciDevNum > 32) /* illegal device Number */ - return 0xffffffff; - if(pciDevNum == SELF) /* configure our configuration space. */ - { - pciDevNum = (GTREGREAD(pci_p2p_configuration_reg[host]) >> 24) & 0x1f; - busNum = GTREGREAD(pci_p2p_configuration_reg[host]) & 0xff0000; - } - functionNum = regOffset & 0x00000700; - pciDevNum = pciDevNum << 11; - regOffset = regOffset & 0xfc; - DataForAddrReg = (regOffset | pciDevNum | functionNum | busNum) | BIT31 ; - GT_REG_WRITE(pci_configuration_address[host],DataForAddrReg); - GT_REG_READ(pci_configuration_address[host], &data); - if (data != DataForAddrReg) - return 0xffffffff; - GT_REG_READ(pci_configuration_data[host], &data); - return data; + unsigned int functionNum; + unsigned int busNum = PCI_BUS (pciDevNum); + + if (pciDevNum > 32) /* illegal device Number */ + return 0xffffffff; + if (pciDevNum == SELF) { /* configure our configuration space. */ + pciDevNum = + (GTREGREAD (pci_p2p_configuration_reg[host]) >> 24) & + 0x1f; + busNum = GTREGREAD (pci_p2p_configuration_reg[host]) & + 0xff0000; + } + functionNum = regOffset & 0x00000700; + pciDevNum = pciDevNum << 11; + regOffset = regOffset & 0xfc; + DataForAddrReg = + (regOffset | pciDevNum | functionNum | busNum) | BIT31; + GT_REG_WRITE (pci_configuration_address[host], DataForAddrReg); + GT_REG_READ (pci_configuration_address[host], &data); + if (data != DataForAddrReg) + return 0xffffffff; + GT_REG_READ (pci_configuration_data[host], &data); + return data; } /******************************************************************** @@ -161,37 +182,32 @@ unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,unsigned in * PCI spec referring to P2P. * *********************************************************************/ -void pciOverBridgeWriteConfigReg(PCI_HOST host, - unsigned int regOffset, - unsigned int pciDevNum, - unsigned int busNum,unsigned int data) +void pciOverBridgeWriteConfigReg (PCI_HOST host, + unsigned int regOffset, + unsigned int pciDevNum, + unsigned int busNum, unsigned int data) { - unsigned int DataForReg; - unsigned int functionNum; - - functionNum = regOffset & 0x00000700; - pciDevNum = pciDevNum << 11; - regOffset = regOffset & 0xff; - busNum = busNum << 16; - if(pciDevNum == SELF) /* This board */ - { - DataForReg = ( regOffset | pciDevNum | functionNum) | BIT0; - } - else - { - DataForReg = ( regOffset | pciDevNum | functionNum | busNum) | - BIT31 | BIT0; - } - GT_REG_WRITE(pci_configuration_address[host],DataForReg); - if(pciDevNum == SELF) /* This board */ - { - GT_REG_WRITE(pci_configuration_data[host],data); - } - else /* configuration Transaction over the pci. */ - { - /* The PCI is working in LE Mode So it swap the Data. */ - GT_REG_WRITE(pci_configuration_data[host],WORD_SWAP(data)); - } + unsigned int DataForReg; + unsigned int functionNum; + + functionNum = regOffset & 0x00000700; + pciDevNum = pciDevNum << 11; + regOffset = regOffset & 0xff; + busNum = busNum << 16; + if (pciDevNum == SELF) { /* This board */ + DataForReg = (regOffset | pciDevNum | functionNum) | BIT0; + } else { + DataForReg = (regOffset | pciDevNum | functionNum | busNum) | + BIT31 | BIT0; + } + GT_REG_WRITE (pci_configuration_address[host], DataForReg); + if (pciDevNum == SELF) { /* This board */ + GT_REG_WRITE (pci_configuration_data[host], data); + } else { /* configuration Transaction over the pci. */ + + /* The PCI is working in LE Mode So it swap the Data. */ + GT_REG_WRITE (pci_configuration_data[host], WORD_SWAP (data)); + } } @@ -216,39 +232,35 @@ void pciOverBridgeWriteConfigReg(PCI_HOST host, * |Enable| |Number|Number| Number | Number | | <=field Name * *********************************************************************/ -unsigned int pciOverBridgeReadConfigReg(PCI_HOST host, - unsigned int regOffset, - unsigned int pciDevNum, - unsigned int busNum) +unsigned int pciOverBridgeReadConfigReg (PCI_HOST host, + unsigned int regOffset, + unsigned int pciDevNum, + unsigned int busNum) { - unsigned int DataForReg; - unsigned int data; - unsigned int functionNum; - - functionNum = regOffset & 0x00000700; - pciDevNum = pciDevNum << 11; - regOffset = regOffset & 0xff; - busNum = busNum << 16; - if (pciDevNum == SELF) /* This board */ - { - DataForReg = (regOffset | pciDevNum | functionNum) | BIT31 ; - } - else /* agent on another bus */ - { - DataForReg = (regOffset | pciDevNum | functionNum | busNum) | - BIT0 | BIT31 ; - } - GT_REG_WRITE(pci_configuration_address[host],DataForReg); - if (pciDevNum == SELF) /* This board */ - { - GT_REG_READ(pci_configuration_data[host], &data); - return data; - } - else /* The PCI is working in LE Mode So it swap the Data. */ - { - GT_REG_READ(pci_configuration_data[host], &data); - return WORD_SWAP(data); - } + unsigned int DataForReg; + unsigned int data; + unsigned int functionNum; + + functionNum = regOffset & 0x00000700; + pciDevNum = pciDevNum << 11; + regOffset = regOffset & 0xff; + busNum = busNum << 16; + if (pciDevNum == SELF) { /* This board */ + DataForReg = (regOffset | pciDevNum | functionNum) | BIT31; + } else { /* agent on another bus */ + + DataForReg = (regOffset | pciDevNum | functionNum | busNum) | + BIT0 | BIT31; + } + GT_REG_WRITE (pci_configuration_address[host], DataForReg); + if (pciDevNum == SELF) { /* This board */ + GT_REG_READ (pci_configuration_data[host], &data); + return data; + } else { /* The PCI is working in LE Mode So it swap the Data. */ + + GT_REG_READ (pci_configuration_data[host], &data); + return WORD_SWAP (data); + } } /******************************************************************** @@ -258,95 +270,117 @@ unsigned int pciOverBridgeReadConfigReg(PCI_HOST host, * OUTPUT: N/A * RETURNS: PCI register base address *********************************************************************/ -static unsigned int pciGetRegOffset(PCI_HOST host, PCI_REGION region) +static unsigned int pciGetRegOffset (PCI_HOST host, PCI_REGION region) { - switch (host) - { + switch (host) { case PCI_HOST0: - switch(region) { - case PCI_IO: return PCI_0I_O_LOW_DECODE_ADDRESS; - case PCI_REGION0: return PCI_0MEMORY0_LOW_DECODE_ADDRESS; - case PCI_REGION1: return PCI_0MEMORY1_LOW_DECODE_ADDRESS; - case PCI_REGION2: return PCI_0MEMORY2_LOW_DECODE_ADDRESS; - case PCI_REGION3: return PCI_0MEMORY3_LOW_DECODE_ADDRESS; - } + switch (region) { + case PCI_IO: + return PCI_0I_O_LOW_DECODE_ADDRESS; + case PCI_REGION0: + return PCI_0MEMORY0_LOW_DECODE_ADDRESS; + case PCI_REGION1: + return PCI_0MEMORY1_LOW_DECODE_ADDRESS; + case PCI_REGION2: + return PCI_0MEMORY2_LOW_DECODE_ADDRESS; + case PCI_REGION3: + return PCI_0MEMORY3_LOW_DECODE_ADDRESS; + } case PCI_HOST1: - switch(region) { - case PCI_IO: return PCI_1I_O_LOW_DECODE_ADDRESS; - case PCI_REGION0: return PCI_1MEMORY0_LOW_DECODE_ADDRESS; - case PCI_REGION1: return PCI_1MEMORY1_LOW_DECODE_ADDRESS; - case PCI_REGION2: return PCI_1MEMORY2_LOW_DECODE_ADDRESS; - case PCI_REGION3: return PCI_1MEMORY3_LOW_DECODE_ADDRESS; - } - } - return PCI_0MEMORY0_LOW_DECODE_ADDRESS; + switch (region) { + case PCI_IO: + return PCI_1I_O_LOW_DECODE_ADDRESS; + case PCI_REGION0: + return PCI_1MEMORY0_LOW_DECODE_ADDRESS; + case PCI_REGION1: + return PCI_1MEMORY1_LOW_DECODE_ADDRESS; + case PCI_REGION2: + return PCI_1MEMORY2_LOW_DECODE_ADDRESS; + case PCI_REGION3: + return PCI_1MEMORY3_LOW_DECODE_ADDRESS; + } + } + return PCI_0MEMORY0_LOW_DECODE_ADDRESS; } -static unsigned int pciGetRemapOffset(PCI_HOST host, PCI_REGION region) +static unsigned int pciGetRemapOffset (PCI_HOST host, PCI_REGION region) { - switch (host) - { + switch (host) { case PCI_HOST0: - switch(region) { - case PCI_IO: return PCI_0I_O_ADDRESS_REMAP; - case PCI_REGION0: return PCI_0MEMORY0_ADDRESS_REMAP; - case PCI_REGION1: return PCI_0MEMORY1_ADDRESS_REMAP; - case PCI_REGION2: return PCI_0MEMORY2_ADDRESS_REMAP; - case PCI_REGION3: return PCI_0MEMORY3_ADDRESS_REMAP; - } + switch (region) { + case PCI_IO: + return PCI_0I_O_ADDRESS_REMAP; + case PCI_REGION0: + return PCI_0MEMORY0_ADDRESS_REMAP; + case PCI_REGION1: + return PCI_0MEMORY1_ADDRESS_REMAP; + case PCI_REGION2: + return PCI_0MEMORY2_ADDRESS_REMAP; + case PCI_REGION3: + return PCI_0MEMORY3_ADDRESS_REMAP; + } case PCI_HOST1: - switch(region) { - case PCI_IO: return PCI_1I_O_ADDRESS_REMAP; - case PCI_REGION0: return PCI_1MEMORY0_ADDRESS_REMAP; - case PCI_REGION1: return PCI_1MEMORY1_ADDRESS_REMAP; - case PCI_REGION2: return PCI_1MEMORY2_ADDRESS_REMAP; - case PCI_REGION3: return PCI_1MEMORY3_ADDRESS_REMAP; - } - } - return PCI_0MEMORY0_ADDRESS_REMAP; + switch (region) { + case PCI_IO: + return PCI_1I_O_ADDRESS_REMAP; + case PCI_REGION0: + return PCI_1MEMORY0_ADDRESS_REMAP; + case PCI_REGION1: + return PCI_1MEMORY1_ADDRESS_REMAP; + case PCI_REGION2: + return PCI_1MEMORY2_ADDRESS_REMAP; + case PCI_REGION3: + return PCI_1MEMORY3_ADDRESS_REMAP; + } + } + return PCI_0MEMORY0_ADDRESS_REMAP; } -bool pciMapSpace(PCI_HOST host, PCI_REGION region, unsigned int remapBase, unsigned int bankBase,unsigned int bankLength) +bool pciMapSpace (PCI_HOST host, PCI_REGION region, unsigned int remapBase, + unsigned int bankBase, unsigned int bankLength) { - unsigned int low=0xfff; - unsigned int high=0x0; - unsigned int regOffset=pciGetRegOffset(host, region); - unsigned int remapOffset=pciGetRemapOffset(host, region); - - if(bankLength!=0) { - low = (bankBase >> 20) & 0xfff; - high=((bankBase+bankLength)>>20)-1; - } - - GT_REG_WRITE(regOffset, low | (1<<24)); /* no swapping */ - GT_REG_WRITE(regOffset+8, high); - - if(bankLength!=0) { /* must do AFTER writing maps */ - GT_REG_WRITE(remapOffset, remapBase>>20); /* sorry, 32 bits only. - dont support upper 32 - in this driver */ - } - return true; + unsigned int low = 0xfff; + unsigned int high = 0x0; + unsigned int regOffset = pciGetRegOffset (host, region); + unsigned int remapOffset = pciGetRemapOffset (host, region); + + if (bankLength != 0) { + low = (bankBase >> 20) & 0xfff; + high = ((bankBase + bankLength) >> 20) - 1; + } + + GT_REG_WRITE (regOffset, low | (1 << 24)); /* no swapping */ + GT_REG_WRITE (regOffset + 8, high); + + if (bankLength != 0) { /* must do AFTER writing maps */ + GT_REG_WRITE (remapOffset, remapBase >> 20); /* sorry, 32 bits only. + dont support upper 32 + in this driver */ + } + return true; } -unsigned int pciGetSpaceBase(PCI_HOST host, PCI_REGION region) +unsigned int pciGetSpaceBase (PCI_HOST host, PCI_REGION region) { - unsigned int low; - unsigned int regOffset=pciGetRegOffset(host, region); - GT_REG_READ(regOffset,&low); - return (low&0xfff)<<20; + unsigned int low; + unsigned int regOffset = pciGetRegOffset (host, region); + + GT_REG_READ (regOffset, &low); + return (low & 0xfff) << 20; } -unsigned int pciGetSpaceSize(PCI_HOST host, PCI_REGION region) +unsigned int pciGetSpaceSize (PCI_HOST host, PCI_REGION region) { - unsigned int low,high; - unsigned int regOffset=pciGetRegOffset(host, region); - GT_REG_READ(regOffset,&low); - GT_REG_READ(regOffset+8,&high); - high&=0xfff; - low&=0xfff; - if(high<=low) return 0; - return (high+1-low)<<20; + unsigned int low, high; + unsigned int regOffset = pciGetRegOffset (host, region); + + GT_REG_READ (regOffset, &low); + GT_REG_READ (regOffset + 8, &high); + high &= 0xfff; + low &= 0xfff; + if (high <= low) + return 0; + return (high + 1 - low) << 20; } /******************************************************************** @@ -354,15 +388,19 @@ unsigned int pciGetSpaceSize(PCI_HOST host, PCI_REGION region) * * Inputs: base and size of PCI SCS *********************************************************************/ -void pciMapMemoryBank(PCI_HOST host, MEMORY_BANK bank, unsigned int pciDramBase,unsigned int pciDramSize) +void pciMapMemoryBank (PCI_HOST host, MEMORY_BANK bank, + unsigned int pciDramBase, unsigned int pciDramSize) { pciDramBase = pciDramBase & 0xfffff000; - pciDramBase = pciDramBase | (pciReadConfigReg(host, - PCI_SCS_0_BASE_ADDRESS + 4*bank,SELF) & 0x00000fff); - pciWriteConfigReg(host,PCI_SCS_0_BASE_ADDRESS + 4*bank,SELF,pciDramBase); - if(pciDramSize == 0) - pciDramSize ++; - GT_REG_WRITE(pci_scs_bank_size[host][bank], pciDramSize-1); + pciDramBase = pciDramBase | (pciReadConfigReg (host, + PCI_SCS_0_BASE_ADDRESS + + 4 * bank, + SELF) & 0x00000fff); + pciWriteConfigReg (host, PCI_SCS_0_BASE_ADDRESS + 4 * bank, SELF, + pciDramBase); + if (pciDramSize == 0) + pciDramSize++; + GT_REG_WRITE (pci_scs_bank_size[host][bank], pciDramSize - 1); } @@ -377,31 +415,33 @@ void pciMapMemoryBank(PCI_HOST host, MEMORY_BANK bank, unsigned int pciDramBase, * unsigned int topAddress - The region top Address. * Returns: false if one of the parameters is erroneous true otherwise. *********************************************************************/ -bool pciSetRegionFeatures(PCI_HOST host, PCI_ACCESS_REGIONS region,unsigned int features, - unsigned int baseAddress,unsigned int regionLength) +bool pciSetRegionFeatures (PCI_HOST host, PCI_ACCESS_REGIONS region, + unsigned int features, unsigned int baseAddress, + unsigned int regionLength) { - unsigned int accessLow; - unsigned int accessHigh; - unsigned int accessTop = baseAddress + regionLength; + unsigned int accessLow; + unsigned int accessHigh; + unsigned int accessTop = baseAddress + regionLength; - if(regionLength == 0) /* close the region. */ - { - pciDisableAccessRegion(host, region); + if (regionLength == 0) { /* close the region. */ + pciDisableAccessRegion (host, region); + return true; + } + /* base Address is store is bits [11:0] */ + accessLow = (baseAddress & 0xfff00000) >> 20; + /* All the features are update according to the defines in pci.h (to be on + the safe side we disable bits: [11:0] */ + accessLow = accessLow | (features & 0xfffff000); + /* write to the Low Access Region register */ + GT_REG_WRITE (pci_access_control_base_0_low[host] + 0x10 * region, + accessLow); + + accessHigh = (accessTop & 0xfff00000) >> 20; + + /* write to the High Access Region register */ + GT_REG_WRITE (pci_access_control_top_0[host] + 0x10 * region, + accessHigh - 1); return true; - } - /* base Address is store is bits [11:0] */ - accessLow = (baseAddress & 0xfff00000) >> 20; - /* All the features are update according to the defines in pci.h (to be on - the safe side we disable bits: [11:0] */ - accessLow = accessLow | (features & 0xfffff000); - /* write to the Low Access Region register */ - GT_REG_WRITE( pci_access_control_base_0_low[host] + 0x10*region,accessLow); - - accessHigh = (accessTop & 0xfff00000) >> 20; - - /* write to the High Access Region register */ - GT_REG_WRITE(pci_access_control_top_0[host] + 0x10*region,accessHigh - 1); - return true; } /******************************************************************** @@ -411,11 +451,12 @@ bool pciSetRegionFeatures(PCI_HOST host, PCI_ACCESS_REGIONS region,unsigned int * Inputs: PCI_ACCESS_REGIONS region - The region we to be Disabled. * Returns: N/A. *********************************************************************/ -void pciDisableAccessRegion(PCI_HOST host, PCI_ACCESS_REGIONS region) +void pciDisableAccessRegion (PCI_HOST host, PCI_ACCESS_REGIONS region) { - /* writing back the registers default values. */ - GT_REG_WRITE(pci_access_control_base_0_low[host] + 0x10*region,0x01001fff); - GT_REG_WRITE(pci_access_control_top_0[host] + 0x10*region,0); + /* writing back the registers default values. */ + GT_REG_WRITE (pci_access_control_base_0_low[host] + 0x10 * region, + 0x01001fff); + GT_REG_WRITE (pci_access_control_top_0[host] + 0x10 * region, 0); } /******************************************************************** @@ -424,13 +465,13 @@ void pciDisableAccessRegion(PCI_HOST host, PCI_ACCESS_REGIONS region) * Inputs: N/A * Returns: true. *********************************************************************/ -bool pciArbiterEnable(PCI_HOST host) +bool pciArbiterEnable (PCI_HOST host) { - unsigned int regData; + unsigned int regData; - GT_REG_READ(pci_arbiter_control[host],®Data); - GT_REG_WRITE(pci_arbiter_control[host],regData | BIT31); - return true; + GT_REG_READ (pci_arbiter_control[host], ®Data); + GT_REG_WRITE (pci_arbiter_control[host], regData | BIT31); + return true; } /******************************************************************** @@ -439,13 +480,13 @@ bool pciArbiterEnable(PCI_HOST host) * Inputs: N/A * Returns: true *********************************************************************/ -bool pciArbiterDisable(PCI_HOST host) +bool pciArbiterDisable (PCI_HOST host) { - unsigned int regData; + unsigned int regData; - GT_REG_READ(pci_arbiter_control[host],®Data); - GT_REG_WRITE(pci_arbiter_control[host],regData & 0x7fffffff); - return true; + GT_REG_READ (pci_arbiter_control[host], ®Data); + GT_REG_WRITE (pci_arbiter_control[host], regData & 0x7fffffff); + return true; } /******************************************************************** @@ -463,7 +504,7 @@ bool pciArbiterDisable(PCI_HOST host) * PCI_AGENT_PARK externalAgent5 - parking Disable for external#5 agent. * Returns: true *********************************************************************/ -bool pciParkingDisable(PCI_HOST host, PCI_AGENT_PARK internalAgent, +bool pciParkingDisable (PCI_HOST host, PCI_AGENT_PARK internalAgent, PCI_AGENT_PARK externalAgent0, PCI_AGENT_PARK externalAgent1, PCI_AGENT_PARK externalAgent2, @@ -471,17 +512,17 @@ bool pciParkingDisable(PCI_HOST host, PCI_AGENT_PARK internalAgent, PCI_AGENT_PARK externalAgent4, PCI_AGENT_PARK externalAgent5) { - unsigned int regData; - unsigned int writeData; + unsigned int regData; + unsigned int writeData; - GT_REG_READ(pci_arbiter_control[host],®Data); - writeData = (internalAgent << 14) + (externalAgent0 << 15) + \ - (externalAgent1 << 16) + (externalAgent2 << 17) + \ - (externalAgent3 << 18) + (externalAgent4 << 19) + \ + GT_REG_READ (pci_arbiter_control[host], ®Data); + writeData = (internalAgent << 14) + (externalAgent0 << 15) + + (externalAgent1 << 16) + (externalAgent2 << 17) + + (externalAgent3 << 18) + (externalAgent4 << 19) + (externalAgent5 << 20); - regData = (regData & ~(0x7f<<14)) | writeData; - GT_REG_WRITE(pci_arbiter_control[host],regData); - return true; + regData = (regData & ~(0x7f << 14)) | writeData; + GT_REG_WRITE (pci_arbiter_control[host], regData); + return true; } /******************************************************************** @@ -497,65 +538,66 @@ bool pciParkingDisable(PCI_HOST host, PCI_AGENT_PARK internalAgent, * regionLength - Region length. * Returns: false if one of the parameters is wrong otherwise return true. *********************************************************************/ -bool pciSetRegionSnoopMode(PCI_HOST host, PCI_SNOOP_REGION region,PCI_SNOOP_TYPE snoopType, +bool pciSetRegionSnoopMode (PCI_HOST host, PCI_SNOOP_REGION region, + PCI_SNOOP_TYPE snoopType, unsigned int baseAddress, unsigned int regionLength) { - unsigned int snoopXbaseAddress; - unsigned int snoopXtopAddress; - unsigned int data; - unsigned int snoopHigh = baseAddress + regionLength; - - if( (region > PCI_SNOOP_REGION3) || (snoopType > PCI_SNOOP_WB) ) - return false; - snoopXbaseAddress = pci_snoop_control_base_0_low[host] + 0x10 * region; - snoopXtopAddress = pci_snoop_control_top_0[host] + 0x10 * region; - if(regionLength == 0) /* closing the region */ - { - GT_REG_WRITE(snoopXbaseAddress,0x0000ffff); - GT_REG_WRITE(snoopXtopAddress,0); + unsigned int snoopXbaseAddress; + unsigned int snoopXtopAddress; + unsigned int data; + unsigned int snoopHigh = baseAddress + regionLength; + + if ((region > PCI_SNOOP_REGION3) || (snoopType > PCI_SNOOP_WB)) + return false; + snoopXbaseAddress = + pci_snoop_control_base_0_low[host] + 0x10 * region; + snoopXtopAddress = pci_snoop_control_top_0[host] + 0x10 * region; + if (regionLength == 0) { /* closing the region */ + GT_REG_WRITE (snoopXbaseAddress, 0x0000ffff); + GT_REG_WRITE (snoopXtopAddress, 0); + return true; + } + baseAddress = baseAddress & 0xfff00000; /* Granularity of 1MByte */ + data = (baseAddress >> 20) | snoopType << 12; + GT_REG_WRITE (snoopXbaseAddress, data); + snoopHigh = (snoopHigh & 0xfff00000) >> 20; + GT_REG_WRITE (snoopXtopAddress, snoopHigh - 1); return true; - } - baseAddress = baseAddress & 0xfff00000; /* Granularity of 1MByte */ - data = (baseAddress >> 20) | snoopType << 12; - GT_REG_WRITE(snoopXbaseAddress,data); - snoopHigh = (snoopHigh & 0xfff00000) >> 20; - GT_REG_WRITE(snoopXtopAddress,snoopHigh - 1); - return true; } /* * */ -static int gt_read_config_dword(struct pci_controller *hose, - pci_dev_t dev, - int offset, u32* value) +static int gt_read_config_dword (struct pci_controller *hose, + pci_dev_t dev, int offset, u32 * value) { - int bus = PCI_BUS(dev); + int bus = PCI_BUS (dev); - if ((bus == local_buses[0]) || (bus == local_buses[1])){ - *value = pciReadConfigReg((PCI_HOST) hose->cfg_addr, offset, - PCI_DEV(dev)); + if ((bus == local_buses[0]) || (bus == local_buses[1])) { + *value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr, offset, + PCI_DEV (dev)); } else { - *value = pciOverBridgeReadConfigReg((PCI_HOST) hose->cfg_addr, - offset, PCI_DEV(dev), bus); + *value = pciOverBridgeReadConfigReg ((PCI_HOST) hose-> + cfg_addr, offset, + PCI_DEV (dev), bus); } return 0; } -static int gt_write_config_dword(struct pci_controller *hose, - pci_dev_t dev, - int offset, u32 value) +static int gt_write_config_dword (struct pci_controller *hose, + pci_dev_t dev, int offset, u32 value) { - int bus = PCI_BUS(dev); + int bus = PCI_BUS (dev); - if ((bus == local_buses[0]) || (bus == local_buses[1])){ - pciWriteConfigReg((PCI_HOST)hose->cfg_addr, offset, - PCI_DEV(dev), value); + if ((bus == local_buses[0]) || (bus == local_buses[1])) { + pciWriteConfigReg ((PCI_HOST) hose->cfg_addr, offset, + PCI_DEV (dev), value); } else { - pciOverBridgeWriteConfigReg((PCI_HOST)hose->cfg_addr, offset, - PCI_DEV(dev), value, bus); + pciOverBridgeWriteConfigReg ((PCI_HOST) hose->cfg_addr, + offset, PCI_DEV (dev), value, + bus); } return 0; } @@ -564,147 +606,145 @@ static int gt_write_config_dword(struct pci_controller *hose, * */ -static void gt_setup_ide(struct pci_controller *hose, - pci_dev_t dev, struct pci_config_table *entry) +static void gt_setup_ide (struct pci_controller *hose, + pci_dev_t dev, struct pci_config_table *entry) { - static const int ide_bar[]={8,4,8,4,0,0}; - u32 bar_response, bar_value; - int bar; - - for (bar=0; bar<6; bar++) - { - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar*4, 0x0); - pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + bar*4, &bar_response); - - pciauto_region_allocate(bar_response & PCI_BASE_ADDRESS_SPACE_IO ? - hose->pci_io : hose->pci_mem, ide_bar[bar], &bar_value); - - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar*4, bar_value); - } + static const int ide_bar[] = { 8, 4, 8, 4, 0, 0 }; + u32 bar_response, bar_value; + int bar; + + for (bar = 0; bar < 6; bar++) { + pci_write_config_dword (dev, PCI_BASE_ADDRESS_0 + bar * 4, + 0x0); + pci_read_config_dword (dev, PCI_BASE_ADDRESS_0 + bar * 4, + &bar_response); + + pciauto_region_allocate (bar_response & + PCI_BASE_ADDRESS_SPACE_IO ? hose-> + pci_io : hose->pci_mem, ide_bar[bar], + &bar_value); + + pci_write_config_dword (dev, PCI_BASE_ADDRESS_0 + bar * 4, + bar_value); + } } -static void gt_fixup_irq(struct pci_controller *hose, pci_dev_t dev) +static void gt_fixup_irq (struct pci_controller *hose, pci_dev_t dev) { - unsigned char pin, irq; + unsigned char pin, irq; - pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); + pci_read_config_byte (dev, PCI_INTERRUPT_PIN, &pin); - if(pin == 1) { /* only allow INT A */ - irq = pci_irq_swizzle[(PCI_HOST)hose->cfg_addr][PCI_DEV(dev)]; - if(irq) - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); - } + if (pin == 1) { /* only allow INT A */ + irq = pci_irq_swizzle[(PCI_HOST) hose-> + cfg_addr][PCI_DEV (dev)]; + if (irq) + pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq); + } } struct pci_config_table gt_config_table[] = { - { PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE, - PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, gt_setup_ide}, + {PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE, + PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, gt_setup_ide}, - { } + {} }; struct pci_controller pci0_hose = { - fixup_irq: gt_fixup_irq, - config_table: gt_config_table, + fixup_irq:gt_fixup_irq, + config_table:gt_config_table, }; struct pci_controller pci1_hose = { - fixup_irq: gt_fixup_irq, - config_table: gt_config_table, + fixup_irq:gt_fixup_irq, + config_table:gt_config_table, }; -void -pci_init_board(void) +void pci_init_board (void) { - unsigned int command; - - pci0_hose.first_busno = 0; - pci0_hose.last_busno = 0xff; - local_buses[0] = pci0_hose.first_busno; - /* PCI memory space */ - pci_set_region(pci0_hose.regions + 0, - CFG_PCI0_0_MEM_SPACE, - CFG_PCI0_0_MEM_SPACE, - CFG_PCI0_MEM_SIZE, - PCI_REGION_MEM); - - /* PCI I/O space */ - pci_set_region(pci0_hose.regions + 1, - CFG_PCI0_IO_SPACE_PCI, - CFG_PCI0_IO_SPACE, - CFG_PCI0_IO_SIZE, - PCI_REGION_IO); - - pci_set_ops(&pci0_hose, - pci_hose_read_config_byte_via_dword, - pci_hose_read_config_word_via_dword, - gt_read_config_dword, - pci_hose_write_config_byte_via_dword, - pci_hose_write_config_word_via_dword, - gt_write_config_dword); - - pci0_hose.region_count = 2; - - pci0_hose.cfg_addr = (unsigned int*) PCI_HOST0; - - pci_register_hose(&pci0_hose); - - pciArbiterEnable(PCI_HOST0); - pciParkingDisable(PCI_HOST0,1,1,1,1,1,1,1); - - command = pciReadConfigReg(PCI_HOST0, PCI_COMMAND, SELF); - command |= PCI_COMMAND_MASTER; - pciWriteConfigReg(PCI_HOST0, PCI_COMMAND, SELF, command); - - pci0_hose.last_busno = pci_hose_scan(&pci0_hose); - - command = pciReadConfigReg(PCI_HOST0, PCI_COMMAND, SELF); - command |= PCI_COMMAND_MEMORY; - pciWriteConfigReg(PCI_HOST0, PCI_COMMAND, SELF, command); - - pci1_hose.first_busno = pci0_hose.last_busno + 1; - pci1_hose.last_busno = 0xff; - pci1_hose.current_busno = pci0_hose.current_busno; - local_buses[1] = pci1_hose.first_busno; - - /* PCI memory space */ - pci_set_region(pci1_hose.regions + 0, - CFG_PCI1_0_MEM_SPACE, - CFG_PCI1_0_MEM_SPACE, - CFG_PCI1_MEM_SIZE, - PCI_REGION_MEM); - - /* PCI I/O space */ - pci_set_region(pci1_hose.regions + 1, - CFG_PCI1_IO_SPACE_PCI, - CFG_PCI1_IO_SPACE, - CFG_PCI1_IO_SIZE, - PCI_REGION_IO); - - pci_set_ops(&pci1_hose, - pci_hose_read_config_byte_via_dword, - pci_hose_read_config_word_via_dword, - gt_read_config_dword, - pci_hose_write_config_byte_via_dword, - pci_hose_write_config_word_via_dword, - gt_write_config_dword); - - pci1_hose.region_count = 2; - - pci1_hose.cfg_addr = (unsigned int*) PCI_HOST1; - - pci_register_hose(&pci1_hose); - - pciArbiterEnable(PCI_HOST1); - pciParkingDisable(PCI_HOST1,1,1,1,1,1,1,1); - - command = pciReadConfigReg(PCI_HOST1, PCI_COMMAND, SELF); - command |= PCI_COMMAND_MASTER; - pciWriteConfigReg(PCI_HOST1, PCI_COMMAND, SELF, command); - - pci1_hose.last_busno = pci_hose_scan(&pci1_hose); - - command = pciReadConfigReg(PCI_HOST1, PCI_COMMAND, SELF); - command |= PCI_COMMAND_MEMORY; - pciWriteConfigReg(PCI_HOST1, PCI_COMMAND, SELF, command); + unsigned int command; + + pci0_hose.first_busno = 0; + pci0_hose.last_busno = 0xff; + local_buses[0] = pci0_hose.first_busno; + /* PCI memory space */ + pci_set_region (pci0_hose.regions + 0, + CFG_PCI0_0_MEM_SPACE, + CFG_PCI0_0_MEM_SPACE, + CFG_PCI0_MEM_SIZE, PCI_REGION_MEM); + + /* PCI I/O space */ + pci_set_region (pci0_hose.regions + 1, + CFG_PCI0_IO_SPACE_PCI, + CFG_PCI0_IO_SPACE, CFG_PCI0_IO_SIZE, PCI_REGION_IO); + + pci_set_ops (&pci0_hose, + pci_hose_read_config_byte_via_dword, + pci_hose_read_config_word_via_dword, + gt_read_config_dword, + pci_hose_write_config_byte_via_dword, + pci_hose_write_config_word_via_dword, + gt_write_config_dword); + + pci0_hose.region_count = 2; + + pci0_hose.cfg_addr = (unsigned int *) PCI_HOST0; + + pci_register_hose (&pci0_hose); + + pciArbiterEnable (PCI_HOST0); + pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1); + + command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF); + command |= PCI_COMMAND_MASTER; + pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command); + + pci0_hose.last_busno = pci_hose_scan (&pci0_hose); + + command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF); + command |= PCI_COMMAND_MEMORY; + pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command); + + pci1_hose.first_busno = pci0_hose.last_busno + 1; + pci1_hose.last_busno = 0xff; + pci1_hose.current_busno = pci0_hose.current_busno; + local_buses[1] = pci1_hose.first_busno; + + /* PCI memory space */ + pci_set_region (pci1_hose.regions + 0, + CFG_PCI1_0_MEM_SPACE, + CFG_PCI1_0_MEM_SPACE, + CFG_PCI1_MEM_SIZE, PCI_REGION_MEM); + + /* PCI I/O space */ + pci_set_region (pci1_hose.regions + 1, + CFG_PCI1_IO_SPACE_PCI, + CFG_PCI1_IO_SPACE, CFG_PCI1_IO_SIZE, PCI_REGION_IO); + + pci_set_ops (&pci1_hose, + pci_hose_read_config_byte_via_dword, + pci_hose_read_config_word_via_dword, + gt_read_config_dword, + pci_hose_write_config_byte_via_dword, + pci_hose_write_config_word_via_dword, + gt_write_config_dword); + + pci1_hose.region_count = 2; + + pci1_hose.cfg_addr = (unsigned int *) PCI_HOST1; + + pci_register_hose (&pci1_hose); + + pciArbiterEnable (PCI_HOST1); + pciParkingDisable (PCI_HOST1, 1, 1, 1, 1, 1, 1, 1); + + command = pciReadConfigReg (PCI_HOST1, PCI_COMMAND, SELF); + command |= PCI_COMMAND_MASTER; + pciWriteConfigReg (PCI_HOST1, PCI_COMMAND, SELF, command); + + pci1_hose.last_busno = pci_hose_scan (&pci1_hose); + + command = pciReadConfigReg (PCI_HOST1, PCI_COMMAND, SELF); + command |= PCI_COMMAND_MEMORY; + pciWriteConfigReg (PCI_HOST1, PCI_COMMAND, SELF, command); } diff --git a/board/evb64260/sdram_init.c b/board/evb64260/sdram_init.c index d019d22..d9318d5 100644 --- a/board/evb64260/sdram_init.c +++ b/board/evb64260/sdram_init.c @@ -54,65 +54,64 @@ typedef struct sdram_info { uchar tras_clocks; uchar burst_len; uchar banks, slot; - int size; /* detected size, not from I2C but from dram_size() */ + int size; /* detected size, not from I2C but from dram_size() */ } sdram_info_t; #ifdef DEBUG -void dump_dimm_info(struct sdram_info *d) +void dump_dimm_info (struct sdram_info *d) { - static const char *ecc_legend[]={""," Parity"," ECC"}; - printf("dimm%s %sDRAM: %dMibytes:\n", - ecc_legend[d->ecc], - d->registered?"R":"", - (d->size>>20)); - printf(" drb=%d tpar=%d tras=%d burstlen=%d banks=%d slot=%d\n", - d->drb_size, d->tpar, d->tras_clocks, d->burst_len, - d->banks, d->slot); + static const char *ecc_legend[] = { "", " Parity", " ECC" }; + + printf ("dimm%s %sDRAM: %dMibytes:\n", + ecc_legend[d->ecc], + d->registered ? "R" : "", (d->size >> 20)); + printf (" drb=%d tpar=%d tras=%d burstlen=%d banks=%d slot=%d\n", + d->drb_size, d->tpar, d->tras_clocks, d->burst_len, + d->banks, d->slot); } #endif static int -memory_map_bank(unsigned int bankNo, - unsigned int bankBase, - unsigned int bankLength) +memory_map_bank (unsigned int bankNo, + unsigned int bankBase, unsigned int bankLength) { #ifdef DEBUG if (bankLength > 0) { - printf("mapping bank %d at %08x - %08x\n", - bankNo, bankBase, bankBase + bankLength - 1); + printf ("mapping bank %d at %08x - %08x\n", + bankNo, bankBase, bankBase + bankLength - 1); } else { - printf("unmapping bank %d\n", bankNo); + printf ("unmapping bank %d\n", bankNo); } #endif - memoryMapBank(bankNo, bankBase, bankLength); + memoryMapBank (bankNo, bankBase, bankLength); return 0; } #ifdef MAP_PCI static int -memory_map_bank_pci(unsigned int bankNo, - unsigned int bankBase, - unsigned int bankLength) +memory_map_bank_pci (unsigned int bankNo, + unsigned int bankBase, unsigned int bankLength) { PCI_HOST host; - for (host=PCI_HOST0;host<=PCI_HOST1;host++) { - const int features= + + for (host = PCI_HOST0; host <= PCI_HOST1; host++) { + const int features = PREFETCH_ENABLE | DELAYED_READ_ENABLE | AGGRESSIVE_PREFETCH | READ_LINE_AGGRESSIVE_PREFETCH | READ_MULTI_AGGRESSIVE_PREFETCH | - MAX_BURST_4 | - PCI_NO_SWAP; + MAX_BURST_4 | PCI_NO_SWAP; - pciMapMemoryBank(host, bankNo, bankBase, bankLength); + pciMapMemoryBank (host, bankNo, bankBase, bankLength); - pciSetRegionSnoopMode(host, bankNo, PCI_SNOOP_WB, bankBase, - bankLength); + pciSetRegionSnoopMode (host, bankNo, PCI_SNOOP_WB, bankBase, + bankLength); - pciSetRegionFeatures(host, bankNo, features, bankBase, bankLength); + pciSetRegionFeatures (host, bankNo, features, bankBase, + bankLength); } return 0; } @@ -128,8 +127,7 @@ memory_map_bank_pci(unsigned int bankNo, * translate ns.ns/10 coding of SPD timing values * into 10 ps unit values */ -static inline unsigned short -NS10to10PS(unsigned char spd_byte) +static inline unsigned short NS10to10PS (unsigned char spd_byte) { unsigned short ns, ns10; @@ -138,37 +136,35 @@ NS10to10PS(unsigned char spd_byte) /* isolate lower nibble */ ns10 = (spd_byte & 0x0F); - return(ns*100 + ns10*10); + return (ns * 100 + ns10 * 10); } /* * translate ns coding of SPD timing values * into 10 ps unit values */ -static inline unsigned short -NSto10PS(unsigned char spd_byte) +static inline unsigned short NSto10PS (unsigned char spd_byte) { - return(spd_byte*100); + return (spd_byte * 100); } #ifdef CONFIG_ZUMA_V2 -static int -check_dimm(uchar slot, sdram_info_t *info) +static int check_dimm (uchar slot, sdram_info_t * info) { /* assume 2 dimms, 2 banks each 256M - we dont have an * dimm i2c so rely on the detection routines later */ - memset(info, 0, sizeof(*info)); + memset (info, 0, sizeof (*info)); info->slot = slot; info->banks = 2; /* Detect later */ - info->registered = 0; + info->registered = 0; info->drb_size = 32; /* 16 - 256MBit, 32 - 512MBit but doesn't matter, both do same thing in setup_sdram() */ - info->tpar = 3; - info->tras_clocks = 5; - info->burst_len = 4; + info->tpar = 3; + info->tras_clocks = 5; + info->burst_len = 4; #ifdef CONFIG_ECC info->ecc = 0; /* Detect later */ #endif /* CONFIG_ECC */ @@ -177,10 +173,9 @@ check_dimm(uchar slot, sdram_info_t *info) #elif defined(CONFIG_P3G4) -static int -check_dimm(uchar slot, sdram_info_t *info) +static int check_dimm (uchar slot, sdram_info_t * info) { - memset(info, 0, sizeof(*info)); + memset (info, 0, sizeof (*info)); if (slot) return 0; @@ -198,12 +193,11 @@ check_dimm(uchar slot, sdram_info_t *info) return 0; } -#else /* ! CONFIG_ZUMA_V2 && ! CONFIG_P3G4*/ +#else /* ! CONFIG_ZUMA_V2 && ! CONFIG_P3G4 */ /* This code reads the SPD chip on the sdram and populates * the array which is passed in with the relevant information */ -static int -check_dimm(uchar slot, sdram_info_t *info) +static int check_dimm (uchar slot, sdram_info_t * info) { DECLARE_GLOBAL_DATA_PTR; uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR; @@ -215,32 +209,32 @@ check_dimm(uchar slot, sdram_info_t *info) get_clocks (); - tmemclk = 1000000000 / (gd->bus_clk / 100); /* in 10 ps units */ + tmemclk = 1000000000 / (gd->bus_clk / 100); /* in 10 ps units */ #ifdef CONFIG_EVB64260_750CX if (0 != slot) { - printf("check_dimm: The EVB-64260-750CX only has 1 DIMM,"); - printf(" called with slot=%d insetad!\n", slot); + printf ("check_dimm: The EVB-64260-750CX only has 1 DIMM,"); + printf (" called with slot=%d insetad!\n", slot); return 0; } #endif - DP(puts("before i2c read\n")); + DP (puts ("before i2c read\n")); - ret = i2c_read(addr, 0, 128, data, 0); + ret = i2c_read (addr, 0, 128, data, 0); - DP(puts("after i2c read\n")); + DP (puts ("after i2c read\n")); /* zero all the values */ - memset(info, 0, sizeof(*info)); + memset (info, 0, sizeof (*info)); if (ret) { - DP(printf("No DIMM in slot %d [err = %x]\n", slot, ret)); + DP (printf ("No DIMM in slot %d [err = %x]\n", slot, ret)); return 0; } /* first, do some sanity checks */ if (data[2] != 0x4) { - printf("Not SDRAM in slot %d\n", slot); + printf ("Not SDRAM in slot %d\n", slot); return 0; } @@ -251,7 +245,8 @@ check_dimm(uchar slot, sdram_info_t *info) sdram_banks = data[17]; width = data[13] & 0x7f; - DP(printf("sdram_banks: %d, banks: %d\n", sdram_banks, info->banks)); + DP (printf + ("sdram_banks: %d, banks: %d\n", sdram_banks, info->banks)); /* check if the memory is registered */ if (data[21] & (BIT1 | BIT4)) @@ -266,31 +261,31 @@ check_dimm(uchar slot, sdram_info_t *info) supp_cal = (data[18] & 0x6) >> 1; /* compute the relevant clock values */ - trp_clocks = (NSto10PS(data[27])+(tmemclk-1)) / tmemclk; - trcd_clocks = (NSto10PS(data[29])+(tmemclk-1)) / tmemclk; - info->tras_clocks = (NSto10PS(data[30])+(tmemclk-1)) / tmemclk; + trp_clocks = (NSto10PS (data[27]) + (tmemclk - 1)) / tmemclk; + trcd_clocks = (NSto10PS (data[29]) + (tmemclk - 1)) / tmemclk; + info->tras_clocks = (NSto10PS (data[30]) + (tmemclk - 1)) / tmemclk; - DP(printf("trp = %d\ntrcd_clocks = %d\ntras_clocks = %d\n", - trp_clocks, trcd_clocks, info->tras_clocks)); + DP (printf ("trp = %d\ntrcd_clocks = %d\ntras_clocks = %d\n", + trp_clocks, trcd_clocks, info->tras_clocks)); /* try a CAS latency of 3 first... */ cal_val = 0; if (supp_cal & 3) { - if (NS10to10PS(data[9]) <= tmemclk) + if (NS10to10PS (data[9]) <= tmemclk) cal_val = 3; } /* then 2... */ if (supp_cal & 2) { - if (NS10to10PS(data[23]) <= tmemclk) + if (NS10to10PS (data[23]) <= tmemclk) cal_val = 2; } - DP(printf("cal_val = %d\n", cal_val)); + DP (printf ("cal_val = %d\n", cal_val)); /* bummer, did't work... */ if (cal_val == 0) { - DP(printf("Couldn't find a good CAS latency\n")); + DP (printf ("Couldn't find a good CAS latency\n")); return 0; } @@ -302,18 +297,19 @@ check_dimm(uchar slot, sdram_info_t *info) if (trcd_clocks > info->tpar) info->tpar = trcd_clocks; - DP(printf("tpar set to: %d\n", info->tpar)); + DP (printf ("tpar set to: %d\n", info->tpar)); #ifdef CFG_BROKEN_CL2 - if (info->tpar == 2){ + if (info->tpar == 2) { info->tpar = 3; - DP(printf("tpar fixed-up to: %d\n", info->tpar)); + DP (printf ("tpar fixed-up to: %d\n", info->tpar)); } #endif /* compute the module DRB size */ - info->drb_size = (((1 << (rows + cols)) * sdram_banks) * width) / _16M; + info->drb_size = + (((1 << (rows + cols)) * sdram_banks) * width) / _16M; - DP(printf("drb_size set to: %d\n", info->drb_size)); + DP (printf ("drb_size set to: %d\n", info->drb_size)); /* find the burst len */ info->burst_len = data[16] & 0xf; @@ -330,40 +326,52 @@ check_dimm(uchar slot, sdram_info_t *info) } #endif /* ! CONFIG_ZUMA_V2 */ -static int -setup_sdram_common(sdram_info_t info[2]) +static int setup_sdram_common (sdram_info_t info[2]) { ulong tmp; - int tpar=2, tras_clocks=5, registered=1, ecc=2; + int tpar = 2, tras_clocks = 5, registered = 1, ecc = 2; + + if (!info[0].banks && !info[1].banks) + return 0; + + if (info[0].banks) { + if (info[0].tpar > tpar) + tpar = info[0].tpar; + if (info[0].tras_clocks > tras_clocks) + tras_clocks = info[0].tras_clocks; + if (!info[0].registered) + registered = 0; + if (info[0].ecc != 2indent: Standard input:491: Warning:old style assignment ambiguity in "=*". Assuming "= *" - if(!info[0].banks && !info[1].banks) return 0; +indent: Standard input:492: Warning:old style assignment ambiguity in "=*". Assuming "= *" - if(info[0].banks) { - if(info[0].tpar>tpar) tpar=info[0].tpar; - if(info[0].tras_clocks>tras_clocks) tras_clocks=info[0].tras_clocks; - if(!info[0].registered) registered=0; - if(info[0].ecc!=2) ecc=0; +) + ecc = 0; } - if(info[1].banks) { - if(info[1].tpar>tpar) tpar=info[1].tpar; - if(info[1].tras_clocks>tras_clocks) tras_clocks=info[1].tras_clocks; - if(!info[1].registered) registered=0; - if(info[1].ecc!=2) ecc=0; + if (info[1].banks) { + if (info[1].tpar > tpar) + tpar = info[1].tpar; + if (info[1].tras_clocks > tras_clocks) + tras_clocks = info[1].tras_clocks; + if (!info[1].registered) + registered = 0; + if (info[1].ecc != 2) + ecc = 0; } /* SDRAM configuration */ - tmp = GTREGREAD(SDRAM_CONFIGURATION); + tmp = GTREGREAD (SDRAM_CONFIGURATION); /* Turn on physical interleave if both DIMMs * have even numbers of banks. */ - if( (info[0].banks == 0 || info[0].banks == 2) && - (info[1].banks == 0 || info[1].banks == 2) ) { - /* physical interleave on */ - tmp &= ~(1 << 15); + if ((info[0].banks == 0 || info[0].banks == 2) && + (info[1].banks == 0 || info[1].banks == 2)) { + /* physical interleave on */ + tmp &= ~(1 << 15); } else { - /* physical interleave off */ - tmp |= (1 << 15); + /* physical interleave off */ + tmp |= (1 << 15); } tmp |= (registered << 17); @@ -372,52 +380,51 @@ setup_sdram_common(sdram_info_t info[2]) * See Res #12 */ tmp |= (1 << 26); - GT_REG_WRITE(SDRAM_CONFIGURATION, tmp); - DP(printf("SDRAM config: %08x\n", - GTREGREAD(SDRAM_CONFIGURATION))); + GT_REG_WRITE (SDRAM_CONFIGURATION, tmp); + DP (printf ("SDRAM config: %08x\n", GTREGREAD (SDRAM_CONFIGURATION))); /* SDRAM timing */ tmp = (((tpar == 3) ? 2 : 1) | (((tpar == 3) ? 2 : 1) << 2) | - (((tpar == 3) ? 2 : 1) << 4) | - (tras_clocks << 8)); + (((tpar == 3) ? 2 : 1) << 4) | (tras_clocks << 8)); #ifdef CONFIG_ECC /* Setup ECC */ - if (ecc == 2) tmp |= 1<<13; + if (ecc == 2) + tmp |= 1 << 13; #endif /* CONFIG_ECC */ - GT_REG_WRITE(SDRAM_TIMING, tmp); - DP(printf("SDRAM timing: %08x (%d,%d,%d,%d)\n", - GTREGREAD(SDRAM_TIMING), tpar,tpar,tpar,tras_clocks)); + GT_REG_WRITE (SDRAM_TIMING, tmp); + DP (printf ("SDRAM timing: %08x (%d,%d,%d,%d)\n", + GTREGREAD (SDRAM_TIMING), tpar, tpar, tpar, tras_clocks)); /* SDRAM address decode register */ /* program this with the default value */ - GT_REG_WRITE(SDRAM_ADDRESS_DECODE, 0x2); - DP(printf("SDRAM decode: %08x\n", - GTREGREAD(SDRAM_ADDRESS_DECODE))); + GT_REG_WRITE (SDRAM_ADDRESS_DECODE, 0x2); + DP (printf ("SDRAM decode: %08x\n", + GTREGREAD (SDRAM_ADDRESS_DECODE))); return 0; } /* sets up the GT properly with information passed in */ -static int -setup_sdram(sdram_info_t *info) +static int setup_sdram (sdram_info_t * info) { ulong tmp, check; ulong *addr = 0; int i; /* sanity checking */ - if (! info->banks) return 0; + if (!info->banks) + return 0; /* ---------------------------- */ /* Program the GT with the discovered data */ /* bank parameters */ - tmp = (0xf<<16); /* leave all virt bank pages open */ + tmp = (0xf << 16); /* leave all virt bank pages open */ - DP(printf("drb_size: %d\n", info->drb_size)); + DP (printf ("drb_size: %d\n", info->drb_size)); switch (info->drb_size) { case 1: tmp |= (1 << 14); @@ -431,41 +438,42 @@ setup_sdram(sdram_info_t *info) tmp |= (3 << 14); break; default: - printf("Error in dram size calculation\n"); + printf ("Error in dram size calculation\n"); return 1; } /* SDRAM bank parameters */ /* the param registers for slot 1 (banks 2+3) are offset by 0x8 */ - GT_REG_WRITE(SDRAM_BANK0PARAMETERS + (info->slot * 0x8), tmp); - GT_REG_WRITE(SDRAM_BANK1PARAMETERS + (info->slot * 0x8), tmp); - DP(printf("SDRAM bankparam slot %d (bank %d+%d): %08lx\n", info->slot, info->slot*2, (info->slot*2)+1, tmp)); + GT_REG_WRITE (SDRAM_BANK0PARAMETERS + (info->slot * 0x8), tmp); + GT_REG_WRITE (SDRAM_BANK1PARAMETERS + (info->slot * 0x8), tmp); + DP (printf + ("SDRAM bankparam slot %d (bank %d+%d): %08lx\n", info->slot, + info->slot * 2, (info->slot * 2) + 1, tmp)); /* set the SDRAM configuration for each bank */ for (i = info->slot * 2; i < ((info->slot * 2) + info->banks); i++) { - DP(printf("*** Running a MRS cycle for bank %d ***\n", i)); + DP (printf ("*** Running a MRS cycle for bank %d ***\n", i)); /* map the bank */ - memory_map_bank(i, 0, GB/4); + memory_map_bank (i, 0, GB / 4); /* set SDRAM mode */ - GT_REG_WRITE(SDRAM_OPERATION_MODE, 0x3); - check = GTREGREAD(SDRAM_OPERATION_MODE); + GT_REG_WRITE (SDRAM_OPERATION_MODE, 0x3); + check = GTREGREAD (SDRAM_OPERATION_MODE); /* dummy write */ *addr = 0; /* wait for the command to complete */ - while ((GTREGREAD(SDRAM_OPERATION_MODE) & (1 << 31)) == 0) - ; + while ((GTREGREAD (SDRAM_OPERATION_MODE) & (1 << 31)) == 0); /* switch back to normal operation mode */ - GT_REG_WRITE(SDRAM_OPERATION_MODE, 0); - check = GTREGREAD(SDRAM_OPERATION_MODE); + GT_REG_WRITE (SDRAM_OPERATION_MODE, 0); + check = GTREGREAD (SDRAM_OPERATION_MODE); /* unmap the bank */ - memory_map_bank(i, 0, 0); - DP(printf("*** MRS cycle for bank %d done ***\n", i)); + memory_map_bank (i, 0, 0); + DP (printf ("*** MRS cycle for bank %d done ***\n", i)); } return 0; @@ -478,50 +486,50 @@ setup_sdram(sdram_info_t *info) * - short between address lines * - short between data lines */ -static long int -dram_size(long int *base, long int maxsize) +static long int dram_size (long int *base, long int maxsize) { - volatile long int *addr, *b=base; - long int cnt, val, save1, save2; + volatile long int *addr, *b = base; + long int cnt, val, save1, save2; #define STARTVAL (1<<20) /* start test at 1M */ - for (cnt = STARTVAL/sizeof(long); cnt < maxsize/sizeof(long); cnt <<= 1) { - addr = base + cnt; /* pointer arith! */ - - save1=*addr; /* save contents of addr */ - save2=*b; /* save contents of base */ - - *addr=cnt; /* write cnt to addr */ - *b=0; /* put null at base */ - - /* check at base address */ - if ((*b) != 0) { - *addr=save1; /* restore *addr */ - *b=save2; /* restore *b */ - return (0); - } - val = *addr; /* read *addr */ - - *addr=save1; - *b=save2; - - if (val != cnt) { - /* fix boundary condition.. STARTVAL means zero */ - if(cnt==STARTVAL/sizeof(long)) cnt=0; - return (cnt * sizeof(long)); - } - } - return maxsize; + for (cnt = STARTVAL / sizeof (long); cnt < maxsize / sizeof (long); + cnt <<= 1) { + addr = base + cnt; /* pointer arith! */ + + save1 = *addr; /* save contents of addr */ + save2 = *b; /* save contents of base */ + + *addr = cnt; /* write cnt to addr */ + *b = 0; /* put null at base */ + + /* check at base address */ + if ((*b) != 0) { + *addr = save1; /* restore *addr */ + *b = save2; /* restore *b */ + return (0); + } + val = *addr; /* read *addr */ + + *addr = save1; + *b = save2; + + if (val != cnt) { + /* fix boundary condition.. STARTVAL means zero */ + if (cnt == STARTVAL / sizeof (long)) + cnt = 0; + return (cnt * sizeof (long)); + } + } + return maxsize; } /* ------------------------------------------------------------------------- */ /* U-Boot interface function to SDRAM init - this is where all the * controlling logic happens */ -long int -initdram(int board_type) +long int initdram (int board_type) { - ulong checkbank[4] = { [0 ... 3] = 0 }; + ulong checkbank[4] = {[0 ... 3] = 0 }; int bank_no; ulong total; int nhr; @@ -531,92 +539,97 @@ initdram(int board_type) /* first, use the SPD to get info about the SDRAM */ /* check the NHR bit and skip mem init if it's already done */ - nhr = get_hid0() & (1 << 16); + nhr = get_hid0 () & (1 << 16); if (nhr) { - printf("Skipping SDRAM setup due to NHR bit being set\n"); + printf ("Skipping SDRAM setup due to NHR bit being set\n"); } else { /* DIMM0 */ - check_dimm(0, &dimm_info[0]); + check_dimm (0, &dimm_info[0]); /* DIMM1 */ -#ifndef CONFIG_EVB64260_750CX /* EVB64260_750CX has only 1 DIMM */ - check_dimm(1, &dimm_info[1]); -#else /* CONFIG_EVB64260_750CX */ - memset(&dimm_info[1], 0, sizeof(sdram_info_t)); +#ifndef CONFIG_EVB64260_750CX /* EVB64260_750CX has only 1 DIMM */ + check_dimm (1, &dimm_info[1]); +#else /* CONFIG_EVB64260_750CX */ + memset (&dimm_info[1], 0, sizeof (sdram_info_t)); #endif /* unmap all banks */ - memory_map_bank(0, 0, 0); - memory_map_bank(1, 0, 0); - memory_map_bank(2, 0, 0); - memory_map_bank(3, 0, 0); + memory_map_bank (0, 0, 0); + memory_map_bank (1, 0, 0); + memory_map_bank (2, 0, 0); + memory_map_bank (3, 0, 0); /* Now, program the GT with the correct values */ - if (setup_sdram_common(dimm_info)) { - printf("Setup common failed.\n"); + if (setup_sdram_common (dimm_info)) { + printf ("Setup common failed.\n"); } - if (setup_sdram(&dimm_info[0])) { - printf("Setup for DIMM1 failed.\n"); + if (setup_sdram (&dimm_info[0])) { + printf ("Setup for DIMM1 failed.\n"); } - if (setup_sdram(&dimm_info[1])) { - printf("Setup for DIMM2 failed.\n"); + if (setup_sdram (&dimm_info[1])) { + printf ("Setup for DIMM2 failed.\n"); } /* set the NHR bit */ - set_hid0(get_hid0() | (1 << 16)); + set_hid0 (get_hid0 () | (1 << 16)); } /* next, size the SDRAM banks */ total = 0; - if (dimm_info[0].banks > 0) checkbank[0] = 1; - if (dimm_info[0].banks > 1) checkbank[1] = 1; + if (dimm_info[0].banks > 0) + checkbank[0] = 1; + if (dimm_info[0].banks > 1) + checkbank[1] = 1; if (dimm_info[0].banks > 2) - printf("Error, SPD claims DIMM1 has >2 banks\n"); + printf ("Error, SPD claims DIMM1 has >2 banks\n"); - if (dimm_info[1].banks > 0) checkbank[2] = 1; - if (dimm_info[1].banks > 1) checkbank[3] = 1; + if (dimm_info[1].banks > 0) + checkbank[2] = 1; + if (dimm_info[1].banks > 1) + checkbank[3] = 1; if (dimm_info[1].banks > 2) - printf("Error, SPD claims DIMM2 has >2 banks\n"); + printf ("Error, SPD claims DIMM2 has >2 banks\n"); /* Generic dram sizer: works even if we don't have i2c DIMMs, * as long as the timing settings are more or less correct */ /* * pass 1: size all the banks, using first bat (0-256M) - * limitation: we only support 256M per bank due to - * us only having 1 BAT for all DRAM + * limitation: we only support 256M per bank due to + * us only having 1 BAT for all DRAM */ for (bank_no = 0; bank_no < CFG_DRAM_BANKS; bank_no++) { /* skip over banks that are not populated */ - if (! checkbank[bank_no]) + if (!checkbank[bank_no]) continue; - DP(printf("checking bank %d\n", bank_no)); + DP (printf ("checking bank %d\n", bank_no)); - memory_map_bank(bank_no, 0, GB/4); - checkbank[bank_no] = dram_size(NULL, GB/4); - memory_map_bank(bank_no, 0, 0); + memory_map_bank (bank_no, 0, GB / 4); + checkbank[bank_no] = dram_size (NULL, GB / 4); + memory_map_bank (bank_no, 0, 0); - DP(printf("bank %d %08lx\n", bank_no, checkbank[bank_no])); + DP (printf ("bank %d %08lx\n", bank_no, checkbank[bank_no])); } /* * pass 2: contiguously map each bank into physical address - * space. + * space. */ - dimm_info[0].banks=dimm_info[1].banks=0; + dimm_info[0].banks = dimm_info[1].banks = 0; for (bank_no = 0; bank_no < CFG_DRAM_BANKS; bank_no++) { - if(!checkbank[bank_no]) continue; + if (!checkbank[bank_no]) + continue; - dimm_info[bank_no/2].banks++; - dimm_info[bank_no/2].size+=checkbank[bank_no]; + dimm_info[bank_no / 2].banks++; + dimm_info[bank_no / 2].size += checkbank[bank_no]; - memory_map_bank(bank_no, total, checkbank[bank_no]); + memory_map_bank (bank_no, total, checkbank[bank_no]); #ifdef MAP_PCI - memory_map_bank_pci(bank_no, total, checkbank[bank_no]); + memory_map_bank_pci (bank_no, total, checkbank[bank_no]); #endif total += checkbank[bank_no]; } @@ -630,21 +643,22 @@ initdram(int board_type) * in that configuration, ECC chips are mounted, even for stacked * chips) */ - if (checkbank[2]==0 && checkbank[3]==0) { - dimm_info[0].ecc=2; - GT_REG_WRITE(SDRAM_TIMING, GTREGREAD(SDRAM_TIMING) | (1 << 13)); + if (checkbank[2] == 0 && checkbank[3] == 0) { + dimm_info[0].ecc = 2; + GT_REG_WRITE (SDRAM_TIMING, + GTREGREAD (SDRAM_TIMING) | (1 << 13)); /* TODO: do we have to run MRS cycles again? */ } #endif /* CONFIG_ZUMA_V2 */ - if (GTREGREAD(SDRAM_TIMING) & (1 << 13)) { - puts("[ECC] "); + if (GTREGREAD (SDRAM_TIMING) & (1 << 13)) { + puts ("[ECC] "); } #endif /* CONFIG_ECC */ #ifdef DEBUG - dump_dimm_info(&dimm_info[0]); - dump_dimm_info(&dimm_info[1]); + dump_dimm_info (&dimm_info[0]); + dump_dimm_info (&dimm_info[1]); #endif /* TODO: return at MOST 256M? */ /* return total > GB/4 ? GB/4 : total; */ diff --git a/board/evb64260/zuma_pbb_mbox.h b/board/evb64260/zuma_pbb_mbox.h index 0e80fcb..b4a4c0c 100644 --- a/board/evb64260/zuma_pbb_mbox.h +++ b/board/evb64260/zuma_pbb_mbox.h @@ -2,33 +2,33 @@ #define OUT_PENDING 2 enum { - ZUMA_MBOXMSG_DONE, - ZUMA_MBOXMSG_MACL, - ZUMA_MBOXMSG_MACH, - ZUMA_MBOXMSG_IP, - ZUMA_MBOXMSG_SLOT, - ZUMA_MBOXMSG_RESET, - ZUMA_MBOXMSG_BAUD, - ZUMA_MBOXMSG_START, - ZUMA_MBOXMSG_ENG_PRV_MACL, - ZUMA_MBOXMSG_ENG_PRV_MACH, + ZUMA_MBOXMSG_DONE, + ZUMA_MBOXMSG_MACL, + ZUMA_MBOXMSG_MACH, + ZUMA_MBOXMSG_IP, + ZUMA_MBOXMSG_SLOT, + ZUMA_MBOXMSG_RESET, + ZUMA_MBOXMSG_BAUD, + ZUMA_MBOXMSG_START, + ZUMA_MBOXMSG_ENG_PRV_MACL, + ZUMA_MBOXMSG_ENG_PRV_MACH, - MBOXMSG_LAST + MBOXMSG_LAST }; struct zuma_mailbox_info { - unsigned char acc_mac[6]; - unsigned char prv_mac[6]; - unsigned int ip; - unsigned int slot_bac; - unsigned int console_baud; - unsigned int debug_baud; + unsigned char acc_mac[6]; + unsigned char prv_mac[6]; + unsigned int ip; + unsigned int slot_bac; + unsigned int console_baud; + unsigned int debug_baud; }; struct _zuma_mbox_dev { - pci_dev_t dev; - PBB_DMA_REG_MAP *sip; - struct zuma_mailbox_info mailbox; + pci_dev_t dev; + PBB_DMA_REG_MAP *sip; + struct zuma_mailbox_info mailbox; }; #define zuma_prv_mac zuma_mbox_dev.mailbox.prv_mac @@ -40,4 +40,4 @@ struct _zuma_mbox_dev { extern struct _zuma_mbox_dev zuma_mbox_dev; -extern int zuma_mbox_init(void); +extern int zuma_mbox_init (void); diff --git a/board/fads/flash.c b/board/fads/flash.c index 680a2dc..c23dff7 100644 --- a/board/fads/flash.c +++ b/board/fads/flash.c @@ -24,7 +24,7 @@ #include <common.h> #include <mpc8xx.h> -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ #if defined(CFG_ENV_IS_IN_FLASH) # ifndef CFG_ENV_ADDR @@ -41,43 +41,42 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ /*----------------------------------------------------------------------- * Functions */ -static ulong flash_get_size (vu_long *addr, flash_info_t *info); -static int write_word (flash_info_t *info, ulong dest, ulong data); -static void flash_get_offsets (ulong base, flash_info_t *info); +static ulong flash_get_size (vu_long * addr, flash_info_t * info); +static int write_word (flash_info_t * info, ulong dest, ulong data); +static void flash_get_offsets (ulong base, flash_info_t * info); /*----------------------------------------------------------------------- */ unsigned long flash_init (void) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; unsigned long total_size; unsigned long size_b0, size_b1; int i; /* Init: no FLASHes known */ - for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) - { + for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; } total_size = 0; size_b0 = 0xffffffff; - for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) - { - size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + total_size), &flash_info[i]); + for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { + size_b1 = + flash_get_size ((vu_long *) (CFG_FLASH_BASE + + total_size), + &flash_info[i]); - if (flash_info[i].flash_id == FLASH_UNKNOWN) - { - printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", i, size_b1, size_b1>>20); + if (flash_info[i].flash_id == FLASH_UNKNOWN) { + printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", i, size_b1, size_b1 >> 20); } /* Is this really needed ? - LP */ if (size_b1 > size_b0) { - printf ("## ERROR: Bank %d (0x%08lx = %ld MB) > Bank %d (0x%08lx = %ld MB)\n", - i, size_b1, size_b1>>20, i-1, size_b0, size_b0>>20); + printf ("## ERROR: Bank %d (0x%08lx = %ld MB) > Bank %d (0x%08lx = %ld MB)\n", i, size_b1, size_b1 >> 20, i - 1, size_b0, size_b0 >> 20); goto out_error; } size_b0 = size_b1; @@ -85,43 +84,47 @@ unsigned long flash_init (void) } /* Compute the Address Mask */ - for (i=0; (total_size >> i) != 0; ++i) {}; + for (i = 0; (total_size >> i) != 0; ++i) { + } i--; if (total_size != (1 << i)) { - printf ("## WARNING: Total FLASH size (0x%08lx = %ld MB) is not a power of 2\n", - total_size, total_size>>20); + printf ("## WARNING: Total FLASH size (0x%08lx = %ld MB) is not a power of 2\n", total_size, total_size >> 20); } /* Remap FLASH according to real size */ - memctl->memc_or0 = ((((unsigned long)~1) << i) & OR_AM_MSK) | CFG_OR_TIMING_FLASH; + memctl->memc_or0 = + ((((unsigned long) ~1) << i) & OR_AM_MSK) | + CFG_OR_TIMING_FLASH; memctl->memc_br0 = CFG_BR0_PRELIM; total_size = 0; - for (i=0; i < CFG_MAX_FLASH_BANKS && flash_info[i].size != 0; ++i) - { + for (i = 0; i < CFG_MAX_FLASH_BANKS && flash_info[i].size != 0; ++i) { /* Re-do sizing to get full correct info */ /* Why ? - LP */ - size_b1 = flash_get_size((vu_long *)(CFG_FLASH_BASE + total_size), &flash_info[i]); + size_b1 = + flash_get_size ((vu_long *) (CFG_FLASH_BASE + + total_size), + &flash_info[i]); /* This is done by flash_get_size - LP */ /* flash_get_offsets (CFG_FLASH_BASE + total_size, &flash_info[i]); */ #if CFG_MONITOR_BASE >= CFG_FLASH_BASE /* monitor protection ON by default */ - flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE+monitor_flash_len-1, - &flash_info[i]); + flash_protect (FLAG_PROTECT_SET, + CFG_MONITOR_BASE, + CFG_MONITOR_BASE + monitor_flash_len - 1, + &flash_info[i]); #endif #ifdef CFG_ENV_IS_IN_FLASH /* ENV protection ON by default */ - flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR+CFG_ENV_SIZE-1, - &flash_info[i]); + flash_protect (FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, + &flash_info[i]); #endif total_size += size_b1; @@ -129,12 +132,11 @@ unsigned long flash_init (void) return (total_size); -out_error: - for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) - { - flash_info[i].flash_id = FLASH_UNKNOWN; - flash_info[i].sector_count = -1; - flash_info[i].size = 0; + out_error: + for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { + flash_info[i].flash_id = FLASH_UNKNOWN; + flash_info[i].sector_count = -1; + flash_info[i].size = 0; } return (0); @@ -142,13 +144,14 @@ out_error: /*----------------------------------------------------------------------- */ -static void flash_get_offsets (ulong base, flash_info_t *info) +static void flash_get_offsets (ulong base, flash_info_t * info) { int i; /* set up sector start address table */ - if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040 || (info->flash_id & FLASH_TYPEMASK) == FLASH_AM080 ) { - /* set sector offsets for uniform sector type */ + if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040 + || (info->flash_id & FLASH_TYPEMASK) == FLASH_AM080) { + /* set sector offsets for uniform sector type */ for (i = 0; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00040000); } @@ -157,64 +160,78 @@ static void flash_get_offsets (ulong base, flash_info_t *info) /*----------------------------------------------------------------------- */ -void flash_print_info (flash_info_t *info) +void flash_print_info (flash_info_t * info) { int i; - if (info->flash_id == FLASH_UNKNOWN) - { + if (info->flash_id == FLASH_UNKNOWN) { printf ("missing or unknown FLASH type\n"); return; } - switch (info->flash_id & FLASH_VENDMASK) - { - case FLASH_MAN_AMD: printf ("AMD "); break; - case FLASH_MAN_FUJ: printf ("FUJITSU "); break; - case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; - default: printf ("Unknown Vendor "); break; + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_AMD: + printf ("AMD "); + break; + case FLASH_MAN_FUJ: + printf ("FUJITSU "); + break; + case FLASH_MAN_BM: + printf ("BRIGHT MICRO "); + break; + default: + printf ("Unknown Vendor "); + break; } - switch (info->flash_id & FLASH_TYPEMASK) - { - case FLASH_AM040: printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n"); - break; - case FLASH_AM080: printf ("29F080 or 29LV080 (8 Mbit, uniform sectors)\n"); - break; - case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); - break; - case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); - break; - case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); - break; - case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); - break; - case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); - break; - default: printf ("Unknown Chip Type\n"); - break; + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_AM040: + printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n"); + break; + case FLASH_AM080: + printf ("29F080 or 29LV080 (8 Mbit, uniform sectors)\n"); + break; + case FLASH_AM400B: + printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM400T: + printf ("AM29LV400T (4 Mbit, top boot sector)\n"); + break; + case FLASH_AM800B: + printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM800T: + printf ("AM29LV800T (8 Mbit, top boot sector)\n"); + break; + case FLASH_AM160B: + printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM160T: + printf ("AM29LV160T (16 Mbit, top boot sector)\n"); + break; + case FLASH_AM320B: + printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM320T: + printf ("AM29LV320T (32 Mbit, top boot sector)\n"); + break; + default: + printf ("Unknown Chip Type\n"); + break; } - printf (" Size: %ld MB in %d Sectors\n",info->size >> 20, info->sector_count); + printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, + info->sector_count); printf (" Sector Start Addresses:"); - for (i=0; i<info->sector_count; ++i) - { - if ((i % 5) == 0) - { + for (i = 0; i < info->sector_count; ++i) { + if ((i % 5) == 0) { printf ("\n "); } printf (" %08lX%s", - info->start[i], - info->protect[i] ? " (RO)" : " "); + info->start[i], info->protect[i] ? " (RO)" : " "); } printf ("\n"); @@ -232,11 +249,12 @@ void flash_print_info (flash_info_t *info) * The following code cannot be run from FLASH! */ -static ulong flash_get_size (vu_long *addr, flash_info_t *info) +static ulong flash_get_size (vu_long * addr, flash_info_t * info) { short i; + #if 0 - ulong base = (ulong)addr; + ulong base = (ulong) addr; #endif uchar value; @@ -253,97 +271,95 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) value = addr[0]; - switch (value + (value << 16)) - { - case AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; - - case FUJ_MANUFACT: - info->flash_id = FLASH_MAN_FUJ; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - break; - } + switch (value + (value << 16)) { + case AMD_MANUFACT: + info->flash_id = FLASH_MAN_AMD; + break; - value = addr[1]; /* device ID */ + case FUJ_MANUFACT: + info->flash_id = FLASH_MAN_FUJ; + break; - switch (value) - { - case AMD_ID_F040B: - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00200000; - break; /* => 2 MB */ - - case AMD_ID_F080B: - info->flash_id += FLASH_AM080; - info->sector_count =16; - info->size = 0x00400000; - break; /* => 4 MB */ - - case AMD_ID_LV400T: - info->flash_id += FLASH_AM400T; - info->sector_count = 11; - info->size = 0x00100000; - break; /* => 1 MB */ - - case AMD_ID_LV400B: - info->flash_id += FLASH_AM400B; - info->sector_count = 11; - info->size = 0x00100000; - break; /* => 1 MB */ - - case AMD_ID_LV800T: - info->flash_id += FLASH_AM800T; - info->sector_count = 19; - info->size = 0x00200000; - break; /* => 2 MB */ - - case AMD_ID_LV800B: - info->flash_id += FLASH_AM800B; - info->sector_count = 19; - info->size = 0x00200000; - break; /* => 2 MB */ - - case AMD_ID_LV160T: - info->flash_id += FLASH_AM160T; - info->sector_count = 35; - info->size = 0x00400000; - break; /* => 4 MB */ - - case AMD_ID_LV160B: - info->flash_id += FLASH_AM160B; - info->sector_count = 35; - info->size = 0x00400000; - break; /* => 4 MB */ -#if 0 /* enable when device IDs are available */ - case AMD_ID_LV320T: - info->flash_id += FLASH_AM320T; - info->sector_count = 67; - info->size = 0x00800000; - break; /* => 8 MB */ - - case AMD_ID_LV320B: - info->flash_id += FLASH_AM320B; - info->sector_count = 67; - info->size = 0x00800000; - break; /* => 8 MB */ + default: + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + break; + } + + value = addr[1]; /* device ID */ + + switch (value) { + case AMD_ID_F040B: + info->flash_id += FLASH_AM040; + info->sector_count = 8; + info->size = 0x00200000; + break; /* => 2 MB */ + + case AMD_ID_F080B: + info->flash_id += FLASH_AM080; + info->sector_count = 16; + info->size = 0x00400000; + break; /* => 4 MB */ + + case AMD_ID_LV400T: + info->flash_id += FLASH_AM400T; + info->sector_count = 11; + info->size = 0x00100000; + break; /* => 1 MB */ + + case AMD_ID_LV400B: + info->flash_id += FLASH_AM400B; + info->sector_count = 11; + info->size = 0x00100000; + break; /* => 1 MB */ + + case AMD_ID_LV800T: + info->flash_id += FLASH_AM800T; + info->sector_count = 19; + info->size = 0x00200000; + break; /* => 2 MB */ + + case AMD_ID_LV800B: + info->flash_id += FLASH_AM800B; + info->sector_count = 19; + info->size = 0x00200000; + break; /* => 2 MB */ + + case AMD_ID_LV160T: + info->flash_id += FLASH_AM160T; + info->sector_count = 35; + info->size = 0x00400000; + break; /* => 4 MB */ + + case AMD_ID_LV160B: + info->flash_id += FLASH_AM160B; + info->sector_count = 35; + info->size = 0x00400000; + break; /* => 4 MB */ +#if 0 /* enable when device IDs are available */ + case AMD_ID_LV320T: + info->flash_id += FLASH_AM320T; + info->sector_count = 67; + info->size = 0x00800000; + break; /* => 8 MB */ + + case AMD_ID_LV320B: + info->flash_id += FLASH_AM320B; + info->sector_count = 67; + info->size = 0x00800000; + break; /* => 8 MB */ #endif - default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ + default: + info->flash_id = FLASH_UNKNOWN; + return (0); /* => no or unknown flash */ } #if 0 /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ + /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; info->start[1] = base + 0x00008000; info->start[2] = base + 0x0000C000; @@ -352,7 +368,7 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) info->start[i] = base + (i * 0x00020000) - 0x00060000; } } else { - /* set sector offsets for top boot block type */ + /* set sector offsets for top boot block type */ i = info->sector_count - 1; info->start[i--] = base + info->size - 0x00008000; info->start[i--] = base + info->size - 0x0000C000; @@ -362,24 +378,22 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) } } #else - flash_get_offsets ((ulong)addr, info); + flash_get_offsets ((ulong) addr, info); #endif /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) - { + for (i = 0; i < info->sector_count; i++) { /* read sector protection at sector address, (A7 .. A0) = 0x02 */ /* D0 = 1 if protected */ - addr = (volatile unsigned long *)(info->start[i]); + addr = (volatile unsigned long *) (info->start[i]); info->protect[i] = addr[2] & 1; } /* * Prevent writes to uninitialized FLASH. */ - if (info->flash_id != FLASH_UNKNOWN) - { - addr = (volatile unsigned long *)info->start[0]; + if (info->flash_id != FLASH_UNKNOWN) { + addr = (volatile unsigned long *) info->start[0]; #if 0 *addr = 0x00F000F0; /* reset bank */ #else @@ -394,9 +408,9 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info) /*----------------------------------------------------------------------- */ -int flash_erase (flash_info_t *info, int s_first, int s_last) +int flash_erase (flash_info_t * info, int s_first, int s_last) { - vu_long *addr = (vu_long*)(info->start[0]); + vu_long *addr = (vu_long *) (info->start[0]); int flag, prot, sect, l_sect; ulong start, now, last; @@ -416,15 +430,14 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) } prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { + for (sect = s_first; sect <= s_last; ++sect) { if (info->protect[sect]) { prot++; } } if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); + printf ("- Warning: %d protected sectors will not be erased!\n", prot); } else { printf ("\n"); } @@ -432,7 +445,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) l_sect = -1; /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); + flag = disable_interrupts (); #if 0 addr[0x0555] = 0x00AA00AA; @@ -449,9 +462,9 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) #endif /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { + for (sect = s_first; sect <= s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ - addr = (vu_long*)(info->start[sect]); + addr = (vu_long *) (info->start[sect]); #if 0 addr[0] = 0x00300030; #else @@ -463,7 +476,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) /* re-enable interrupts if necessary */ if (flag) - enable_interrupts(); + enable_interrupts (); /* wait at least 80us - let's wait 1 ms */ udelay (1000); @@ -475,15 +488,15 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) goto DONE; start = get_timer (0); - last = start; - addr = (vu_long*)(info->start[l_sect]); + last = start; + addr = (vu_long *) (info->start[l_sect]); #if 0 while ((addr[0] & 0x00800080) != 0x00800080) #else while ((addr[0] & 0xFFFFFFFF) != 0xFFFFFFFF) #endif { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) { printf ("Timeout\n"); return 1; } @@ -494,9 +507,9 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) } } -DONE: + DONE: /* reset to read mode */ - addr = (volatile unsigned long *)info->start[0]; + addr = (volatile unsigned long *) info->start[0]; #if 0 addr[0] = 0x00F000F0; /* reset bank */ #else @@ -514,7 +527,7 @@ DONE: * 2 - Flash not erased */ -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) { ulong cp, wp, data; int i, l, rc; @@ -526,19 +539,19 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) */ if ((l = addr - wp) != 0) { data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); + for (i = 0, cp = wp; i < l; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); } - for (; i<4 && cnt>0; ++i) { + for (; i < 4 && cnt > 0; ++i) { data = (data << 8) | *src++; --cnt; ++cp; } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); + for (; cnt == 0 && i < 4; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); } - if ((rc = write_word(info, wp, data)) != 0) { + if ((rc = write_word (info, wp, data)) != 0) { return (rc); } wp += 4; @@ -549,13 +562,13 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) */ while (cnt >= 4) { data = 0; - for (i=0; i<4; ++i) { + for (i = 0; i < 4; ++i) { data = (data << 8) | *src++; } - if ((rc = write_word(info, wp, data)) != 0) { + if ((rc = write_word (info, wp, data)) != 0) { return (rc); } - wp += 4; + wp += 4; cnt -= 4; } @@ -567,15 +580,15 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) * handle unaligned tail bytes */ data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { + for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { data = (data << 8) | *src++; --cnt; } - for (; i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); + for (; i < 4; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); } - return (write_word(info, wp, data)); + return (write_word (info, wp, data)); } /*----------------------------------------------------------------------- @@ -584,18 +597,18 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) * 1 - write timeout * 2 - Flash not erased */ -static int write_word (flash_info_t *info, ulong dest, ulong data) +static int write_word (flash_info_t * info, ulong dest, ulong data) { - vu_long *addr = (vu_long*)(info->start[0]); + vu_long *addr = (vu_long *) (info->start[0]); ulong start; int flag; /* Check if Flash is (sufficiently) erased */ - if ((*((vu_long *)dest) & data) != data) { + if ((*((vu_long *) dest) & data) != data) { return (2); } /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); + flag = disable_interrupts (); #if 0 addr[0x0555] = 0x00AA00AA; @@ -607,21 +620,21 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) addr[0x0555] = 0xA0A0A0A0; #endif - *((vu_long *)dest) = data; + *((vu_long *) dest) = data; /* re-enable interrupts if necessary */ if (flag) - enable_interrupts(); + enable_interrupts (); /* data polling for D7 */ start = get_timer (0); #if 0 - while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) + while ((*((vu_long *) dest) & 0x00800080) != (data & 0x00800080)) #else - while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) + while ((*((vu_long *) dest) & 0x80808080) != (data & 0x80808080)) #endif { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { return (1); } } diff --git a/board/gen860t/fpga.c b/board/gen860t/fpga.c index 2c4fbf1..37788d5 100644 --- a/board/gen860t/fpga.c +++ b/board/gen860t/fpga.c @@ -72,30 +72,27 @@ Xilinx_Virtex2_Slave_SelectMap_fns fpga_fns = { }; Xilinx_desc fpga[CONFIG_FPGA_COUNT] = { - { Xilinx_Virtex2, - slave_selectmap, - XILINX_XC2V3000_SIZE, - (void *)&fpga_fns, - 0 - } + {Xilinx_Virtex2, + slave_selectmap, + XILINX_XC2V3000_SIZE, + (void *) &fpga_fns, + 0} }; /* * Display FPGA revision information */ -void -print_fpga_revision(void) +void print_fpga_revision (void) { - vu_long *rev_p = (vu_long *)0x60000008; - - printf("FPGA Revision 0x%.8lx" - " (Date %.2lx/%.2lx/%.2lx, Status \"%.1lx\", Version %.3lu)\n", - *rev_p, - ((*rev_p >> 28) & 0xf), - ((*rev_p >> 20) & 0xff), - ((*rev_p >> 12) & 0xff), - ((*rev_p >> 8) & 0xf), - (*rev_p & 0xff)); + vu_long *rev_p = (vu_long *) 0x60000008; + + printf ("FPGA Revision 0x%.8lx" + " (Date %.2lx/%.2lx/%.2lx, Status \"%.1lx\", Version %.3lu)\n", + *rev_p, + ((*rev_p >> 28) & 0xf), + ((*rev_p >> 20) & 0xff), + ((*rev_p >> 12) & 0xff), + ((*rev_p >> 8) & 0xf), (*rev_p & 0xff)); } @@ -106,10 +103,9 @@ print_fpga_revision(void) * problems with bus charging. * Return 0 on failure, 1 on success. */ -int -test_fpga_ibtr(void) +int test_fpga_ibtr (void) { - vu_long *ibtr_p = (vu_long *)0x60000010; + vu_long *ibtr_p = (vu_long *) 0x60000010; vu_long readback; vu_long compare; int i; @@ -118,40 +114,41 @@ test_fpga_ibtr(void) int pass = 1; static const ulong bitpattern[] = { - 0xdeadbeef, /* magic ID pattern for debug */ - 0x00000001, /* single bit */ - 0x00000003, /* two adjacent bits */ - 0x00000007, /* three adjacent bits */ - 0x0000000F, /* four adjacent bits */ - 0x00000005, /* two non-adjacent bits */ - 0x00000015, /* three non-adjacent bits */ - 0x00000055, /* four non-adjacent bits */ - 0xaaaaaaaa, /* alternating 1/0 */ + 0xdeadbeef, /* magic ID pattern for debug */ + 0x00000001, /* single bit */ + 0x00000003, /* two adjacent bits */ + 0x00000007, /* three adjacent bits */ + 0x0000000F, /* four adjacent bits */ + 0x00000005, /* two non-adjacent bits */ + 0x00000015, /* three non-adjacent bits */ + 0x00000055, /* four non-adjacent bits */ + 0xaaaaaaaa, /* alternating 1/0 */ }; for (i = 0; i < 1024; i++) { for (j = 0; j < 31; j++) { - for (k = 0; k < sizeof(bitpattern)/sizeof(bitpattern[0]); k++) { + for (k = 0; + k < sizeof (bitpattern) / sizeof (bitpattern[0]); + k++) { *ibtr_p = compare = (bitpattern[k] << j); readback = *ibtr_p; if (readback != ~compare) { - printf("%s:%d: FPGA test fail: expected 0x%.8lx" - " actual 0x%.8lx\n", - __FUNCTION__, __LINE__, ~compare, readback); + printf ("%s:%d: FPGA test fail: expected 0x%.8lx" " actual 0x%.8lx\n", __FUNCTION__, __LINE__, ~compare, readback); pass = 0; break; } } - if (!pass) break; + if (!pass) + break; } - if (!pass) break; + if (!pass) + break; } if (pass) { - printf("FPGA inverting bus test passed\n"); - print_fpga_revision(); - } - else { - printf("** FPGA inverting bus test failed\n"); + printf ("FPGA inverting bus test passed\n"); + print_fpga_revision (); + } else { + printf ("** FPGA inverting bus test failed\n"); } return pass; } @@ -160,19 +157,17 @@ test_fpga_ibtr(void) /* * Set the active-low FPGA reset signal. */ -void -fpga_reset(int assert) +void fpga_reset (int assert) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *) CFG_IMMR; - PRINTF("%s:%d: RESET ", __FUNCTION__, __LINE__); + PRINTF ("%s:%d: RESET ", __FUNCTION__, __LINE__); if (assert) { immap->im_ioport.iop_pcdat &= ~(0x8000 >> FPGA_RESET_BIT_NUM); - PRINTF("asserted\n"); - } - else { + PRINTF ("asserted\n"); + } else { immap->im_ioport.iop_pcdat |= (0x8000 >> FPGA_RESET_BIT_NUM); - PRINTF("deasserted\n"); + PRINTF ("deasserted\n"); } } @@ -181,54 +176,52 @@ fpga_reset(int assert) * Initialize the SelectMap interface. We assume that the mode and the * initial state of all of the port pins have already been set! */ -void -fpga_selectmap_init(void) +void fpga_selectmap_init (void) { - PRINTF("%s:%d: Initialize SelectMap interface\n", __FUNCTION__, __LINE__); - fpga_pgm_fn(FALSE, FALSE, 0); /* make sure program pin is inactive */ + PRINTF ("%s:%d: Initialize SelectMap interface\n", __FUNCTION__, + __LINE__); + fpga_pgm_fn (FALSE, FALSE, 0); /* make sure program pin is inactive */ } /* * Initialize the fpga. Return 1 on success, 0 on failure. */ -int -gen860t_init_fpga(void) +int gen860t_init_fpga (void) { DECLARE_GLOBAL_DATA_PTR; int i; - PRINTF("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n", - __FUNCTION__, __LINE__, gd->reloc_off); - fpga_init(gd->reloc_off); - fpga_selectmap_init(); + PRINTF ("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n", __FUNCTION__, __LINE__, gd->reloc_off); + fpga_init (gd->reloc_off); + fpga_selectmap_init (); - for(i=0; i < CONFIG_FPGA_COUNT; i++) { - PRINTF("%s:%d: Adding fpga %d\n", __FUNCTION__, __LINE__, i); - fpga_add(fpga_xilinx, &fpga[i]); + for (i = 0; i < CONFIG_FPGA_COUNT; i++) { + PRINTF ("%s:%d: Adding fpga %d\n", __FUNCTION__, __LINE__, i); + fpga_add (fpga_xilinx, &fpga[i]); } - return 1; + return 1; } /* * Set the FPGA's active-low SelectMap program line to the specified level */ -int -fpga_pgm_fn(int assert, int flush, int cookie) +int fpga_pgm_fn (int assert, int flush, int cookie) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *) CFG_IMMR; - PRINTF("%s:%d: FPGA PROGRAM ", __FUNCTION__, __LINE__); + PRINTF ("%s:%d: FPGA PROGRAM ", __FUNCTION__, __LINE__); if (assert) { - immap->im_ioport.iop_padat &= ~(0x8000 >> FPGA_PROGRAM_BIT_NUM); - PRINTF("asserted\n"); - } - else { - immap->im_ioport.iop_padat |= (0x8000 >> FPGA_PROGRAM_BIT_NUM); - PRINTF("deasserted\n"); + immap->im_ioport.iop_padat &= + ~(0x8000 >> FPGA_PROGRAM_BIT_NUM); + PRINTF ("asserted\n"); + } else { + immap->im_ioport.iop_padat |= + (0x8000 >> FPGA_PROGRAM_BIT_NUM); + PRINTF ("deasserted\n"); } return assert; } @@ -238,18 +231,16 @@ fpga_pgm_fn(int assert, int flush, int cookie) * Test the state of the active-low FPGA INIT line. Return 1 on INIT * asserted (low). */ -int -fpga_init_fn(int cookie) +int fpga_init_fn (int cookie) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *) CFG_IMMR; - PRINTF("%s:%d: INIT check... ", __FUNCTION__, __LINE__); - if(immap->im_cpm.cp_pbdat & (0x80000000 >> FPGA_INIT_BIT_NUM)) { - PRINTF("high\n"); + PRINTF ("%s:%d: INIT check... ", __FUNCTION__, __LINE__); + if (immap->im_cpm.cp_pbdat & (0x80000000 >> FPGA_INIT_BIT_NUM)) { + PRINTF ("high\n"); return 0; - } - else { - PRINTF("low\n"); + } else { + PRINTF ("low\n"); return 1; } } @@ -258,18 +249,16 @@ fpga_init_fn(int cookie) /* * Test the state of the active-high FPGA DONE pin */ -int -fpga_done_fn(int cookie) +int fpga_done_fn (int cookie) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *) CFG_IMMR; - PRINTF("%s:%d: DONE check... ", __FUNCTION__, __LINE__); + PRINTF ("%s:%d: DONE check... ", __FUNCTION__, __LINE__); if (immap->im_cpm.cp_pbdat & (0x80000000 >> FPGA_DONE_BIT_NUM)) { - PRINTF("high\n"); + PRINTF ("high\n"); return FPGA_SUCCESS; - } - else { - PRINTF("low\n"); + } else { + PRINTF ("low\n"); return FPGA_FAIL; } } @@ -278,43 +267,40 @@ fpga_done_fn(int cookie) /* * Read FPGA SelectMap data. */ -int -fpga_read_data_fn(unsigned char *data, int cookie) +int fpga_read_data_fn (unsigned char *data, int cookie) { - vu_char *p = (vu_char *)SELECTMAP_BASE; + vu_char *p = (vu_char *) SELECTMAP_BASE; *data = *p; #if 0 - PRINTF("%s: Read 0x%x into 0x%p\n", __FUNCTION__, (int)data, data); + PRINTF ("%s: Read 0x%x into 0x%p\n", __FUNCTION__, (int) data, data); #endif - return (int)data; + return (int) data; } /* * Write data to the FPGA SelectMap port */ -int -fpga_write_data_fn(unsigned char data, int flush, int cookie) +int fpga_write_data_fn (unsigned char data, int flush, int cookie) { - vu_char *p = (vu_char *)SELECTMAP_BASE; + vu_char *p = (vu_char *) SELECTMAP_BASE; #if 0 - PRINTF("%s: Write Data 0x%x\n", __FUNCTION__, (int)data); + PRINTF ("%s: Write Data 0x%x\n", __FUNCTION__, (int) data); #endif *p = data; - return (int)data; + return (int) data; } /* * Abort and FPGA operation */ -int -fpga_abort_fn(int cookie) +int fpga_abort_fn (int cookie) { - PRINTF("%s:%d: FPGA program sequence aborted\n", - __FUNCTION__, __LINE__); + PRINTF ("%s:%d: FPGA program sequence aborted\n", + __FUNCTION__, __LINE__); return FPGA_FAIL; } @@ -324,11 +310,10 @@ fpga_abort_fn(int cookie) * FPGA reset is asserted to keep the FPGA from starting up after * configuration. */ -int -fpga_pre_config_fn(int cookie) +int fpga_pre_config_fn (int cookie) { - PRINTF("%s:%d: FPGA pre-configuration\n", __FUNCTION__, __LINE__); - fpga_reset(TRUE); + PRINTF ("%s:%d: FPGA pre-configuration\n", __FUNCTION__, __LINE__); + fpga_reset (TRUE); return 0; } @@ -337,22 +322,21 @@ fpga_pre_config_fn(int cookie) * FPGA post configuration function. Blip the FPGA reset line and then see if * the FPGA appears to be running. */ -int -fpga_post_config_fn(int cookie) +int fpga_post_config_fn (int cookie) { int rc; - PRINTF("%s:%d: FPGA post configuration\n", __FUNCTION__, __LINE__); - fpga_reset(TRUE); - udelay(1000); - fpga_reset(FALSE); + PRINTF ("%s:%d: FPGA post configuration\n", __FUNCTION__, __LINE__); + fpga_reset (TRUE); + udelay (1000); + fpga_reset (FALSE); udelay (1000); /* * Use the FPGA,s inverting bus test register to do a simple test of the * processor interface. */ - rc = test_fpga_ibtr(); + rc = test_fpga_ibtr (); return rc; } @@ -367,32 +351,27 @@ fpga_post_config_fn(int cookie) * going low during configuration, so there is no need for a separate error * function. */ -int -fpga_clk_fn(int assert_clk, int flush, int cookie) +int fpga_clk_fn (int assert_clk, int flush, int cookie) { return assert_clk; } -int -fpga_cs_fn(int assert_cs, int flush, int cookie) +int fpga_cs_fn (int assert_cs, int flush, int cookie) { return assert_cs; } -int -fpga_wr_fn(int assert_write, int flush, int cookie) +int fpga_wr_fn (int assert_write, int flush, int cookie) { return assert_write; } -int -fpga_err_fn(int cookie) +int fpga_err_fn (int cookie) { return 0; } -int -fpga_busy_fn(int cookie) +int fpga_busy_fn (int cookie) { return 0; } diff --git a/board/gen860t/gen860t.c b/board/gen860t/gen860t.c index 434055c..f1d173e 100644 --- a/board/gen860t/gen860t.c +++ b/board/gen860t/gen860t.c @@ -94,7 +94,7 @@ const uint sdram_upm_table[] = { 0xfffffc05, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, /* exception (offset 0x3C in upm ram) */ - }; +}; const uint selectmap_upm_table[] = { /* single read (offset 0x00 in upm ram) */ @@ -124,63 +124,61 @@ const uint selectmap_upm_table[] = { /* * Check board identity. Always successful (gives information only) */ -int -checkboard(void) +int checkboard (void) { DECLARE_GLOBAL_DATA_PTR; - unsigned char *s; - unsigned char buf[64]; - int i; + unsigned char *s; + unsigned char buf[64]; + int i; - i = getenv_r("board_id", buf, sizeof(buf)); - s = (i>0) ? buf : NULL; + i = getenv_r ("board_id", buf, sizeof (buf)); + s = (i > 0) ? buf : NULL; if (s) { - printf("%s ", s); + printf ("%s ", s); } else { - printf("<unknown> "); + printf ("<unknown> "); } - i = getenv_r("serial#", buf, sizeof(buf)); - s = (i>0) ? buf : NULL; + i = getenv_r ("serial#", buf, sizeof (buf)); + s = (i > 0) ? buf : NULL; if (s) { - printf("S/N %s\n", s); + printf ("S/N %s\n", s); } else { - printf("S/N <unknown>\n"); + printf ("S/N <unknown>\n"); } - printf("CPU at %s MHz, ",strmhz(buf, gd->cpu_clk)); - printf("local bus at %s MHz\n", strmhz(buf, gd->bus_clk)); - return (0); + printf ("CPU at %s MHz, ", strmhz (buf, gd->cpu_clk)); + printf ("local bus at %s MHz\n", strmhz (buf, gd->bus_clk)); + return (0); } /* * Initialize SDRAM */ -long int -initdram(int board_type) +long int initdram (int board_type) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; - volatile memctl8xx_t *memctl = &immr->im_memctl; - - upmconfig(UPMA, - (uint *)sdram_upm_table, - sizeof(sdram_upm_table) / sizeof(uint) - ); - - /* - * Setup MAMR register - */ - memctl->memc_mptpr = CFG_MPTPR_1BK_8K; - memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */ - - /* - * Map CS1* to SDRAM bank - */ - memctl->memc_or1 = CFG_OR1; - memctl->memc_br1 = CFG_BR1; + volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile memctl8xx_t *memctl = &immr->im_memctl; + + upmconfig (UPMA, + (uint *) sdram_upm_table, + sizeof (sdram_upm_table) / sizeof (uint) + ); + + /* + * Setup MAMR register + */ + memctl->memc_mptpr = CFG_MPTPR_1BK_8K; + memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */ + + /* + * Map CS1* to SDRAM bank + */ + memctl->memc_or1 = CFG_OR1; + memctl->memc_br1 = CFG_BR1; /* * Perform SDRAM initialization sequence: @@ -193,31 +191,31 @@ initdram(int board_type) * Program SDRAM for standard operation, sequential burst, burst length * of 4, CAS latency of 2. */ - memctl->memc_mar = 0x00000000; + memctl->memc_mar = 0x00000000; memctl->memc_mcr = MCR_UPM_A | MCR_OP_RUN | MCR_MB_CS1 | - MCR_MLCF(0) | UPMA_NOP_ADDR; - udelay(200); - memctl->memc_mar = 0x00000000; + MCR_MLCF (0) | UPMA_NOP_ADDR; + udelay (200); + memctl->memc_mar = 0x00000000; memctl->memc_mcr = MCR_UPM_A | MCR_OP_RUN | MCR_MB_CS1 | - MCR_MLCF(4) | UPMA_PRECHARGE_ADDR; + MCR_MLCF (4) | UPMA_PRECHARGE_ADDR; - memctl->memc_mar = 0x00000000; + memctl->memc_mar = 0x00000000; memctl->memc_mcr = MCR_UPM_A | MCR_OP_RUN | MCR_MB_CS1 | - MCR_MLCF(2) | UPM_REFRESH_ADDR; + MCR_MLCF (2) | UPM_REFRESH_ADDR; - memctl->memc_mar = 0x00000088; + memctl->memc_mar = 0x00000088; memctl->memc_mcr = MCR_UPM_A | MCR_OP_RUN | MCR_MB_CS1 | - MCR_MLCF(1) | UPMA_MRS_ADDR; + MCR_MLCF (1) | UPMA_MRS_ADDR; - memctl->memc_mar = 0x00000000; + memctl->memc_mar = 0x00000000; memctl->memc_mcr = MCR_UPM_A | MCR_OP_RUN | MCR_MB_CS1 | - MCR_MLCF(0) | UPMA_NOP_ADDR; + MCR_MLCF (0) | UPMA_NOP_ADDR; /* * Enable refresh */ - memctl->memc_mamr |= MAMR_PTAE; + memctl->memc_mamr |= MAMR_PTAE; - return (SDRAM_SIZE); + return (SDRAM_SIZE); } /* @@ -225,42 +223,39 @@ initdram(int board_type) * The DOC lives in the CS2* space */ #if (CONFIG_COMMANDS & CFG_CMD_DOC) -extern void -doc_probe(ulong physadr); +extern void doc_probe (ulong physadr); -void -doc_init(void) +void doc_init (void) { - printf("Probing at 0x%.8x: ", DOC_BASE); - doc_probe(DOC_BASE); + printf ("Probing at 0x%.8x: ", DOC_BASE); + doc_probe (DOC_BASE); } #endif /* * Miscellaneous intialization */ -int -misc_init_r (void) +int misc_init_r (void) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; - volatile memctl8xx_t *memctl = &immr->im_memctl; + volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile memctl8xx_t *memctl = &immr->im_memctl; /* * Set up UPMB to handle the Virtex FPGA SelectMap interface */ - upmconfig(UPMB, (uint *)selectmap_upm_table, - sizeof(selectmap_upm_table) / sizeof(uint)); + upmconfig (UPMB, (uint *) selectmap_upm_table, + sizeof (selectmap_upm_table) / sizeof (uint)); - memctl->memc_mbmr = 0x0; + memctl->memc_mbmr = 0x0; - config_mpc8xx_ioports(immr); + config_mpc8xx_ioports (immr); #if (CONFIG_COMMANDS & CFG_CMD_MII) - mii_init(); + mii_init (); #endif #if (CONFIG_FPGA) - gen860t_init_fpga(); + gen860t_init_fpga (); #endif return 0; } @@ -268,8 +263,7 @@ misc_init_r (void) /* * Final init hook before entering command loop. */ -int -last_stage_init(void) +int last_stage_init (void) { #if !defined(CONFIG_SC) unsigned char buf[256]; @@ -278,15 +272,15 @@ last_stage_init(void) /* * Turn the beeper volume all the way down in case this is a warm boot. */ - set_beeper_volume(-64); - init_beeper(); + set_beeper_volume (-64); + init_beeper (); /* * Read the environment to see what to do with the beeper */ - i = getenv_r("beeper", buf, sizeof(buf)); + i = getenv_r ("beeper", buf, sizeof (buf)); if (i > 0) { - do_beeper(buf); + do_beeper (buf); } #endif return 0; @@ -295,11 +289,10 @@ last_stage_init(void) /* * Stub to make POST code happy. Can't self-poweroff, so just hang. */ -void -board_poweroff(void) +void board_poweroff (void) { - puts("### Please power off the board ###\n"); - while (1); + puts ("### Please power off the board ###\n"); + while (1); } #ifdef CONFIG_POST @@ -307,9 +300,9 @@ board_poweroff(void) * Returns 1 if keys pressed to start the power-on long-running tests * Called from board_init_f(). */ -int post_hotkeys_pressed(void) +int post_hotkeys_pressed (void) { - return 0; /* No hotkeys supported */ + return 0; /* No hotkeys supported */ } #endif diff --git a/board/gen860t/ioport.c b/board/gen860t/ioport.c index 7b3ebd4..1fc9545 100644 --- a/board/gen860t/ioport.c +++ b/board/gen860t/ioport.c @@ -199,16 +199,16 @@ const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = { * Configure the MPC8XX I/O ports per the ioport configuration table * (taken from ./cpu/mpc8260/cpu_init.c) */ -void -config_mpc8xx_ioports(volatile immap_t *immr) +void config_mpc8xx_ioports (volatile immap_t * immr) { - int portnum; + int portnum; - for (portnum = 0; portnum < NUM_PORTS; portnum++) { + for (portnum = 0; portnum < NUM_PORTS; portnum++) { uint pmsk = 0, ppar = 0, psor = 0, pdir = 0; uint podr = 0, pdat = 0, pint = 0; uint msk = 1; - mpc8xx_iop_conf_t *iopc = (mpc8xx_iop_conf_t *)&iop_conf_tab[portnum][0]; + mpc8xx_iop_conf_t *iopc = + (mpc8xx_iop_conf_t *) & iop_conf_tab[portnum][0]; mpc8xx_iop_conf_t *eiopc = iopc + PORT_BITS; /* @@ -216,104 +216,132 @@ config_mpc8xx_ioports(volatile immap_t *immr) * in the configuration tables. */ if (portnum != 1) { - iopc = (mpc8xx_iop_conf_t *)&iop_conf_tab[portnum][2]; + iopc = (mpc8xx_iop_conf_t *) & + iop_conf_tab[portnum][2]; } /* * NOTE: index 0 refers to pin 17, index 17 refers to pin 0 */ while (iopc < eiopc) { - if (iopc->conf) { + if (iopc->conf) { pmsk |= msk; - if (iopc->ppar) ppar |= msk; - if (iopc->psor) psor |= msk; - if (iopc->pdir) pdir |= msk; - if (iopc->podr) podr |= msk; - if (iopc->pdat) pdat |= msk; - if (iopc->pint) pint |= msk; - } - msk <<= 1; - iopc++; + if (iopc->ppar) + ppar |= msk; + if (iopc->psor) + psor |= msk; + if (iopc->pdir) + pdir |= msk; + if (iopc->podr) + podr |= msk; + if (iopc->pdat) + pdat |= msk; + if (iopc->pint) + pint |= msk; + } + msk <<= 1; + iopc++; } - PRINTF("%s:%d:\n portnum=%d ", __FUNCTION__, __LINE__, portnum); + PRINTF ("%s:%d:\n portnum=%d ", __FUNCTION__, __LINE__, + portnum); #ifdef IOPORT_DEBUG - switch(portnum) { - case 0: printf("(A)\n"); break; - case 1: printf("(B)\n"); break; - case 2: printf("(C)\n"); break; - case 3: printf("(D)\n"); break; - default: printf("(?)\n"); break; + switch (portnum) { + case 0: + printf ("(A)\n"); + break; + case 1: + printf ("(B)\n"); + break; + case 2: + printf ("(C)\n"); + break; + case 3: + printf ("(D)\n"); + break; + default: + printf ("(?)\n"); + break; } #endif - PRINTF(" ppar=0x%.8x pdir=0x%.8x podr=0x%.8x\n" - " pdat=0x%.8x psor=0x%.8x pint=0x%.8x pmsk=0x%.8x\n", - ppar, pdir, podr, pdat, psor, pint, pmsk); + PRINTF (" ppar=0x%.8x pdir=0x%.8x podr=0x%.8x\n" + " pdat=0x%.8x psor=0x%.8x pint=0x%.8x pmsk=0x%.8x\n", + ppar, pdir, podr, pdat, psor, pint, pmsk); /* * Have to handle the ioports on a port-by-port basis since there * are three different flavors. */ if (pmsk != 0) { - uint tpmsk = ~pmsk; + uint tpmsk = ~pmsk; - if (0 == portnum) { /* port A */ - immr->im_ioport.iop_papar &= tpmsk; - immr->im_ioport.iop_padat = - (immr->im_ioport.iop_padat & tpmsk) | pdat; - immr->im_ioport.iop_padir = - (immr->im_ioport.iop_padir & tpmsk) | pdir; - immr->im_ioport.iop_paodr = - (immr->im_ioport.iop_paodr & tpmsk) | podr; - immr->im_ioport.iop_papar |= ppar; - } - else if (1 == portnum) { /* port B */ - immr->im_cpm.cp_pbpar &= tpmsk; - immr->im_cpm.cp_pbdat = (immr->im_cpm.cp_pbdat & tpmsk) | pdat; - immr->im_cpm.cp_pbdir = (immr->im_cpm.cp_pbdir & tpmsk) | pdir; - immr->im_cpm.cp_pbodr = (immr->im_cpm.cp_pbodr & tpmsk) | podr; - immr->im_cpm.cp_pbpar |= ppar; - } - else if (2 == portnum) { /* port C */ - immr->im_ioport.iop_pcpar &= tpmsk; - immr->im_ioport.iop_pcdat = - (immr->im_ioport.iop_pcdat & tpmsk) | pdat; - immr->im_ioport.iop_pcdir = - (immr->im_ioport.iop_pcdir & tpmsk) | pdir; - immr->im_ioport.iop_pcint = - (immr->im_ioport.iop_pcint & tpmsk) | pint; - immr->im_ioport.iop_pcso = - (immr->im_ioport.iop_pcso & tpmsk) | psor; - immr->im_ioport.iop_pcpar |= ppar; - } - else if (3 == portnum) { /* port D */ - immr->im_ioport.iop_pdpar &= tpmsk; - immr->im_ioport.iop_pddat = - (immr->im_ioport.iop_pddat & tpmsk) | pdat; - immr->im_ioport.iop_pddir = - (immr->im_ioport.iop_pddir & tpmsk) | pdir; - immr->im_ioport.iop_pdpar |= ppar; + if (0 == portnum) { /* port A */ + immr->im_ioport.iop_papar &= tpmsk; + immr->im_ioport.iop_padat = + (immr->im_ioport. + iop_padat & tpmsk) | pdat; + immr->im_ioport.iop_padir = + (immr->im_ioport. + iop_padir & tpmsk) | pdir; + immr->im_ioport.iop_paodr = + (immr->im_ioport. + iop_paodr & tpmsk) | podr; + immr->im_ioport.iop_papar |= ppar; + } else if (1 == portnum) { /* port B */ + immr->im_cpm.cp_pbpar &= tpmsk; + immr->im_cpm.cp_pbdat = + (immr->im_cpm. + cp_pbdat & tpmsk) | pdat; + immr->im_cpm.cp_pbdir = + (immr->im_cpm. + cp_pbdir & tpmsk) | pdir; + immr->im_cpm.cp_pbodr = + (immr->im_cpm. + cp_pbodr & tpmsk) | podr; + immr->im_cpm.cp_pbpar |= ppar; + } else if (2 == portnum) { /* port C */ + immr->im_ioport.iop_pcpar &= tpmsk; + immr->im_ioport.iop_pcdat = + (immr->im_ioport. + iop_pcdat & tpmsk) | pdat; + immr->im_ioport.iop_pcdir = + (immr->im_ioport. + iop_pcdir & tpmsk) | pdir; + immr->im_ioport.iop_pcint = + (immr->im_ioport. + iop_pcint & tpmsk) | pint; + immr->im_ioport.iop_pcso = + (immr->im_ioport. + iop_pcso & tpmsk) | psor; + immr->im_ioport.iop_pcpar |= ppar; + } else if (3 == portnum) { /* port D */ + immr->im_ioport.iop_pdpar &= tpmsk; + immr->im_ioport.iop_pddat = + (immr->im_ioport. + iop_pddat & tpmsk) | pdat; + immr->im_ioport.iop_pddir = + (immr->im_ioport. + iop_pddir & tpmsk) | pdir; + immr->im_ioport.iop_pdpar |= ppar; } } - } + } - PRINTF("%s:%d: Port A:\n papar=0x%.4x padir=0x%.4x" - " paodr=0x%.4x\n padat=0x%.4x\n", __FUNCTION__, __LINE__, - immr->im_ioport.iop_papar, immr->im_ioport.iop_padir, - immr->im_ioport.iop_paodr, immr->im_ioport.iop_padat); - PRINTF("%s:%d: Port B:\n pbpar=0x%.8x pbdir=0x%.8x" - " pbodr=0x%.8x\n pbdat=0x%.8x\n", __FUNCTION__, __LINE__, - immr->im_cpm.cp_pbpar, immr->im_cpm.cp_pbdir, - immr->im_cpm.cp_pbodr, immr->im_cpm.cp_pbdat); - PRINTF("%s:%d: Port C:\n pcpar=0x%.4x pcdir=0x%.4x" - " pcdat=0x%.4x\n pcso=0x%.4x pcint=0x%.4x\n ", - __FUNCTION__, __LINE__, immr->im_ioport.iop_pcpar, - immr->im_ioport.iop_pcdir, immr->im_ioport.iop_pcdat, - immr->im_ioport.iop_pcso, immr->im_ioport.iop_pcint); - PRINTF("%s:%d: Port D:\n pdpar=0x%.4x pddir=0x%.4x" - " pddat=0x%.4x\n", __FUNCTION__, __LINE__, - immr->im_ioport.iop_pdpar, immr->im_ioport.iop_pddir, - immr->im_ioport.iop_pddat); + PRINTF ("%s:%d: Port A:\n papar=0x%.4x padir=0x%.4x" + " paodr=0x%.4x\n padat=0x%.4x\n", __FUNCTION__, __LINE__, + immr->im_ioport.iop_papar, immr->im_ioport.iop_padir, + immr->im_ioport.iop_paodr, immr->im_ioport.iop_padat); + PRINTF ("%s:%d: Port B:\n pbpar=0x%.8x pbdir=0x%.8x" + " pbodr=0x%.8x\n pbdat=0x%.8x\n", __FUNCTION__, __LINE__, + immr->im_cpm.cp_pbpar, immr->im_cpm.cp_pbdir, + immr->im_cpm.cp_pbodr, immr->im_cpm.cp_pbdat); + PRINTF ("%s:%d: Port C:\n pcpar=0x%.4x pcdir=0x%.4x" + " pcdat=0x%.4x\n pcso=0x%.4x pcint=0x%.4x\n ", + __FUNCTION__, __LINE__, immr->im_ioport.iop_pcpar, + immr->im_ioport.iop_pcdir, immr->im_ioport.iop_pcdat, + immr->im_ioport.iop_pcso, immr->im_ioport.iop_pcint); + PRINTF ("%s:%d: Port D:\n pdpar=0x%.4x pddir=0x%.4x" + " pddat=0x%.4x\n", __FUNCTION__, __LINE__, + immr->im_ioport.iop_pdpar, immr->im_ioport.iop_pddir, + immr->im_ioport.iop_pddat); } - -/* vim: set ts=4 sw=4 tw=78: */ diff --git a/board/gw8260/gw8260.c b/board/gw8260/gw8260.c index 7ca1989..009ca30 100644 --- a/board/gw8260/gw8260.c +++ b/board/gw8260/gw8260.c @@ -212,16 +212,17 @@ const iop_conf_t iop_conf_tab[4][32] = { /* */ /* */ /*********************************************************************/ -int checkboard(void) +int checkboard (void) { - char *str; - puts ("Board: Advent Networks gw8260\n"); + char *str; - str = getenv("serial#"); - if (str != NULL) { - printf("SN: %s\n", str); - } - return 0; + puts ("Board: Advent Networks gw8260\n"); + + str = getenv ("serial#"); + if (str != NULL) { + printf ("SN: %s\n", str); + } + return 0; } @@ -246,30 +247,31 @@ int checkboard(void) /* May cloober fr0. */ /* */ /*********************************************************************/ -static void move64(unsigned long long *src, unsigned long long *dest) +static void move64 (unsigned long long *src, unsigned long long *dest) { - asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */ - "stfd 0, 0(4)" /* *dest = fpr0 */ - : : : "fr0" ); /* Clobbers fr0 */ - return; + asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */ + "stfd 0, 0(4)" /* *dest = fpr0 */ + : : : "fr0"); /* Clobbers fr0 */ + return; } #if defined (CFG_DRAM_TEST_DATA) -unsigned long long pattern[]= { - 0xaaaaaaaaaaaaaaaa, - 0xcccccccccccccccc, - 0xf0f0f0f0f0f0f0f0, - 0xff00ff00ff00ff00, - 0xffff0000ffff0000, - 0xffffffff00000000, - 0x00000000ffffffff, - 0x0000ffff0000ffff, - 0x00ff00ff00ff00ff, - 0x0f0f0f0f0f0f0f0f, - 0x3333333333333333, - 0x5555555555555555}; +unsigned long long pattern[] = { + 0xaaaaaaaaaaaaaaaa, + 0xcccccccccccccccc, + 0xf0f0f0f0f0f0f0f0, + 0xff00ff00ff00ff00, + 0xffff0000ffff0000, + 0xffffffff00000000, + 0x00000000ffffffff, + 0x0000ffff0000ffff, + 0x00ff00ff00ff00ff, + 0x0f0f0f0f0f0f0f0f, + 0x3333333333333333, + 0x5555555555555555 +}; /*********************************************************************/ /* NAME: mem_test_data() - test data lines for shorts and opens */ @@ -315,34 +317,34 @@ unsigned long long pattern[]= { /* Assumes only one one SDRAM bank */ /* */ /*********************************************************************/ -int mem_test_data(void) +int mem_test_data (void) { - unsigned long long * pmem = - (unsigned long long *)CFG_SDRAM_BASE ; - unsigned long long temp64; - int num_patterns = sizeof(pattern)/ sizeof(pattern[0]); - int i; - unsigned int hi, lo; - - for ( i = 0; i < num_patterns; i++) { - move64(&(pattern[i]), pmem); - move64(pmem, &temp64); - - /* hi = (temp64>>32) & 0xffffffff; */ - /* lo = temp64 & 0xffffffff; */ - /* printf("\ntemp64 = 0x%08x%08x", hi, lo); */ - - hi = (pattern[i]>>32) & 0xffffffff; - lo = pattern[i] & 0xffffffff; - /* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo); */ - - if (temp64 != pattern[i]){ - printf ("\n Data Test Failed, pattern 0x%08x%08x", hi, lo); - return 1; + unsigned long long *pmem = (unsigned long long *) CFG_SDRAM_BASE; + unsigned long long temp64; + int num_patterns = sizeof (pattern) / sizeof (pattern[0]); + int i; + unsigned int hi, lo; + + for (i = 0; i < num_patterns; i++) { + move64 (&(pattern[i]), pmem); + move64 (pmem, &temp64); + + /* hi = (temp64>>32) & 0xffffffff; */ + /* lo = temp64 & 0xffffffff; */ + /* printf("\ntemp64 = 0x%08x%08x", hi, lo); */ + + hi = (pattern[i] >> 32) & 0xffffffff; + lo = pattern[i] & 0xffffffff; + /* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo); */ + + if (temp64 != pattern[i]) { + printf ("\n Data Test Failed, pattern 0x%08x%08x", + hi, lo); + return 1; + } } - } - return 0; + return 0; } #endif /* CFG_DRAM_TEST_DATA */ @@ -368,25 +370,26 @@ int mem_test_data(void) /* */ /* */ /*********************************************************************/ -int mem_test_address(void) +int mem_test_address (void) { - volatile unsigned int * pmem = (volatile unsigned int *)CFG_SDRAM_BASE ; - const unsigned int size = (CFG_SDRAM_SIZE * 1024 * 1024)/4; - unsigned int i; - - /* write address to each location */ - for ( i = 0; i < size; i++) { - pmem[i] = i; - } + volatile unsigned int *pmem = + (volatile unsigned int *) CFG_SDRAM_BASE; + const unsigned int size = (CFG_SDRAM_SIZE * 1024 * 1024) / 4; + unsigned int i; + + /* write address to each location */ + for (i = 0; i < size; i++) { + pmem[i] = i; + } - /* verify each loaction */ - for ( i = 0; i < size; i++) { - if (pmem[i] != i) { - printf("\n Address Test Failed at 0x%x", i); - return 1; + /* verify each loaction */ + for (i = 0; i < size; i++) { + if (pmem[i] != i) { + printf ("\n Address Test Failed at 0x%x", i); + return 1; + } } - } - return 0; + return 0; } #endif /* CFG_DRAM_TEST_ADDRESS */ @@ -418,39 +421,35 @@ int mem_test_address(void) /* */ /* */ /*********************************************************************/ -int mem_march(volatile unsigned long long * base, - unsigned int size, - unsigned long long rmask, - unsigned long long wmask, - short read, - short write) +int mem_march (volatile unsigned long long *base, + unsigned int size, + unsigned long long rmask, + unsigned long long wmask, short read, short write) { - unsigned int i; - unsigned long long temp; - unsigned int hitemp, lotemp, himask, lomask; - - for (i = 0 ; i < size ; i++) { - if (read != 0) { - /* temp = base[i]; */ - move64 ((unsigned long long *)&(base[i]), &temp); - if (rmask != temp) { - hitemp = (temp>>32) & 0xffffffff; - lotemp = temp & 0xffffffff; - himask = (rmask>>32) & 0xffffffff; - lomask = rmask & 0xffffffff; - - printf("\n Walking one's test failed: address = 0x%08x," - "\n\texpected 0x%08x%08x, found 0x%08x%08x", - i<<3, himask, lomask, hitemp, lotemp); - return 1; - } - } - if ( write != 0 ) { - /* base[i] = wmask; */ - move64 (&wmask, (unsigned long long *)&(base[i])); + unsigned int i; + unsigned long long temp; + unsigned int hitemp, lotemp, himask, lomask; + + for (i = 0; i < size; i++) { + if (read != 0) { + /* temp = base[i]; */ + move64 ((unsigned long long *) &(base[i]), &temp); + if (rmask != temp) { + hitemp = (temp >> 32) & 0xffffffff; + lotemp = temp & 0xffffffff; + himask = (rmask >> 32) & 0xffffffff; + lomask = rmask & 0xffffffff; + + printf ("\n Walking one's test failed: address = 0x%08x," "\n\texpected 0x%08x%08x, found 0x%08x%08x", i << 3, himask, lomask, hitemp, lotemp); + return 1; + } + } + if (write != 0) { + /* base[i] = wmask; */ + move64 (&wmask, (unsigned long long *) &(base[i])); + } } - } - return 0; + return 0; } #endif /* CFG_DRAM_TEST_WALK */ @@ -480,43 +479,44 @@ int mem_march(volatile unsigned long long * base, /* */ /* */ /*********************************************************************/ -int mem_test_walk(void) +int mem_test_walk (void) { - unsigned long long mask; - volatile unsigned long long * pmem = - (volatile unsigned long long *)CFG_SDRAM_BASE ; - const unsigned long size = (CFG_SDRAM_SIZE * 1024 * 1024)/8; - - unsigned int i; - mask = 0x01; - - printf("Initial Pass"); - mem_march(pmem,size,0x0,0x1,0,1); - - printf("\b\b\b\b\b\b\b\b\b\b\b\b"); - printf(" "); - printf("\b\b\b\b\b\b\b\b\b\b\b\b"); - - for (i = 0 ; i < 63 ; i++) { - printf("Pass %2d", i+2); - if ( mem_march(pmem,size, mask,mask << 1, 1, 1) != 0 ){ - /*printf("mask: 0x%x, pass: %d, ", mask, i);*/ - return 1; + unsigned long long mask; + volatile unsigned long long *pmem = + (volatile unsigned long long *) CFG_SDRAM_BASE; + const unsigned long size = (CFG_SDRAM_SIZE * 1024 * 1024) / 8; + + unsigned int i; + + mask = 0x01; + + printf ("Initial Pass"); + mem_march (pmem, size, 0x0, 0x1, 0, 1); + + printf ("\b\b\b\b\b\b\b\b\b\b\b\b"); + printf (" "); + printf ("\b\b\b\b\b\b\b\b\b\b\b\b"); + + for (i = 0; i < 63; i++) { + printf ("Pass %2d", i + 2); + if (mem_march (pmem, size, mask, mask << 1, 1, 1) != 0) { + /*printf("mask: 0x%x, pass: %d, ", mask, i); */ + return 1; + } + mask = mask << 1; + printf ("\b\b\b\b\b\b\b"); } - mask = mask<<1; - printf("\b\b\b\b\b\b\b"); - } - printf("Last Pass"); - if (mem_march(pmem, size, 0, mask, 0, 1) != 0) { - /* printf("mask: 0x%x", mask); */ - return 1; - } - printf("\b\b\b\b\b\b\b\b\b"); - printf(" "); - printf("\b\b\b\b\b\b\b\b\b"); + printf ("Last Pass"); + if (mem_march (pmem, size, 0, mask, 0, 1) != 0) { + /* printf("mask: 0x%x", mask); */ + return 1; + } + printf ("\b\b\b\b\b\b\b\b\b"); + printf (" "); + printf ("\b\b\b\b\b\b\b\b\b"); - return 0; + return 0; } /*********************************************************************/ @@ -542,46 +542,46 @@ int mem_test_walk(void) /* */ /* */ /*********************************************************************/ -int testdram(void) +int testdram (void) { - char *s; - int rundata, runaddress, runwalk; - - s = getenv ("testdramdata"); - rundata = (s && (*s == 'y')) ? 1 : 0; - s = getenv ("testdramaddress"); - runaddress = (s && (*s == 'y')) ? 1 : 0; - s = getenv ("testdramwalk"); - runwalk = (s && (*s == 'y')) ? 1 : 0; - - if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) { - printf("Testing RAM ... "); - } + char *s; + int rundata, runaddress, runwalk; + + s = getenv ("testdramdata"); + rundata = (s && (*s == 'y')) ? 1 : 0; + s = getenv ("testdramaddress"); + runaddress = (s && (*s == 'y')) ? 1 : 0; + s = getenv ("testdramwalk"); + runwalk = (s && (*s == 'y')) ? 1 : 0; + + if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) { + printf ("Testing RAM ... "); + } #ifdef CFG_DRAM_TEST_DATA - if (rundata == 1) { - if (mem_test_data() == 1){ - return 1; + if (rundata == 1) { + if (mem_test_data () == 1) { + return 1; + } } - } #endif #ifdef CFG_DRAM_TEST_ADDRESS - if (runaddress == 1) { - if (mem_test_address() == 1){ - return 1; + if (runaddress == 1) { + if (mem_test_address () == 1) { + return 1; + } } - } #endif #ifdef CFG_DRAM_TEST_WALK - if (runwalk == 1) { - if (mem_test_walk() == 1){ - return 1; + if (runwalk == 1) { + if (mem_test_walk () == 1) { + return 1; + } } - } #endif - if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) { - printf("passed"); - } - return 0; + if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) { + printf ("passed"); + } + return 0; } #endif /* CFG_DRAM_TEST */ @@ -606,52 +606,52 @@ int testdram(void) /* */ /* */ /*********************************************************************/ -long int initdram(int board_type) +long int initdram (int board_type) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile memctl8260_t *memctl = &immap->im_memctl; - volatile uchar c = 0, *ramaddr = (uchar *)(CFG_SDRAM_BASE + 0x8); - ulong psdmr = CFG_PSDMR; - int i; - - /* - * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35): - * - * "At system reset, initialization software must set up the - * programmable parameters in the memory controller banks registers - * (ORx, BRx, P/LSDMR). After all memory parameters are configured, - * system software should execute the following initialization sequence - * for each SDRAM device. - * - * 1. Issue a PRECHARGE-ALL-BANKS command - * 2. Issue eight CBR REFRESH commands - * 3. Issue a MODE-SET command to initialize the mode register - * - * The initial commands are executed by setting P/LSDMR[OP] and - * accessing the SDRAM with a single-byte transaction." - * - * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE. - */ - - memctl->memc_psrt = CFG_PSRT; - memctl->memc_mptpr = CFG_MPTPR; - - memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; - *ramaddr = c; - - memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; - for (i = 0; i < 8; i++){ + volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile memctl8260_t *memctl = &immap->im_memctl; + volatile uchar c = 0, *ramaddr = (uchar *) (CFG_SDRAM_BASE + 0x8); + ulong psdmr = CFG_PSDMR; + int i; + + /* + * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35): + * + * "At system reset, initialization software must set up the + * programmable parameters in the memory controller banks registers + * (ORx, BRx, P/LSDMR). After all memory parameters are configured, + * system software should execute the following initialization sequence + * for each SDRAM device. + * + * 1. Issue a PRECHARGE-ALL-BANKS command + * 2. Issue eight CBR REFRESH commands + * 3. Issue a MODE-SET command to initialize the mode register + * + * The initial commands are executed by setting P/LSDMR[OP] and + * accessing the SDRAM with a single-byte transaction." + * + * The appropriate BRx/ORx registers have already been set when we + * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE. + */ + + memctl->memc_psrt = CFG_PSRT; + memctl->memc_mptpr = CFG_MPTPR; + + memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; *ramaddr = c; - } - memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; - *ramaddr = c; - memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN; - *ramaddr = c; + memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; + for (i = 0; i < 8; i++) { + *ramaddr = c; + } + memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; + *ramaddr = c; + + memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN; + *ramaddr = c; - /* return total ram size */ - return (CFG_SDRAM0_SIZE * 1024 * 1024); + /* return total ram size */ + return (CFG_SDRAM0_SIZE * 1024 * 1024); } /*********************************************************************/ diff --git a/board/m5272c3/Makefile b/board/m5272c3/Makefile index 378428e..e5d8446 100644 --- a/board/m5272c3/Makefile +++ b/board/m5272c3/Makefile @@ -28,7 +28,7 @@ LIB = lib$(BOARD).a OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/m5272c3/config.mk b/board/m5272c3/config.mk index e0cd8da..ccb2cf7 100644 --- a/board/m5272c3/config.mk +++ b/board/m5272c3/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0x3e0000 +TEXT_BASE = 0xffe00000 diff --git a/board/m5272c3/m5272c3.c b/board/m5272c3/m5272c3.c index 91ec9a1..0dfeaf2 100644 --- a/board/m5272c3/m5272c3.c +++ b/board/m5272c3/m5272c3.c @@ -22,14 +22,31 @@ */ #include <common.h> +#include <asm/m5272.h> +#include <asm/immap_5272.h> -int checkboard (void) -{ - puts ("MOTOROLA MCF5272C3 Evaluation Board\n"); + +int checkboard (void) { + puts ("Board: "); + puts("MOTOROLA MCF5272C3 EVB\n"); return 0; -} + }; + +long int initdram (int board_type) { + volatile sdramctrl_t * sdp = (sdramctrl_t *)(CFG_MBAR + MCFSIM_SDCR); + + sdp->sdram_sdtr = 0xf539; + sdp->sdram_sdcr = 0x4211; + + /* Dummy write to start SDRAM */ + *((volatile unsigned long *)0) = 0; + + return CFG_SDRAM_SIZE * 1024 * 1024; + }; + +int testdram (void) { + /* TODO: XXX XXX XXX */ + printf ("DRAM test not implemented!\n"); -long int initdram (int board_type) -{ - return 0x400000; + return (0); } diff --git a/board/m5272c3/u-boot.lds b/board/m5272c3/u-boot.lds index 0d3829a..f4aa16a 100644 --- a/board/m5272c3/u-boot.lds +++ b/board/m5272c3/u-boot.lds @@ -1,5 +1,5 @@ /* - * (C) Copyright 2000-2003 + * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -22,7 +22,7 @@ */ OUTPUT_ARCH(m68k) -SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); /* Do we need any of these for elf? __DYNAMIC = 0; */ SECTIONS @@ -56,15 +56,14 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/coldfire/start.o (.text) - common/dlmalloc.o (.text) - lib_generic/string.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) + cpu/mcf52x2/start.o (.text) + lib_m68k/traps.o (.text) + cpu/mcf52x2/interrupts.o (.text) + common/dlmalloc.o (.text) + lib_generic/zlib.o (.text) -/* . = env_offset; */ - common/environment.o(.text) + . = DEFINED(env_offset) ? env_offset : .; + common/environment.o (.text) *(.text) *(.fixup) @@ -85,9 +84,12 @@ SECTIONS . = (. + 0x00FF) & 0xFFFFFF00; _erotext = .; PROVIDE (erotext = .); + .reloc : { + __got_start = .; *(.got) + __got_end = .; _GOT2_TABLE_ = .; *(.got2) _FIXUP_TABLE_ = .; @@ -108,6 +110,11 @@ SECTIONS _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/m5272c3/u-boot.lds.debug b/board/m5272c3/u-boot.lds.debug deleted file mode 100644 index cb2a729..0000000 --- a/board/m5272c3/u-boot.lds.debug +++ /dev/null @@ -1,130 +0,0 @@ -/* - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(powerpc) -SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); -/* Do we need any of these for elf? - __DYNAMIC = 0; */ -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - cpu/mpc8xx/start.o (.text) - common/dlmalloc.o (.text) - ppc/vsprintf.o (.text) - ppc/crc32.o (.text) - - . = env_offset; - common/environment.o(.text) - - *(.text) - *(.fixup) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.rodata) - *(.rodata1) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x0FFF) & 0xFFFFF000; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(4096); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(4096); - __init_end = .; - - __bss_start = .; - .bss : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - _end = . ; - PROVIDE (end = .); -} diff --git a/board/m5282evb/Makefile b/board/m5282evb/Makefile index 378428e..e5d8446 100644 --- a/board/m5282evb/Makefile +++ b/board/m5282evb/Makefile @@ -28,7 +28,7 @@ LIB = lib$(BOARD).a OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/m5282evb/config.mk b/board/m5282evb/config.mk index e0cd8da..8484307 100644 --- a/board/m5282evb/config.mk +++ b/board/m5282evb/config.mk @@ -22,4 +22,4 @@ # MA 02111-1307 USA # -TEXT_BASE = 0x3e0000 +TEXT_BASE = 0x20000 diff --git a/board/m5282evb/u-boot.lds b/board/m5282evb/u-boot.lds index 0d3829a..d790018 100644 --- a/board/m5282evb/u-boot.lds +++ b/board/m5282evb/u-boot.lds @@ -22,7 +22,7 @@ */ OUTPUT_ARCH(m68k) -SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); /* Do we need any of these for elf? __DYNAMIC = 0; */ SECTIONS @@ -56,7 +56,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/coldfire/start.o (.text) + cpu/mcf52x2/start.o (.text) common/dlmalloc.o (.text) lib_generic/string.o (.text) lib_generic/vsprintf.o (.text) @@ -85,9 +85,11 @@ SECTIONS . = (. + 0x00FF) & 0xFFFFFF00; _erotext = .; PROVIDE (erotext = .); - .reloc : + .reloc : { + __got_start = .; *(.got) + __got_end = .; _GOT2_TABLE_ = .; *(.got2) _FIXUP_TABLE_ = .; @@ -108,6 +110,10 @@ SECTIONS _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/m5282evb/u-boot.lds.debug b/board/m5282evb/u-boot.lds.debug deleted file mode 100644 index cb2a729..0000000 --- a/board/m5282evb/u-boot.lds.debug +++ /dev/null @@ -1,130 +0,0 @@ -/* - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(powerpc) -SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); -/* Do we need any of these for elf? - __DYNAMIC = 0; */ -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - cpu/mpc8xx/start.o (.text) - common/dlmalloc.o (.text) - ppc/vsprintf.o (.text) - ppc/crc32.o (.text) - - . = env_offset; - common/environment.o(.text) - - *(.text) - *(.fixup) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.rodata) - *(.rodata1) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x0FFF) & 0xFFFFF000; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(4096); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(4096); - __init_end = .; - - __bss_start = .; - .bss : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - _end = . ; - PROVIDE (end = .); -} diff --git a/board/ppmc8260/Makefile b/board/ppmc8260/Makefile index 420ee9c..351f4ee 100644 --- a/board/ppmc8260/Makefile +++ b/board/ppmc8260/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = lib$(BOARD).a -OBJS := ppmc8260.o strataflash.o +OBJS := ppmc8260.o $(LIB): $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) diff --git a/board/siemens/IAD210/atm.h b/board/siemens/IAD210/atm.h index f92f3fd..71b0497 100644 --- a/board/siemens/IAD210/atm.h +++ b/board/siemens/IAD210/atm.h @@ -1,9 +1,9 @@ -typedef unsigned char uint8; +typedef unsigned char uint8; typedef unsigned short uint16; -typedef unsigned int uint32; -typedef volatile unsigned char vuint8; +typedef unsigned int uint32; +typedef volatile unsigned char vuint8; typedef volatile unsigned short vuint16; -typedef volatile unsigned int vuint32; +typedef volatile unsigned int vuint32; #define DPRAM_ATM CFG_IMMR + 0x3000 @@ -19,7 +19,7 @@ typedef volatile unsigned int vuint32; #define NUM_AP_ENTRIES (NUM_CONNECTIONS+1) #define NUM_MPHYPT_ENTRIES 1 #define NUM_APCP_ENTRIES 1 -#define NUM_APCT_PRIO_1_ENTRIES 146 /* Determines minimum rate */ +#define NUM_APCT_PRIO_1_ENTRIES 146 /* Determines minimum rate */ #define NUM_TQ_ENTRIES 12 #define SIZE_OF_CT_ENTRY 64 @@ -31,16 +31,16 @@ typedef volatile unsigned int vuint32; #define SIZE_OF_APCT_ENTRY 2 #define SIZE_OF_TQ_ENTRY 2 -#define CT_BASE ((ATM_DPRAM_BEGIN + 63) & 0xFFC0) /*64*/ -#define TCTE_BASE (CT_BASE + NUM_CT_ENTRIES * SIZE_OF_CT_ENTRY) /*32*/ -#define APCP_BASE (TCTE_BASE + NUM_TCTE_ENTRIES * SIZE_OF_TCTE_ENTRY) /*32*/ -#define AM_BEGIN (APCP_BASE + NUM_APCP_ENTRIES * SIZE_OF_APCP_ENTRY) /*4*/ +#define CT_BASE ((ATM_DPRAM_BEGIN + 63) & 0xFFC0) /*64 */ +#define TCTE_BASE (CT_BASE + NUM_CT_ENTRIES * SIZE_OF_CT_ENTRY) /*32 */ +#define APCP_BASE (TCTE_BASE + NUM_TCTE_ENTRIES * SIZE_OF_TCTE_ENTRY) /*32 */ +#define AM_BEGIN (APCP_BASE + NUM_APCP_ENTRIES * SIZE_OF_APCP_ENTRY) /*4 */ #define AM_BASE (AM_BEGIN + (NUM_AM_ENTRIES - 1) * SIZE_OF_AM_ENTRY) -#define AP_BEGIN (AM_BEGIN + NUM_AM_ENTRIES * SIZE_OF_AM_ENTRY) /*2*/ +#define AP_BEGIN (AM_BEGIN + NUM_AM_ENTRIES * SIZE_OF_AM_ENTRY) /*2 */ #define AP_BASE (AP_BEGIN + (NUM_AP_ENTRIES - 1) * SIZE_OF_AP_ENTRY) -#define MPHYPT_BASE (AP_BEGIN + NUM_AP_ENTRIES * SIZE_OF_AP_ENTRY) /*2*/ -#define APCT_PRIO_1_BASE (MPHYPT_BASE + NUM_MPHYPT_ENTRIES * SIZE_OF_MPHYPT_ENTRY) /*2*/ -#define TQ_BASE (APCT_PRIO_1_BASE + NUM_APCT_PRIO_1_ENTRIES * SIZE_OF_APCT_ENTRY) /*2*/ +#define MPHYPT_BASE (AP_BEGIN + NUM_AP_ENTRIES * SIZE_OF_AP_ENTRY) /*2 */ +#define APCT_PRIO_1_BASE (MPHYPT_BASE + NUM_MPHYPT_ENTRIES * SIZE_OF_MPHYPT_ENTRY) /*2 */ +#define TQ_BASE (APCT_PRIO_1_BASE + NUM_APCT_PRIO_1_ENTRIES * SIZE_OF_APCT_ENTRY) /*2 */ #define ATM_DPRAM_SIZE ((TQ_BASE + NUM_TQ_ENTRIES * SIZE_OF_TQ_ENTRY) - ATM_DPRAM_BEGIN) #define CT_PTR(base) ((struct ct_entry_t *)((char *)(base) + 0x2000 + CT_BASE)) @@ -55,62 +55,62 @@ typedef volatile unsigned int vuint32; #define TQ_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + TQ_BASE)) /* SAR registers */ -#define RBDBASE(base) ((vuint32 *)(base + 0x3F00)) /* Base address of RxBD-List */ -#define SRFCR(base) ((vuint8 *)(base + 0x3F04)) /* DMA Receive function code */ -#define SRSTATE(base) ((vuint8 *)(base + 0x3F05)) /* DMA Receive status */ -#define MRBLR(base) ((vuint16 *)(base + 0x3F06)) /* Init to 0 for ATM */ -#define RSTATE(base) ((vuint32 *)(base + 0x3F08)) /* Do not write to */ -#define R_CNT(base) ((vuint16 *)(base + 0x3F10)) /* Do not write to */ -#define STFCR(base) ((vuint8 *)(base + 0x3F12)) /* DMA Transmit function code */ -#define STSTATE(base) ((vuint8 *)(base + 0x3F13)) /* DMA Transmit status */ -#define TBDBASE(base) ((vuint32 *)(base + 0x3F14)) /* Base address of TxBD-List */ -#define TSTATE(base) ((vuint32 *)(base + 0x3F18)) /* Do not write to */ -#define COMM_CH(base) ((vuint16 *)(base + 0x3F1C)) /* Command channel */ -#define STCHNUM(base) ((vuint16 *)(base + 0x3F1E)) /* Do not write to */ -#define T_CNT(base) ((vuint16 *)(base + 0x3F20)) /* Do not write to */ -#define CTBASE(base) ((vuint16 *)(base + 0x3F22)) /* Base address of Connection-table */ -#define ECTBASE(base) ((vuint32 *)(base + 0x3F24)) /* Valid only for external Conn.-table */ -#define INTBASE(base) ((vuint32 *)(base + 0x3F28)) /* Base address of Interrupt-table */ -#define INTPTR(base) ((vuint32 *)(base + 0x3F2C)) /* Pointer to Interrupt-queue */ -#define C_MASK(base) ((vuint32 *)(base + 0x3F30)) /* CRC-mask */ -#define SRCHNUM(base) ((vuint16 *)(base + 0x3F34)) /* Do not write to */ -#define INT_CNT(base) ((vuint16 *)(base + 0x3F36)) /* Interrupt-Counter */ -#define INT_ICNT(base) ((vuint16 *)(base + 0x3F38)) /* Interrupt threshold */ -#define TSTA(base) ((vuint16 *)(base + 0x3F3A)) /* Time-stamp-address */ -#define OLDLEN(base) ((vuint16 *)(base + 0x3F3C)) /* Do not write to */ -#define SMRBLR(base) ((vuint16 *)(base + 0x3F3E)) /* SAR max RXBuffer length */ -#define EHEAD(base) ((vuint32 *)(base + 0x3F40)) /* Valid for serial mode */ -#define EPAYLOAD(base) ((vuint32 *)(base + 0x3F44)) /* Valid for serial mode */ -#define TQBASE(base) ((vuint16 *)(base + 0x3F48)) /* Base address of Tx queue */ -#define TQEND(base) ((vuint16 *)(base + 0x3F4A)) /* End address of Tx queue */ -#define TQAPTR(base) ((vuint16 *)(base + 0x3F4C)) /* TQ APC pointer */ -#define TQTPTR(base) ((vuint16 *)(base + 0x3F4E)) /* TQ Tx pointer */ -#define APCST(base) ((vuint16 *)(base + 0x3F50)) /* APC status */ -#define APCPTR(base) ((vuint16 *)(base + 0x3F52)) /* APC parameter pointer */ -#define HMASK(base) ((vuint32 *)(base + 0x3F54)) /* Header mask */ -#define AMBASE(base) ((vuint16 *)(base + 0x3F58)) /* Address match table base */ -#define AMEND(base) ((vuint16 *)(base + 0x3F5A)) /* Address match table end */ -#define APBASE(base) ((vuint16 *)(base + 0x3F5C)) /* Address match parameter */ -#define FLBASE(base) ((vuint32 *)(base + 0x3F54)) /* First-level table base */ -#define SLBASE(base) ((vuint32 *)(base + 0x3F58)) /* Second-level table base */ -#define FLMASK(base) ((vuint16 *)(base + 0x3F5C)) /* First-level mask */ -#define ECSIZE(base) ((vuint16 *)(base + 0x3F5E)) /* Valid for extended mode */ -#define APCT_REAL(base) ((vuint32 *)(base + 0x3F60)) /* APC 32 bit counter */ -#define R_PTR(base) ((vuint32 *)(base + 0x3F64)) /* Do not write to */ -#define RTEMP(base) ((vuint32 *)(base + 0x3F68)) /* Do not write to */ -#define T_PTR(base) ((vuint32 *)(base + 0x3F6C)) /* Do not write to */ -#define TTEMP(base) ((vuint32 *)(base + 0x3F70)) /* Do not write to */ +#define RBDBASE(base) ((vuint32 *)(base + 0x3F00)) /* Base address of RxBD-List */ +#define SRFCR(base) ((vuint8 *)(base + 0x3F04)) /* DMA Receive function code */ +#define SRSTATE(base) ((vuint8 *)(base + 0x3F05)) /* DMA Receive status */ +#define MRBLR(base) ((vuint16 *)(base + 0x3F06)) /* Init to 0 for ATM */ +#define RSTATE(base) ((vuint32 *)(base + 0x3F08)) /* Do not write to */ +#define R_CNT(base) ((vuint16 *)(base + 0x3F10)) /* Do not write to */ +#define STFCR(base) ((vuint8 *)(base + 0x3F12)) /* DMA Transmit function code */ +#define STSTATE(base) ((vuint8 *)(base + 0x3F13)) /* DMA Transmit status */ +#define TBDBASE(base) ((vuint32 *)(base + 0x3F14)) /* Base address of TxBD-List */ +#define TSTATE(base) ((vuint32 *)(base + 0x3F18)) /* Do not write to */ +#define COMM_CH(base) ((vuint16 *)(base + 0x3F1C)) /* Command channel */ +#define STCHNUM(base) ((vuint16 *)(base + 0x3F1E)) /* Do not write to */ +#define T_CNT(base) ((vuint16 *)(base + 0x3F20)) /* Do not write to */ +#define CTBASE(base) ((vuint16 *)(base + 0x3F22)) /* Base address of Connection-table */ +#define ECTBASE(base) ((vuint32 *)(base + 0x3F24)) /* Valid only for external Conn.-table */ +#define INTBASE(base) ((vuint32 *)(base + 0x3F28)) /* Base address of Interrupt-table */ +#define INTPTR(base) ((vuint32 *)(base + 0x3F2C)) /* Pointer to Interrupt-queue */ +#define C_MASK(base) ((vuint32 *)(base + 0x3F30)) /* CRC-mask */ +#define SRCHNUM(base) ((vuint16 *)(base + 0x3F34)) /* Do not write to */ +#define INT_CNT(base) ((vuint16 *)(base + 0x3F36)) /* Interrupt-Counter */ +#define INT_ICNT(base) ((vuint16 *)(base + 0x3F38)) /* Interrupt threshold */ +#define TSTA(base) ((vuint16 *)(base + 0x3F3A)) /* Time-stamp-address */ +#define OLDLEN(base) ((vuint16 *)(base + 0x3F3C)) /* Do not write to */ +#define SMRBLR(base) ((vuint16 *)(base + 0x3F3E)) /* SAR max RXBuffer length */ +#define EHEAD(base) ((vuint32 *)(base + 0x3F40)) /* Valid for serial mode */ +#define EPAYLOAD(base) ((vuint32 *)(base + 0x3F44)) /* Valid for serial mode */ +#define TQBASE(base) ((vuint16 *)(base + 0x3F48)) /* Base address of Tx queue */ +#define TQEND(base) ((vuint16 *)(base + 0x3F4A)) /* End address of Tx queue */ +#define TQAPTR(base) ((vuint16 *)(base + 0x3F4C)) /* TQ APC pointer */ +#define TQTPTR(base) ((vuint16 *)(base + 0x3F4E)) /* TQ Tx pointer */ +#define APCST(base) ((vuint16 *)(base + 0x3F50)) /* APC status */ +#define APCPTR(base) ((vuint16 *)(base + 0x3F52)) /* APC parameter pointer */ +#define HMASK(base) ((vuint32 *)(base + 0x3F54)) /* Header mask */ +#define AMBASE(base) ((vuint16 *)(base + 0x3F58)) /* Address match table base */ +#define AMEND(base) ((vuint16 *)(base + 0x3F5A)) /* Address match table end */ +#define APBASE(base) ((vuint16 *)(base + 0x3F5C)) /* Address match parameter */ +#define FLBASE(base) ((vuint32 *)(base + 0x3F54)) /* First-level table base */ +#define SLBASE(base) ((vuint32 *)(base + 0x3F58)) /* Second-level table base */ +#define FLMASK(base) ((vuint16 *)(base + 0x3F5C)) /* First-level mask */ +#define ECSIZE(base) ((vuint16 *)(base + 0x3F5E)) /* Valid for extended mode */ +#define APCT_REAL(base) ((vuint32 *)(base + 0x3F60)) /* APC 32 bit counter */ +#define R_PTR(base) ((vuint32 *)(base + 0x3F64)) /* Do not write to */ +#define RTEMP(base) ((vuint32 *)(base + 0x3F68)) /* Do not write to */ +#define T_PTR(base) ((vuint32 *)(base + 0x3F6C)) /* Do not write to */ +#define TTEMP(base) ((vuint32 *)(base + 0x3F70)) /* Do not write to */ /* ESAR registers */ -#define FMCTIMESTMP(base) ((vuint32 *)(base + 0x3F80)) /* Perf.Mon.Timestamp */ -#define FMCTEMPLATE(base) ((vuint32 *)(base + 0x3F84)) /* Perf.Mon.Template */ -#define PMPTR(base) ((vuint16 *)(base + 0x3F88)) /* Perf.Mon.Table */ -#define PMCHANNEL(base) ((vuint16 *)(base + 0x3F8A)) /* Perf.Mon.Channel */ -#define MPHYST(base) ((vuint16 *)(base + 0x3F90)) /* Multi-PHY Status */ -#define TCTEBASE(base) ((vuint16 *)(base + 0x3F92)) /* Internal TCT Extension Base */ -#define ETCTEBASE(base) ((vuint32 *)(base + 0x3F94)) /* External TCT Extension Base */ -#define COMM_CH2(base) ((vuint32 *)(base + 0x3F98)) /* 2nd command channel word */ -#define STATBASE(base) ((vuint16 *)(base + 0x3F9C)) /* Statistics table pointer */ +#define FMCTIMESTMP(base) ((vuint32 *)(base + 0x3F80)) /* Perf.Mon.Timestamp */ +#define FMCTEMPLATE(base) ((vuint32 *)(base + 0x3F84)) /* Perf.Mon.Template */ +#define PMPTR(base) ((vuint16 *)(base + 0x3F88)) /* Perf.Mon.Table */ +#define PMCHANNEL(base) ((vuint16 *)(base + 0x3F8A)) /* Perf.Mon.Channel */ +#define MPHYST(base) ((vuint16 *)(base + 0x3F90)) /* Multi-PHY Status */ +#define TCTEBASE(base) ((vuint16 *)(base + 0x3F92)) /* Internal TCT Extension Base */ +#define ETCTEBASE(base) ((vuint32 *)(base + 0x3F94)) /* External TCT Extension Base */ +#define COMM_CH2(base) ((vuint32 *)(base + 0x3F98)) /* 2nd command channel word */ +#define STATBASE(base) ((vuint16 *)(base + 0x3F9C)) /* Statistics table pointer */ /* UTOPIA Mode Register */ #define UTMODE(base) (CAST(vuint32 *)(base + 0x0978)) @@ -139,108 +139,104 @@ typedef volatile unsigned int vuint32; #define NUM_INT_ENTRIES 80 #define SIZE_OF_INT_ENTRY 4 -struct apc_params_t -{ - vuint16 apct_base1; /* APC Table - First Priority Base pointer */ - vuint16 apct_end1; /* First APC Table - Length */ - vuint16 apct_ptr1; /* First APC Table Pointer */ - vuint16 apct_sptr1; /* APC Table First Priority Service pointer */ - vuint16 etqbase; /* Enhanced Transmit Queue Base pointer */ - vuint16 etqend; /* Enhanced Transmit Queue End pointer */ - vuint16 etqaptr; /* Enhanced Transmit Queue APC pointer */ - vuint16 etqtptr; /* Enhanced Transmit Queue Transmitter pointer */ - vuint16 apc_mi; /* APC - Max Iteration */ - vuint16 ncits; /* Number of Cells In TimeSlot */ - vuint16 apcnt; /* APC - N Timer */ - vuint16 reserved1; /* reserved */ - vuint16 eapcst; /* APC status */ - vuint16 ptp_counter; /* PTP queue length */ - vuint16 ptp_txch; /* PTP channel */ - vuint16 reserved2; /* reserved */ +struct apc_params_t { + vuint16 apct_base1; /* APC Table - First Priority Base pointer */ + vuint16 apct_end1; /* First APC Table - Length */ + vuint16 apct_ptr1; /* First APC Table Pointer */ + vuint16 apct_sptr1; /* APC Table First Priority Service pointer */ + vuint16 etqbase; /* Enhanced Transmit Queue Base pointer */ + vuint16 etqend; /* Enhanced Transmit Queue End pointer */ + vuint16 etqaptr; /* Enhanced Transmit Queue APC pointer */ + vuint16 etqtptr; /* Enhanced Transmit Queue Transmitter pointer */ + vuint16 apc_mi; /* APC - Max Iteration */ + vuint16 ncits; /* Number of Cells In TimeSlot */ + vuint16 apcnt; /* APC - N Timer */ + vuint16 reserved1; /* reserved */ + vuint16 eapcst; /* APC status */ + vuint16 ptp_counter; /* PTP queue length */ + vuint16 ptp_txch; /* PTP channel */ + vuint16 reserved2; /* reserved */ }; -struct ct_entry_t -{ - /* RCT */ - unsigned fhnt : 1; - unsigned pm_rct : 1; - unsigned reserved0 : 6; - unsigned hec : 1; - unsigned clp : 1; - unsigned cng_ncrc : 1; - unsigned inf_rct : 1; - unsigned cngi_ptp : 1; - unsigned cdis_rct : 1; - unsigned aal_rct : 2; - uint16 rbalen; - uint32 rcrc; - uint32 rb_ptr; - uint16 rtmlen; - uint16 rbd_ptr; - uint16 rbase; - uint16 tstamp; - uint16 imask; - unsigned ft : 2; - unsigned nim : 1; - unsigned reserved1 : 2; - unsigned rpmt : 6; - unsigned reserved2 : 5; - uint8 reserved3[8]; - /* TCT */ - unsigned reserved4 : 1; - unsigned pm_tct : 1; - unsigned reserved5 : 6; - unsigned pc : 1; - unsigned reserved6 : 2; - unsigned inf_tct : 1; - unsigned cr10 : 1; - unsigned cdis_tct : 1; - unsigned aal_tct : 2; - uint16 tbalen; - uint32 tcrc; - uint32 tb_ptr; - uint16 ttmlen; - uint16 tbd_ptr; - uint16 tbase; - unsigned reserved7 : 5; - unsigned tpmt : 6; - unsigned reserved8 : 3; - unsigned avcf : 1; - unsigned act : 1; - uint32 chead; - uint16 apcl; - uint16 apcpr; - unsigned out : 1; - unsigned bnr : 1; - unsigned tservice : 2; - unsigned apcp : 12; - uint16 apcpf; +struct ct_entry_t { + /* RCT */ + unsigned fhnt:1; + unsigned pm_rct:1; + unsigned reserved0:6; + unsigned hec:1; + unsigned clp:1; + unsigned cng_ncrc:1; + unsigned inf_rct:1; + unsigned cngi_ptp:1; + unsigned cdis_rct:1; + unsigned aal_rct:2; + uint16 rbalen; + uint32 rcrc; + uint32 rb_ptr; + uint16 rtmlen; + uint16 rbd_ptr; + uint16 rbase; + uint16 tstamp; + uint16 imask; + unsigned ft:2; + unsigned nim:1; + unsigned reserved1:2; + unsigned rpmt:6; + unsigned reserved2:5; + uint8 reserved3[8]; + /* TCT */ + unsigned reserved4:1; + unsigned pm_tct:1; + unsigned reserved5:6; + unsigned pc:1; + unsigned reserved6:2; + unsigned inf_tct:1; + unsigned cr10:1; + unsigned cdis_tct:1; + unsigned aal_tct:2; + uint16 tbalen; + uint32 tcrc; + uint32 tb_ptr; + uint16 ttmlen; + uint16 tbd_ptr; + uint16 tbase; + unsigned reserved7:5; + unsigned tpmt:6; + unsigned reserved8:3; + unsigned avcf:1; + unsigned act:1; + uint32 chead; + uint16 apcl; + uint16 apcpr; + unsigned out:1; + unsigned bnr:1; + unsigned tservice:2; + unsigned apcp:12; + uint16 apcpf; }; -struct tcte_entry_t -{ - unsigned res1 : 4; - unsigned scr : 12; - uint16 scrf; - uint16 bt; - uint16 buptrh; - uint32 buptrl; - unsigned vbr2 : 1; - unsigned res2 : 15; - uint16 oobr; - uint16 res3[8]; +struct tcte_entry_t { + unsigned res1:4; + unsigned scr:12; + uint16 scrf; + uint16 bt; + uint16 buptrh; + uint32 buptrl; + unsigned vbr2:1; + unsigned res2:15; + uint16 oobr; + uint16 res3[8]; }; #define SIZE_OF_RBD 12 #define SIZE_OF_TBD 12 -struct atm_bd_t -{ - vuint16 flags; - vuint16 length; - unsigned char * buffer_ptr; - vuint16 cpcs_uu_cpi; - vuint16 reserved; +struct atm_bd_t { + vuint16 flags; + vuint16 length; + unsigned char *buffer_ptr; + vuint16 cpcs_uu_cpi; + vuint16 reserved; }; /* BD flags */ @@ -259,35 +255,33 @@ struct atm_bd_t #define LEN_ERROR 0x0002 #define CRC_ERROR 0x0001 -struct atm_connection_t -{ - struct atm_bd_t * rbd_ptr; - int num_rbd; - struct atm_bd_t * tbd_ptr; - int num_tbd; - struct ct_entry_t * ct_ptr; - struct tcte_entry_t * tcte_ptr; - void * drv; - void (* notify)(void * drv, int event); +struct atm_connection_t { + struct atm_bd_t *rbd_ptr; + int num_rbd; + struct atm_bd_t *tbd_ptr; + int num_tbd; + struct ct_entry_t *ct_ptr; + struct tcte_entry_t *tcte_ptr; + void *drv; + void (*notify) (void *drv, int event); }; -struct atm_driver_t -{ - int loaded; - int started; - char * csram; - int csram_size; - uint32 * am_top; - uint16 * ap_top; - uint32 * int_reload_ptr; - uint32 * int_serv_ptr; - struct atm_bd_t * rbd_base_ptr; - struct atm_bd_t * tbd_base_ptr; - unsigned linerate_in_bps; +struct atm_driver_t { + int loaded; + int started; + char *csram; + int csram_size; + uint32 *am_top; + uint16 *ap_top; + uint32 *int_reload_ptr; + uint32 *int_serv_ptr; + struct atm_bd_t *rbd_base_ptr; + struct atm_bd_t *tbd_base_ptr; + unsigned linerate_in_bps; }; extern struct atm_connection_t g_conn[NUM_CONNECTIONS]; extern struct atm_driver_t g_atm; -extern int atmLoad(void); -extern void atmUnload(void); +extern int atmLoad (void); +extern void atmUnload (void); diff --git a/board/siemens/SCM/fpga_scm.c b/board/siemens/SCM/fpga_scm.c index 3b93794..661bf66 100644 --- a/board/siemens/SCM/fpga_scm.c +++ b/board/siemens/SCM/fpga_scm.c @@ -28,77 +28,77 @@ #include "../common/fpga.h" fpga_t fpga_list[] = { - { "FIOX" , CFG_FIOX_BASE , - CFG_PD_FIOX_INIT , CFG_PD_FIOX_PROG , CFG_PD_FIOX_DONE }, - { "FDOHM", CFG_FDOHM_BASE, - CFG_PD_FDOHM_INIT, CFG_PD_FDOHM_PROG, CFG_PD_FDOHM_DONE } + {"FIOX", CFG_FIOX_BASE, + CFG_PD_FIOX_INIT, CFG_PD_FIOX_PROG, CFG_PD_FIOX_DONE} + , + {"FDOHM", CFG_FDOHM_BASE, + CFG_PD_FDOHM_INIT, CFG_PD_FDOHM_PROG, CFG_PD_FDOHM_DONE} }; -int fpga_count = sizeof(fpga_list) / sizeof(fpga_t); +int fpga_count = sizeof (fpga_list) / sizeof (fpga_t); -ulong fpga_control (fpga_t* fpga, int cmd) +ulong fpga_control (fpga_t * fpga, int cmd) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *) CFG_IMMR; + + switch (cmd) { + case FPGA_INIT_IS_HIGH: + immr->im_ioport.iop_pdird &= ~fpga->init_mask; /* input */ + return (immr->im_ioport.iop_pdatd & fpga->init_mask) ? 1 : 0; + + case FPGA_INIT_SET_LOW: + immr->im_ioport.iop_pdird |= fpga->init_mask; /* output */ + immr->im_ioport.iop_pdatd &= ~fpga->init_mask; + break; + + case FPGA_INIT_SET_HIGH: + immr->im_ioport.iop_pdird |= fpga->init_mask; /* output */ + immr->im_ioport.iop_pdatd |= fpga->init_mask; + break; + + case FPGA_PROG_SET_LOW: + immr->im_ioport.iop_pdatd &= ~fpga->prog_mask; + break; + + case FPGA_PROG_SET_HIGH: + immr->im_ioport.iop_pdatd |= fpga->prog_mask; + break; + + case FPGA_DONE_IS_HIGH: + return (immr->im_ioport.iop_pdatd & fpga->done_mask) ? 1 : 0; + + case FPGA_READ_MODE: + break; + + case FPGA_LOAD_MODE: + break; + + case FPGA_GET_ID: + if (fpga->conf_base == CFG_FIOX_BASE) { + ulong ver = + *(volatile ulong *) (fpga->conf_base + 0x10); + return ((ver >> 10) & 0xf) + ((ver >> 2) & 0xf0); + } else if (fpga->conf_base == CFG_FDOHM_BASE) { + return (*(volatile ushort *) fpga->conf_base) & 0xff; + } else { + return *(volatile ulong *) fpga->conf_base; + } + + case FPGA_INIT_PORTS: + immr->im_ioport.iop_ppard &= ~fpga->init_mask; /* INIT I/O */ + immr->im_ioport.iop_psord &= ~fpga->init_mask; + immr->im_ioport.iop_pdird &= ~fpga->init_mask; + + immr->im_ioport.iop_ppard &= ~fpga->prog_mask; /* PROG Output */ + immr->im_ioport.iop_psord &= ~fpga->prog_mask; + immr->im_ioport.iop_pdird |= fpga->prog_mask; + + immr->im_ioport.iop_ppard &= ~fpga->done_mask; /* DONE Input */ + immr->im_ioport.iop_psord &= ~fpga->done_mask; + immr->im_ioport.iop_pdird &= ~fpga->done_mask; + + break; - switch (cmd) { - case FPGA_INIT_IS_HIGH: - immr->im_ioport.iop_pdird &= ~fpga->init_mask; /* input */ - return (immr->im_ioport.iop_pdatd & fpga->init_mask) ? 1:0; - - case FPGA_INIT_SET_LOW: - immr->im_ioport.iop_pdird |= fpga->init_mask; /* output */ - immr->im_ioport.iop_pdatd &= ~fpga->init_mask; - break; - - case FPGA_INIT_SET_HIGH: - immr->im_ioport.iop_pdird |= fpga->init_mask; /* output */ - immr->im_ioport.iop_pdatd |= fpga->init_mask; - break; - - case FPGA_PROG_SET_LOW: - immr->im_ioport.iop_pdatd &= ~fpga->prog_mask; - break; - - case FPGA_PROG_SET_HIGH: - immr->im_ioport.iop_pdatd |= fpga->prog_mask; - break; - - case FPGA_DONE_IS_HIGH: - return (immr->im_ioport.iop_pdatd & fpga->done_mask) ? 1:0; - - case FPGA_READ_MODE: - break; - - case FPGA_LOAD_MODE: - break; - - case FPGA_GET_ID: - if (fpga->conf_base == CFG_FIOX_BASE) { - ulong ver = *(volatile ulong *)(fpga->conf_base + 0x10); - return ((ver >> 10) & 0xf) + ((ver >> 2) & 0xf0); } - else if (fpga->conf_base == CFG_FDOHM_BASE) { - return (*(volatile ushort *)fpga->conf_base) & 0xff; - } - else { - return *(volatile ulong *)fpga->conf_base; - } - - case FPGA_INIT_PORTS: - immr->im_ioport.iop_ppard &= ~fpga->init_mask; /* INIT I/O */ - immr->im_ioport.iop_psord &= ~fpga->init_mask; - immr->im_ioport.iop_pdird &= ~fpga->init_mask; - - immr->im_ioport.iop_ppard &= ~fpga->prog_mask; /* PROG Output */ - immr->im_ioport.iop_psord &= ~fpga->prog_mask; - immr->im_ioport.iop_pdird |= fpga->prog_mask; - - immr->im_ioport.iop_ppard &= ~fpga->done_mask; /* DONE Input */ - immr->im_ioport.iop_psord &= ~fpga->done_mask; - immr->im_ioport.iop_pdird &= ~fpga->done_mask; - - break; - - } - return 0; + return 0; } |