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authorBen Warren <biggerbadderben@gmail.com>2008-01-16 22:37:42 -0500
committerKim Phillips <kim.phillips@freescale.com>2008-01-17 11:02:33 -0600
commit80ddd22626d321a772ebfba304eb7830cb4f6bac (patch)
tree9132a55b467d6d7728a370d0b76e072ba5a57add /board
parent04a9e1180ac76a7bacc15a6fcd95ad839d65bddb (diff)
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Implement hard SPI driver on MPC8349EMDS
This patch implements the fsl_spi driver on the MPC8349EMDS evaluation board. This board has an ST M25P40 4Mbit EEPROM on its SPI bus Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/mpc8349emds/mpc8349emds.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 3d72eb7..3fb2a45 100644
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -27,6 +27,7 @@
#include <mpc83xx.h>
#include <asm/mpc8349_pci.h>
#include <i2c.h>
+#include <spi.h>
#include <spd.h>
#include <miiphy.h>
#if defined(CONFIG_SPD_EEPROM)
@@ -251,6 +252,34 @@ void sdram_init(void)
}
#endif
+/*
+ * The following are used to control the SPI chip selects for the SPI command.
+ */
+#ifdef CONFIG_HARD_SPI
+
+#define SPI_CS_MASK 0x80000000
+
+void spi_eeprom_chipsel(int cs)
+{
+ volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
+
+ if(cs)
+ iopd->dat &= ~SPI_CS_MASK;
+ else
+ iopd->dat |= SPI_CS_MASK;
+}
+
+/*
+ * The SPI command uses this table of functions for controlling the SPI
+ * chip selects.
+ */
+spi_chipsel_type spi_chipsel[] = {
+ spi_eeprom_chipsel,
+};
+int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+
+#endif /* CONFIG_HARD_SPI */
+
#if defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{