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| author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2013-03-25 07:40:15 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2013-05-24 16:54:13 -0500 |
| commit | 037e19b812a4f8a1ce08e023484d51214766f341 (patch) | |
| tree | 54ffc66e6d9f973207b6395e0fd719bd0bc7e511 /board | |
| parent | e1379b0730fcef15e6e77305a56f35912697409c (diff) | |
| download | u-boot-imx-037e19b812a4f8a1ce08e023484d51214766f341.zip u-boot-imx-037e19b812a4f8a1ce08e023484d51214766f341.tar.gz u-boot-imx-037e19b812a4f8a1ce08e023484d51214766f341.tar.bz2 | |
powerpc/t4240qds: fix PHY reset timeout issue
QSGMII card has different PHY address against previous SGMII card.
We check the type of card in slots and set correct PHY address to
avoid complainning "PHY reset timed out" during u-boot booting up.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/t4qds/eth.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/board/freescale/t4qds/eth.c b/board/freescale/t4qds/eth.c index b649df0..7103a0d 100644 --- a/board/freescale/t4qds/eth.c +++ b/board/freescale/t4qds/eth.c @@ -365,24 +365,40 @@ static void initialize_qsgmiiphy_fix(void) qsgmiiphy_fix[FM1_DTSEC6] = 1; qsgmiiphy_fix[FM1_DTSEC9] = 1; qsgmiiphy_fix[FM1_DTSEC10] = 1; + slot_qsgmii_phyaddr[1][0] = SGMII_CARD_PORT1_PHY_ADDR; + slot_qsgmii_phyaddr[1][1] = SGMII_CARD_PORT2_PHY_ADDR; + slot_qsgmii_phyaddr[1][2] = SGMII_CARD_PORT3_PHY_ADDR; + slot_qsgmii_phyaddr[1][3] = SGMII_CARD_PORT4_PHY_ADDR; break; case 2: qsgmiiphy_fix[FM1_DTSEC1] = 1; qsgmiiphy_fix[FM1_DTSEC2] = 1; qsgmiiphy_fix[FM1_DTSEC3] = 1; qsgmiiphy_fix[FM1_DTSEC4] = 1; + slot_qsgmii_phyaddr[2][0] = SGMII_CARD_PORT1_PHY_ADDR; + slot_qsgmii_phyaddr[2][1] = SGMII_CARD_PORT2_PHY_ADDR; + slot_qsgmii_phyaddr[2][2] = SGMII_CARD_PORT3_PHY_ADDR; + slot_qsgmii_phyaddr[2][3] = SGMII_CARD_PORT4_PHY_ADDR; break; case 3: qsgmiiphy_fix[FM2_DTSEC5] = 1; qsgmiiphy_fix[FM2_DTSEC6] = 1; qsgmiiphy_fix[FM2_DTSEC9] = 1; qsgmiiphy_fix[FM2_DTSEC10] = 1; + slot_qsgmii_phyaddr[3][0] = SGMII_CARD_PORT1_PHY_ADDR; + slot_qsgmii_phyaddr[3][1] = SGMII_CARD_PORT2_PHY_ADDR; + slot_qsgmii_phyaddr[3][2] = SGMII_CARD_PORT3_PHY_ADDR; + slot_qsgmii_phyaddr[3][3] = SGMII_CARD_PORT4_PHY_ADDR; break; case 4: qsgmiiphy_fix[FM2_DTSEC1] = 1; qsgmiiphy_fix[FM2_DTSEC2] = 1; qsgmiiphy_fix[FM2_DTSEC3] = 1; qsgmiiphy_fix[FM2_DTSEC4] = 1; + slot_qsgmii_phyaddr[4][0] = SGMII_CARD_PORT1_PHY_ADDR; + slot_qsgmii_phyaddr[4][1] = SGMII_CARD_PORT2_PHY_ADDR; + slot_qsgmii_phyaddr[4][2] = SGMII_CARD_PORT3_PHY_ADDR; + slot_qsgmii_phyaddr[4][3] = SGMII_CARD_PORT4_PHY_ADDR; break; default: break; @@ -435,6 +451,7 @@ int board_eth_init(bd_t *bis) t4240qds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT7); t4240qds_mdio_init(DEFAULT_FM_TGEC_MDIO_NAME, EMI2); + initialize_qsgmiiphy_fix(); switch (srds_prtcl_s1) { case 1: @@ -702,8 +719,6 @@ int board_eth_init(bd_t *bis) } #endif /* CONFIG_SYS_NUM_FMAN */ - initialize_qsgmiiphy_fix(); - cpu_eth_init(bis); #endif /* CONFIG_FMAN_ENET */ |