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authorMahesh Mahadevan <r9aadq@freescale.com>2011-12-16 09:13:10 -0600
committerMahesh Mahadevan <r9aadq@freescale.com>2011-12-16 09:14:58 -0600
commit8b48a2486bb3e116ab5ea31d20d7de51d799cdd7 (patch)
tree52320c3331b4f4506195c5d2f4e3cd415ca4b4b2 /board
parentb2a2cd5932aa9345de9a417c6d3daf9f8df28fc4 (diff)
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ENGR00170516 Enable the master mode for ENET PHY on MX6 Sabrelite
Fix the ENET PHY settings on MX6 Sabre-lite to enable Master mode Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/mx6q_sabrelite/mx6q_sabrelite.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/board/freescale/mx6q_sabrelite/mx6q_sabrelite.c b/board/freescale/mx6q_sabrelite/mx6q_sabrelite.c
index 1c9fb2d..f269a3e 100644
--- a/board/freescale/mx6q_sabrelite/mx6q_sabrelite.c
+++ b/board/freescale/mx6q_sabrelite/mx6q_sabrelite.c
@@ -657,8 +657,8 @@ int mx6_rgmii_rework(char *devname, int phy_addr)
phy_write(devname, phy_addr, 0x9, 0x0c00);
#endif
- /* prefer master mode, 1000 Base-T capable */
- phy_write(devname, phy_addr, 0x9, 0x0f00);
+ /* enable master mode, 1000 Base-T capable */
+ phy_write(devname, phy_addr, 0x9, 0x1f00);
/* min rx data delay */
phy_write(devname, phy_addr, 0x0b, 0x8105);