diff options
author | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:59:44 +0200 |
commit | f82642e33899766892499b163e60560fbbf87773 (patch) | |
tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /board/xpedite1k | |
parent | b59b16ca24bc7e77ec113021a6d77b9b32fcf192 (diff) | |
parent | 360fe71e82b83e264c964c9447c537e9a1f643c8 (diff) | |
download | u-boot-imx-f82642e33899766892499b163e60560fbbf87773.zip u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.gz u-boot-imx-f82642e33899766892499b163e60560fbbf87773.tar.bz2 |
Merge 'next' branch
Conflicts:
board/freescale/mpc8536ds/mpc8536ds.c
include/configs/mgcoge.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/xpedite1k')
-rw-r--r-- | board/xpedite1k/config.mk | 2 | ||||
-rw-r--r-- | board/xpedite1k/flash.c | 12 | ||||
-rw-r--r-- | board/xpedite1k/init.S | 12 | ||||
-rw-r--r-- | board/xpedite1k/xpedite1k.c | 24 |
4 files changed, 25 insertions, 25 deletions
diff --git a/board/xpedite1k/config.mk b/board/xpedite1k/config.mk index e42b273..33dfbf1 100644 --- a/board/xpedite1k/config.mk +++ b/board/xpedite1k/config.mk @@ -38,5 +38,5 @@ PLATFORM_CPPFLAGS += -DDEBUG endif ifeq ($(dbcr),1) -PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000 +PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000 endif diff --git a/board/xpedite1k/flash.c b/board/xpedite1k/flash.c index ce5d4e1..0711931 100644 --- a/board/xpedite1k/flash.c +++ b/board/xpedite1k/flash.c @@ -57,9 +57,9 @@ #define FLASH_SRAM_SEL_VAL 1 -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ -static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = { +static unsigned long flash_addr_table[8][CONFIG_SYS_MAX_FLASH_BANKS] = { {0xfff80000}, /* 0:000: configuraton 3 */ {0xfff90000}, /* 1:001: configuraton 4 */ {0xfffa0000}, /* 2:010: configuraton 7 */ @@ -89,7 +89,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data); unsigned long flash_init (void) { unsigned long total_b = 0; - unsigned long size_b[CFG_MAX_FLASH_BANKS]; + unsigned long size_b[CONFIG_SYS_MAX_FLASH_BANKS]; unsigned short index = 0; int i; @@ -98,7 +98,7 @@ unsigned long flash_init (void) DEBUGF("FLASH: Index: %d\n", index); /* Init: no FLASHes known */ - for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) { + for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; flash_info[i].sector_count = -1; flash_info[i].size = 0; @@ -366,7 +366,7 @@ int wait_for_DQ7(flash_info_t *info, int sect) start = get_timer (0); last = start; while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); return -1; } @@ -594,7 +594,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data) while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) != (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) { - if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) { return (1); } } diff --git a/board/xpedite1k/init.S b/board/xpedite1k/init.S index 6cb20e4..8a04f4f 100644 --- a/board/xpedite1k/init.S +++ b/board/xpedite1k/init.S @@ -87,10 +87,10 @@ tlbtab: tlbtab_start tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry( CFG_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry( CFG_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CFG_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) + tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I ) tlbtab_end diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c index c94a345..58bcfaf 100644 --- a/board/xpedite1k/xpedite1k.c +++ b/board/xpedite1k/xpedite1k.c @@ -40,7 +40,7 @@ int board_early_init_f(void) /* TBS: Setup the GPIO access for the user LEDs */ mfsdr(sdr_pfc0, sdrreg); mtsdr(sdr_pfc0, (sdrreg & ~0x00000100) | 0x00000E00); - out32(CFG_GPIO_BASE + 0x018, (USR_LED0 | USR_LED1 | USR_LED2 | USR_LED3)); + out32(CONFIG_SYS_GPIO_BASE + 0x018, (USR_LED0 | USR_LED1 | USR_LED2 | USR_LED3)); LED0_OFF(); LED1_OFF(); LED2_OFF(); @@ -129,7 +129,7 @@ phys_size_t initdram (int board_type) } -#if defined(CFG_DRAM_TEST) +#if defined(CONFIG_SYS_DRAM_TEST) int testdram (void) { uint *pstart = (uint *) 0x00000000; @@ -231,7 +231,7 @@ int pci_pre_init(struct pci_controller * hose ) return (0); } -#if defined(CFG_PCI_FORCE_PCI_CONV) +#if defined(CONFIG_SYS_PCI_FORCE_PCI_CONV) /* Setup System Device Register PCIX0_XCR */ mfsdr(sdr_xcr, strap); strap &= 0x0f000000; @@ -249,7 +249,7 @@ int pci_pre_init(struct pci_controller * hose ) * may not be sufficient for a given board. * ************************************************************************/ -#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) +#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) void pci_target_init(struct pci_controller * hose ) { /*--------------------------------------------------------------------------+ @@ -264,7 +264,7 @@ void pci_target_init(struct pci_controller * hose ) * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping * options to not support sizes such as 128/256 MB. *--------------------------------------------------------------------------*/ - out32r( PCIX0_PIM0LAL, CFG_SDRAM_BASE ); + out32r( PCIX0_PIM0LAL, CONFIG_SYS_SDRAM_BASE ); out32r( PCIX0_PIM0LAH, 0 ); out32r( PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1 ); @@ -273,12 +273,12 @@ void pci_target_init(struct pci_controller * hose ) /*--------------------------------------------------------------------------+ * Program the board's subsystem id/vendor id *--------------------------------------------------------------------------*/ - out16r( PCIX0_SBSYSVID, CFG_PCI_SUBSYS_VENDORID ); - out16r( PCIX0_SBSYSID, CFG_PCI_SUBSYS_DEVICEID ); + out16r( PCIX0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID ); + out16r( PCIX0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID ); out16r( PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY ); } -#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */ +#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */ /************************************************************************* @@ -299,7 +299,7 @@ void pci_target_init(struct pci_controller * hose ) #if defined(CONFIG_PCI) int is_pci_host(struct pci_controller *hose) { - return ((in32(CFG_GPIO_BASE + 0x1C) & 0x00000800) == 0); + return ((in32(CONFIG_SYS_GPIO_BASE + 0x1C) & 0x00000800) == 0); } #endif /* defined(CONFIG_PCI) */ @@ -317,7 +317,7 @@ int post_hotkeys_pressed(void) void post_word_store (ulong a) { volatile ulong *save_addr = - (volatile ulong *)(CFG_POST_WORD_ADDR); + (volatile ulong *)(CONFIG_SYS_POST_WORD_ADDR); *save_addr = a; } @@ -325,7 +325,7 @@ void post_word_store (ulong a) ulong post_word_load (void) { volatile ulong *save_addr = - (volatile ulong *)(CFG_POST_WORD_ADDR); + (volatile ulong *)(CONFIG_SYS_POST_WORD_ADDR); return *save_addr; } @@ -342,7 +342,7 @@ void board_get_enetaddr (uchar * enet) unsigned char buff[0x100], *cp; /* Initialize I2C */ - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); /* Read 256 bytes in EEPROM */ i2c_read (0x50, 0, 1, buff, 0x100); |