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authorPeter Tyser <ptyser@xes-inc.com>2009-07-17 19:01:03 -0500
committerStefan Roese <sr@denx.de>2009-07-24 06:42:31 +0200
commit11ad309c183b176d8866944026a63c0f1c626f56 (patch)
tree90db3bf22bd1285c84e3ae56b9d4bad524ec8aed /board/xpedite1k/xpedite1k.c
parentd4d2e79bb433fc7ec18c68cc49cc6b7433d1320c (diff)
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xpedite1k: Use standard CFI flash driver
Using the CFI flash driver will allow write access to the 16MB Intel StrataFlash present on the XPedite1000. The 512KB socketed (non CFI-compliant flash) will no longer be writable. The mapping of the 16MB Strata flash was moved to 0xff000000 and the 512KB AMD socketed flash was moved to 0xfe000000. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/xpedite1k/xpedite1k.c')
-rw-r--r--board/xpedite1k/xpedite1k.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index 044aeb9..bbbcdb1 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -50,12 +50,10 @@ int board_early_init_f(void)
/*--------------------------------------------------------------------
* Setup the external bus controller/chip selects
*-------------------------------------------------------------------*/
-
- /* set the bus controller */
- mtebc (pb0ap, 0x04055200); /* FLASH/SRAM */
- mtebc (pb0cr, 0xfff18000); /* BAS=0xfff 1MB R/W 8-bit */
- mtebc (pb1ap, 0x04055200); /* FLASH/SRAM */
- mtebc (pb1cr, 0xfe098000); /* BAS=0xff8 16MB R/W 8-bit */
+ mtebc (pb0ap, 0x04055200); /* 16MB Strata FLASH */
+ mtebc (pb0cr, 0xff098000); /* BAS=0xff0 16MB R/W 8-bit */
+ mtebc (pb1ap, 0x04055200); /* 512KB Socketed AMD FLASH */
+ mtebc (pb1cr, 0xfe018000); /* BAS=0xfe0 1MB R/W 8-bit */
/*--------------------------------------------------------------------
* Setup the interrupt controller polarities, triggers, etc.