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| author | Michal Simek <michal.simek@xilinx.com> | 2015-11-05 08:34:35 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2016-01-27 15:55:56 +0100 |
| commit | 0785dfd8a7b14cb2c99fc1271c865eb2170c620b (patch) | |
| tree | 257fe44ca352165c6c42463bde6dc2f875bb56fd /board/xilinx | |
| parent | d041e3e15765c3e1977f125083bd7deebe83f40b (diff) | |
| download | u-boot-imx-0785dfd8a7b14cb2c99fc1271c865eb2170c620b.zip u-boot-imx-0785dfd8a7b14cb2c99fc1271c865eb2170c620b.tar.gz u-boot-imx-0785dfd8a7b14cb2c99fc1271c865eb2170c620b.tar.bz2 | |
ARM64: zynqmp: Use the same U-Boot version with/without ATF
Remove SECURE_IOU option which is not needed. U-Boot itself can detect
which EL level it is on and based on that use do platform setup.
It also simplify usage because one Kconfig entry is gone.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'board/xilinx')
| -rw-r--r-- | board/xilinx/zynqmp/zynqmp.c | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 2cf4712..63c332f 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -9,6 +9,7 @@ #include <netdev.h> #include <ahci.h> #include <scsi.h> +#include <asm/arch/clk.h> #include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> #include <asm/io.h> @@ -28,10 +29,18 @@ int board_early_init_r(void) { u32 val; - val = readl(&crlapb_base->timestamp_ref_ctrl); - val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT; - writel(val, &crlapb_base->timestamp_ref_ctrl); - + if (current_el() == 3) { + val = readl(&crlapb_base->timestamp_ref_ctrl); + val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT; + writel(val, &crlapb_base->timestamp_ref_ctrl); + + /* Program freq register in System counter */ + writel(zynqmp_get_system_timer_freq(), + &iou_scntr_secure->base_frequency_id_register); + /* And enable system counter */ + writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN, + &iou_scntr_secure->counter_control_register); + } /* Program freq register in System counter and enable system counter */ writel(gd->cpu_clk, &iou_scntr->base_frequency_id_register); writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG | |