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author | Michal Simek <michal.simek@xilinx.com> | 2013-04-22 11:23:16 +0200 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2013-04-30 11:22:43 +0200 |
commit | 0f21f98dd4d6bff72df4eeaca4163779896cb336 (patch) | |
tree | 796651fceccc2d19ce2ba1e38156491dca8d6b0c /board/xilinx | |
parent | 8848668e136cccb30229b5e1484d41e0b5a6830a (diff) | |
download | u-boot-imx-0f21f98dd4d6bff72df4eeaca4163779896cb336.zip u-boot-imx-0f21f98dd4d6bff72df4eeaca4163779896cb336.tar.gz u-boot-imx-0f21f98dd4d6bff72df4eeaca4163779896cb336.tar.bz2 |
watchdog: Add support for Xilinx Microblaze watchdog
Watchdog can be used on Microblaze, PPC and Zynq hw designs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'board/xilinx')
-rw-r--r-- | board/xilinx/microblaze-generic/microblaze-generic.c | 4 | ||||
-rw-r--r-- | board/xilinx/microblaze-generic/xparameters.h | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index 1af0b86..befbb3a 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -39,6 +39,10 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR))); #endif +#ifdef CONFIG_XILINX_TB_WATCHDOG + hw_watchdog_disable(); +#endif + puts ("Reseting board\n"); __asm__ __volatile__ (" mts rmsr, r0;" \ "bra r0"); diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h index 50a82d9..c846f97 100644 --- a/board/xilinx/microblaze-generic/xparameters.h +++ b/board/xilinx/microblaze-generic/xparameters.h @@ -77,3 +77,7 @@ #define XILINX_LLTEMAC_SDMA_CTRL_BASEADDR 0x42000180 #define XILINX_LLTEMAC_BASEADDR1 0x44200000 #define XILINX_LLTEMAC_FIFO_BASEADDR1 0x42100000 + +/* Watchdog IP is wxi_timebase_wdt_0 */ +#define XILINX_WATCHDOG_BASEADDR 0x50000000 +#define XILINX_WATCHDOG_IRQ 1 |