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author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-05-11 00:06:03 +0200 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-05-11 00:06:03 +0200 |
commit | e825b100d209a9d3c79b2998452cafa94eec986a (patch) | |
tree | e1654c4d745839eba8d37f67d15acde79382e23e /board/xilinx | |
parent | b03b25caea1ff3a501161f5bc1ad5e5b5b124e0c (diff) | |
parent | 66a62ce0dc48d2319938c72f34a562f519c5d5c2 (diff) | |
download | u-boot-imx-e825b100d209a9d3c79b2998452cafa94eec986a.zip u-boot-imx-e825b100d209a9d3c79b2998452cafa94eec986a.tar.gz u-boot-imx-e825b100d209a9d3c79b2998452cafa94eec986a.tar.bz2 |
Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master'
Diffstat (limited to 'board/xilinx')
-rw-r--r-- | board/xilinx/microblaze-generic/microblaze-generic.c | 11 | ||||
-rw-r--r-- | board/xilinx/microblaze-generic/xparameters.h | 4 |
2 files changed, 12 insertions, 3 deletions
diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index 70f94c1..befbb3a 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -38,10 +38,15 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR))); #endif -#ifdef CONFIG_SYS_RESET_ADDRESS - puts ("Reseting board\n"); - asm ("bra r0"); + +#ifdef CONFIG_XILINX_TB_WATCHDOG + hw_watchdog_disable(); #endif + + puts ("Reseting board\n"); + __asm__ __volatile__ (" mts rmsr, r0;" \ + "bra r0"); + return 0; } diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h index 50a82d9..c846f97 100644 --- a/board/xilinx/microblaze-generic/xparameters.h +++ b/board/xilinx/microblaze-generic/xparameters.h @@ -77,3 +77,7 @@ #define XILINX_LLTEMAC_SDMA_CTRL_BASEADDR 0x42000180 #define XILINX_LLTEMAC_BASEADDR1 0x44200000 #define XILINX_LLTEMAC_FIFO_BASEADDR1 0x42100000 + +/* Watchdog IP is wxi_timebase_wdt_0 */ +#define XILINX_WATCHDOG_BASEADDR 0x50000000 +#define XILINX_WATCHDOG_IRQ 1 |