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author | Michal Simek <monstr@monstr.eu> | 2007-05-07 23:58:31 +0200 |
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committer | Michal Simek <monstr@monstr.eu> | 2007-05-07 23:58:31 +0200 |
commit | fb05f6da35ea1c15c553abe6f23f656bf18dc5db (patch) | |
tree | 97d017c2c93576570338cd2a5d2034981f131bc8 /board/xilinx | |
parent | a7bac7e9b57ba948051beb19ec5be3a75ce75383 (diff) | |
download | u-boot-imx-fb05f6da35ea1c15c553abe6f23f656bf18dc5db.zip u-boot-imx-fb05f6da35ea1c15c553abe6f23f656bf18dc5db.tar.gz u-boot-imx-fb05f6da35ea1c15c553abe6f23f656bf18dc5db.tar.bz2 |
new: USE_MSR_INTR support
Diffstat (limited to 'board/xilinx')
-rwxr-xr-x | board/xilinx/ml401/xparameters.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/board/xilinx/ml401/xparameters.h b/board/xilinx/ml401/xparameters.h index 2b0c045..1a116ea 100755 --- a/board/xilinx/ml401/xparameters.h +++ b/board/xilinx/ml401/xparameters.h @@ -29,11 +29,12 @@ #define XILINX_CLOCK_FREQ 100000000 /* Microblaze is microblaze_0 */ +#define XILINX_USE_MSR_INSTR 1 #define XILINX_FSL_NUMBER 3 /* Interrupt controller is opb_intc_0 */ #define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 5 +#define XILINX_INTC_NUM_INTR_INPUTS 6 /* Timer pheriphery is opb_timer_1 */ #define XILINX_TIMER_BASEADDR 0x41c00000 |