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| author | Michal Simek <michal.simek@xilinx.com> | 2014-03-04 12:41:05 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2014-05-14 07:43:34 +0200 |
| commit | 0b680206ccf5a4ae6adf759339ba7dc7ce06d284 (patch) | |
| tree | dc6cbbdd45adf7ac31e1b3faa880fba6b0c7abaf /board/xilinx/zynq/board.c | |
| parent | dc4a1a2729f9ccaa473cf017c8bd4be4f242cafe (diff) | |
| download | u-boot-imx-0b680206ccf5a4ae6adf759339ba7dc7ce06d284.zip u-boot-imx-0b680206ccf5a4ae6adf759339ba7dc7ce06d284.tar.gz u-boot-imx-0b680206ccf5a4ae6adf759339ba7dc7ce06d284.tar.bz2 | |
ARM: zynq: Fix building SPL without FPGA support
When CONFIG_FPGA is defined but CONFIG_SPL_FPGA is not, the build fails:
board.c: In function 'board_init':
board.c:41:3: error: 'fpga' undeclared (first use in this function)
fpga = fpga010;
Fix this by expanding the "#if.." around this block to match the other
FPGA checks and don't compile this block when buildign for SPL without
FPGA support.
Tested a bootloader that had CONFIG_FPGA defined without CONFIG_SPL_FPGA,
this now compiles without errors and loading FPGA from u-boot works.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'board/xilinx/zynq/board.c')
| -rw-r--r-- | board/xilinx/zynq/board.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 5190938..258632e 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -15,7 +15,8 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_FPGA +#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD)) static xilinx_desc fpga; /* It can be done differently */ @@ -29,7 +30,8 @@ static xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100); int board_init(void) { -#ifdef CONFIG_FPGA +#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD)) u32 idcode; idcode = zynq_slcr_get_idcode(); @@ -56,7 +58,8 @@ int board_init(void) } #endif -#ifdef CONFIG_FPGA +#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD)) fpga_init(); fpga_add(fpga_xilinx, &fpga); #endif |