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author | Wolfgang Denk <wd@denx.de> | 2008-04-13 09:42:35 -0700 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-04-13 09:42:35 -0700 |
commit | 8c8428a576f632745306e288b629e30d420c0f5a (patch) | |
tree | 4ff35844d49c2278891d74bb37ff0928ec911b82 /board/xilinx/ml401 | |
parent | 7754f33c6fb7a2c050388d20bf3847038558bdcf (diff) | |
parent | d6f98e76a0a7db415e39c94bf3d2ad539ca9c60d (diff) | |
download | u-boot-imx-8c8428a576f632745306e288b629e30d420c0f5a.zip u-boot-imx-8c8428a576f632745306e288b629e30d420c0f5a.tar.gz u-boot-imx-8c8428a576f632745306e288b629e30d420c0f5a.tar.bz2 |
Merge branch 'master' of /home/wd/git/u-boot/custodians
Diffstat (limited to 'board/xilinx/ml401')
-rw-r--r-- | board/xilinx/ml401/Makefile | 17 | ||||
-rw-r--r-- | board/xilinx/ml401/xparameters.h | 12 |
2 files changed, 4 insertions, 25 deletions
diff --git a/board/xilinx/ml401/Makefile b/board/xilinx/ml401/Makefile index 9ab5633..ee9b6d5 100644 --- a/board/xilinx/ml401/Makefile +++ b/board/xilinx/ml401/Makefile @@ -22,25 +22,10 @@ # include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)../common) -$(shell mkdir -p $(obj)../xilinx_enet) -endif - -INCS := -I../common -I../xilinx_enet -CFLAGS += $(INCS) -HOST_CFLAGS += $(INCS) LIB = $(obj)lib$(BOARD).a -COBJS = $(BOARD).o \ - ../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \ - ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \ - ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \ - ../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \ - ../common/xbasic_types.o ../common/xdma_channel.o \ - ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \ - ../common/xversion.o \ +COBJS = $(BOARD).o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/xilinx/ml401/xparameters.h b/board/xilinx/ml401/xparameters.h index 1a116ea..d805061 100644 --- a/board/xilinx/ml401/xparameters.h +++ b/board/xilinx/ml401/xparameters.h @@ -41,8 +41,8 @@ #define XILINX_TIMER_IRQ 0 /* Uart pheriphery is RS232_Uart */ -#define XILINX_UART_BASEADDR 0x40600000 -#define XILINX_UART_BAUDRATE 115200 +#define XILINX_UARTLITE_BASEADDR 0x40600000 +#define XILINX_UARTLITE_BAUDRATE 115200 /* IIC pheriphery is IIC_EEPROM */ #define XILINX_IIC_0_BASEADDR 0x40800000 @@ -66,10 +66,4 @@ #define XILINX_SYSACE_MEM_WIDTH 16 /* Ethernet controller is Ethernet_MAC */ -#define XPAR_XEMAC_NUM_INSTANCES 1 -#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 -#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000 -#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff -#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 -#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 -#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 +#define XILINX_EMACLITE_BASEADDR 0x40C00000 |