* Code cleanup:

  - remove trailing white space, trailing empty lines, C++ comments, etc.
  - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)

* Patches by Kenneth Johansson, 25 Jun 2003:
  - major rework of command structure
    (work done mostly by Michal Cendrowski and Joakim Kristiansen)

4 files changed, 66 insertions, 66 deletions

diff --git a/board/v37/Makefile b/board/v37/Makefile
index baecac9..7a17067 100644
--- a/board/v37/Makefile
+++ b/board/v37/Makefile
@@ -28,7 +28,7 @@ LIB	= lib$(BOARD).a
 OBJS	= $(BOARD).o flash.o
 
 $(LIB):	.depend $(OBJS)
-	$(AR) crv $@ $^
+	$(AR) crv $@ $(OBJS)
 
 #########################################################################
 
diff --git a/board/v37/flash.c b/board/v37/flash.c
index b42f335..6a31972 100644
--- a/board/v37/flash.c
+++ b/board/v37/flash.c
@@ -57,8 +57,8 @@ unsigned long flash_init (void)
 	volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
 	unsigned long size_b0, size_b1;
-        short manu, dev_id;
-        int i;
+	short manu, dev_id;
+	int i;
 
 	/* Init: no FLASHes known */
 	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
@@ -67,11 +67,11 @@ unsigned long flash_init (void)
 
 	/* Do sizing to get full correct info */
 
-        flash_get_id_word((void*)CFG_FLASH_BASE0,&manu,&dev_id);
+	flash_get_id_word((void*)CFG_FLASH_BASE0,&manu,&dev_id);
 
-        size_b0 = flash_get_size(manu, dev_id, &flash_info[0]);
+	size_b0 = flash_get_size(manu, dev_id, &flash_info[0]);
 
-        flash_get_offsets (CFG_FLASH_BASE0, &flash_info[0],0);
+	flash_get_offsets (CFG_FLASH_BASE0, &flash_info[0],0);
 
 	memctl->memc_or0 = CFG_OR_TIMING_FLASH | (0 - size_b0);
 
@@ -83,32 +83,32 @@ unsigned long flash_init (void)
 		      &flash_info[0]);
 #endif
 
-        flash_get_id_long((void*)CFG_FLASH_BASE1,&manu,&dev_id);
+	flash_get_id_long((void*)CFG_FLASH_BASE1,&manu,&dev_id);
 
-        size_b1 = 2 * flash_get_size(manu, dev_id, &flash_info[1]);
+	size_b1 = 2 * flash_get_size(manu, dev_id, &flash_info[1]);
 
-        flash_get_offsets(CFG_FLASH_BASE1, &flash_info[1],1);
+	flash_get_offsets(CFG_FLASH_BASE1, &flash_info[1],1);
 
 	memctl->memc_or1 = CFG_OR_TIMING_FLASH | (0 - size_b1);
 
 	flash_info[0].size = size_b0;
 	flash_info[1].size = size_b1;
 
-        return (size_b0+size_b1);
+	return (size_b0+size_b1);
 }
 
 /*-----------------------------------------------------------------------
  */
 static void flash_get_offsets (ulong base, flash_info_t *info, int two_chips)
 {
-        int i, addr_shift;
-        vu_short *addr = (vu_short*)base;
+	int i, addr_shift;
+	vu_short *addr = (vu_short*)base;
 
 	addr[0x555] = 0x00AA ;
 	addr[0xAAA] = 0x0055 ;
 	addr[0x555] = 0x0090 ;
 
-        addr_shift = (two_chips ? 2 : 1 );
+	addr_shift = (two_chips ? 2 : 1 );
 
 	/* set up sector start address table */
 	if (info->flash_id & FLASH_BTYPE) {
@@ -210,7 +210,7 @@ void flash_print_info  (flash_info_t *info)
 
 static void flash_get_id_word( void *ptr,  short *ptr_manuf, short *ptr_dev_id)
 {
-        vu_short *addr = (vu_short*)ptr;
+	vu_short *addr = (vu_short*)ptr;
 
 	addr[0x555] = 0x00AA ;
 	addr[0xAAA] = 0x0055 ;
@@ -219,26 +219,26 @@ static void flash_get_id_word( void *ptr,  short *ptr_manuf, short *ptr_dev_id)
 	*ptr_manuf  = addr[0];
 	*ptr_dev_id = addr[1];
 
-        addr[0] = 0xf0f0;       /* return to normal */
+	addr[0] = 0xf0f0;       /* return to normal */
 }
 
 static void flash_get_id_long( void *ptr,  short *ptr_manuf, short *ptr_dev_id)
 {
-        vu_short *addr = (vu_short*)ptr;
-        vu_short *addr1, *addr2, *addr3;
+	vu_short *addr = (vu_short*)ptr;
+	vu_short *addr1, *addr2, *addr3;
 
-        addr1 = (vu_short*) ( ((int)ptr) + (0x5555<<2) );
-        addr2 = (vu_short*) ( ((int)ptr) + (0x2AAA<<2) );
-        addr3 = (vu_short*) ( ((int)ptr) + (0x5555<<2) );
+	addr1 = (vu_short*) ( ((int)ptr) + (0x5555<<2) );
+	addr2 = (vu_short*) ( ((int)ptr) + (0x2AAA<<2) );
+	addr3 = (vu_short*) ( ((int)ptr) + (0x5555<<2) );
 
-        *addr1 = 0xAAAA;
-        *addr2 = 0x5555;
-        *addr3 = 0x9090;
+	*addr1 = 0xAAAA;
+	*addr2 = 0x5555;
+	*addr3 = 0x9090;
 
 	*ptr_manuf  = addr[0];
 	*ptr_dev_id = addr[2];
 
-        addr[0] = 0xf0f0;       /* return to normal */
+	addr[0] = 0xf0f0;       /* return to normal */
 }
 
 static ulong flash_get_size ( short manu, short dev_id, flash_info_t *info)
@@ -295,7 +295,7 @@ static ulong flash_get_size ( short manu, short dev_id, flash_info_t *info)
 	case ((short)AMD_ID_LV800B):
 		info->flash_id += FLASH_AM800B;
 		info->sector_count = 19;
-		info->size = 0x00400000;	//%%% Size doubled by yooth
+		info->size = 0x00400000;	/*%%% Size doubled by yooth */
 		break;				/* => 4 MB		*/
 
 	case ((short)AMD_ID_LV160T):
@@ -315,7 +315,7 @@ static ulong flash_get_size ( short manu, short dev_id, flash_info_t *info)
 
 	}
 
-        return(info->size);
+	return(info->size);
 }
 
 
diff --git a/board/v37/u-boot.lds b/board/v37/u-boot.lds
index 303425a..ab1bbc9 100644
--- a/board/v37/u-boot.lds
+++ b/board/v37/u-boot.lds
@@ -114,6 +114,11 @@ SECTIONS
   _edata  =  .;
   PROVIDE (edata = .);
 
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
   __start___ex_table = .;
   __ex_table : { *(__ex_table) }
   __stop___ex_table = .;
@@ -136,8 +141,3 @@ SECTIONS
   _end = . ;
   PROVIDE (end = .);
 }
-
-
-
-
-
diff --git a/board/v37/v37.c b/board/v37/v37.c
index f463af8..3b786ef 100644
--- a/board/v37/v37.c
+++ b/board/v37/v37.c
@@ -44,33 +44,33 @@ static long int dram_size (void);
 
 const uint sdram_table[] =
 {
-        /*  single read. (offset 0 in upm RAM) */
-        0x1F07D004, 0xEEAEE004, 0x11ADD004, 0xEFBBA000,
-        0x1FF75447, 0x1FF77C34, 0xEFEABC34, 0x1FB57C35,
-
-        /* burst read. (Offset 8 in upm RAM)   */
-        0x1F07D004, 0xEEAEE004, 0x00ADC004, 0x00AFC000,
-        0x00AFC000, 0x01AFC000, 0x0FBB8000, 0x1FF75447,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-        /* single write. (Offset 0x18 in upm RAM) */
-        0x1F27D004, 0xEEAEA000, 0x01B90004, 0x1FF75447,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-        /*  burst write. (Offset 0x20 in upm RAM) */
-        0x1F07D004, 0xEEAEA000, 0x00AD4000, 0x00AFC000,
-        0x00AFC000, 0x01BB8004, 0x1FF75447, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-        /* Refresh cycle, offset 0x30 */
-        0x1FF5DC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
-        0xFFFFFC84, 0xFFFFFC07, 0xFFFFFFFF, 0xFFFFFFFF,
-        0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
-
-        /* Exception, 0ffset 0x3C */
-        0x7FFFFC07, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+	/*  single read. (offset 0 in upm RAM) */
+	0x1F07D004, 0xEEAEE004, 0x11ADD004, 0xEFBBA000,
+	0x1FF75447, 0x1FF77C34, 0xEFEABC34, 0x1FB57C35,
+
+	/* burst read. (Offset 8 in upm RAM)   */
+	0x1F07D004, 0xEEAEE004, 0x00ADC004, 0x00AFC000,
+	0x00AFC000, 0x01AFC000, 0x0FBB8000, 0x1FF75447,
+	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+
+	/* single write. (Offset 0x18 in upm RAM) */
+	0x1F27D004, 0xEEAEA000, 0x01B90004, 0x1FF75447,
+	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+
+	/*  burst write. (Offset 0x20 in upm RAM) */
+	0x1F07D004, 0xEEAEA000, 0x00AD4000, 0x00AFC000,
+	0x00AFC000, 0x01BB8004, 0x1FF75447, 0xFFFFFFFF,
+	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+
+	/* Refresh cycle, offset 0x30 */
+	0x1FF5DC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
+	0xFFFFFC84, 0xFFFFFC07, 0xFFFFFFFF, 0xFFFFFFFF,
+	0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
+
+	/* Exception, 0ffset 0x3C */
+	0x7FFFFC07, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
 };
 /* ------------------------------------------------------------------------- */
 
@@ -121,7 +121,7 @@ long int initdram (int board_type)
 
     delay_cnt = 0;
     while( delay_cnt++ < DRAM_DELAY )
-        ;
+	;
 
     /* Run MRS command in location 5-8 of UPMB */
 
@@ -132,7 +132,7 @@ long int initdram (int board_type)
 
     delay_cnt = 0;
     while( delay_cnt++ < DRAM_DELAY )
-        ;
+	;
 
 #ifdef	CONFIG_CAN_DRIVER
     /* Initialize OR3 / BR3 */
@@ -207,12 +207,12 @@ static long int dram_size ()
 
     switch( memory )
     {
-        case 1:
-            return( 32*MBYTE );
-        case 2:
-            return( 64*MBYTE );
-        default:
-            break;
+	case 1:
+	    return( 32*MBYTE );
+	case 2:
+	    return( 64*MBYTE );
+	default:
+	    break;
     }
     return( 16*MBYTE );
 }