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author | wdenk <wdenk> | 2003-06-19 23:01:32 +0000 |
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committer | wdenk <wdenk> | 2003-06-19 23:01:32 +0000 |
commit | 48b42616e928ce6eacfe20276a1614e2b27ac4b5 (patch) | |
tree | 0c194fbd1059185f158c0b37dc3c846b50c2ee2f /board/trab/trab.c | |
parent | 15ef8a5d17181ea376fac94579dce0af1cfcdeb7 (diff) | |
download | u-boot-imx-48b42616e928ce6eacfe20276a1614e2b27ac4b5.zip u-boot-imx-48b42616e928ce6eacfe20276a1614e2b27ac4b5.tar.gz u-boot-imx-48b42616e928ce6eacfe20276a1614e2b27ac4b5.tar.bz2 |
* Patches by David Müller, 12 Jun 2003:
- rewrite of the S3C24X0 register definitions stuff
- "driver" for the built-in S3C24X0 RTC
* Patches by Yuli Barcohen, 12 Jun 2003:
- Add MII support and Ethernet PHY initialization for MPC8260ADS board
- Fix incorrect SIUMCR initialisation caused by wrong Hard Reset
configuration word supplied by FPGA on some MPC8260ADS boards
* Patch by Pantelis Antoniou, 10 Jun 2003:
Unify status LED interface
Diffstat (limited to 'board/trab/trab.c')
-rw-r--r-- | board/trab/trab.c | 84 |
1 files changed, 51 insertions, 33 deletions
diff --git a/board/trab/trab.c b/board/trab/trab.c index 6c9971f..dd4105d 100644 --- a/board/trab/trab.c +++ b/board/trab/trab.c @@ -71,37 +71,39 @@ int board_init () extern int vfd_init_clocks(void); #endif DECLARE_GLOBAL_DATA_PTR; + S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER(); + S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); /* memory and cpu-speed are setup before relocation */ #ifdef CONFIG_TRAB_50MHZ /* change the clock to be 50 MHz 1:1:1 */ /* MDIV:0x5c PDIV:4 SDIV:2 */ - rMPLLCON = 0x5c042; - rCLKDIVN = 0; + clk_power->MPLLCON = 0x5c042; + clk_power->CLKDIVN = 0; #else /* change the clock to be 133 MHz 1:2:4 */ /* MDIV:0x7d PDIV:4 SDIV:1 */ - rMPLLCON = 0x7d041; - rCLKDIVN = 3; + clk_power->MPLLCON = 0x7d041; + clk_power->CLKDIVN = 3; #endif /* set up the I/O ports */ - rPACON = 0x3ffff; - rPBCON = 0xaaaaaaaa; - rPBUP = 0xffff; + gpio->PACON = 0x3ffff; + gpio->PBCON = 0xaaaaaaaa; + gpio->PBUP = 0xffff; /* INPUT nCTS0 nRTS0 TXD[1] TXD[0] RXD[1] RXD[0] */ /* 00, 10, 10, 10, 10, 10, 10 */ - rPFCON = (2<<0) | (2<<2) | (2<<4) | (2<<6) | (2<<8) | (2<<10); + gpio->PFCON = (2<<0) | (2<<2) | (2<<4) | (2<<6) | (2<<8) | (2<<10); #ifdef CONFIG_HWFLOW /* do not pull up RXD0, RXD1, TXD0, TXD1, CTS0, RTS0 */ - rPFUP = (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5); + gpio->PFUP = (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5); #else /* do not pull up RXD0, RXD1, TXD0, TXD1 */ - rPFUP = (1<<0) | (1<<1) | (1<<2) | (1<<3); + gpio->PFUP = (1<<0) | (1<<1) | (1<<2) | (1<<3); #endif - rPGCON = 0x0; - rPGUP = 0x0; - rOPENCR= 0x0; + gpio->PGCON = 0x0; + gpio->PGUP = 0x0; + gpio->OPENCR= 0x0; /* arch number of SAMSUNG-Board */ /* MACH_TYPE_SMDK2400 */ @@ -112,8 +114,8 @@ int board_init () gd->bd->bi_boot_params = 0x0c000100; /* Make sure both buzzers are turned off */ - rPDCON |= 0x5400; - rPDDAT &= ~0xE0; + gpio->PDCON |= 0x5400; + gpio->PDDAT &= ~0xE0; #ifdef CONFIG_VFD vfd_init_clocks(); @@ -305,57 +307,73 @@ static int key_pressed(void) #ifdef CFG_BRIGHTNESS -#define SET_CS_TOUCH (rPDDAT &= 0x5FF) -#define CLR_CS_TOUCH (rPDDAT |= 0x200) +static inline void SET_CS_TOUCH(void) +{ + S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); + + gpio->PDDAT &= 0x5FF; +} + +static inline void CLR_CS_TOUCH(void) +{ + S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); + + gpio->PDDAT |= 0x200; +} static void spi_init(void) { + S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO(); + S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI(); int i; /* Configure I/O ports. */ - rPDCON = (rPDCON & 0xF3FFFF) | 0x040000; - rPGCON = (rPGCON & 0x0F3FFF) | 0x008000; - rPGCON = (rPGCON & 0x0CFFFF) | 0x020000; - rPGCON = (rPGCON & 0x03FFFF) | 0x080000; + gpio->PDCON = (gpio->PDCON & 0xF3FFFF) | 0x040000; + gpio->PGCON = (gpio->PGCON & 0x0F3FFF) | 0x008000; + gpio->PGCON = (gpio->PGCON & 0x0CFFFF) | 0x020000; + gpio->PGCON = (gpio->PGCON & 0x03FFFF) | 0x080000; - CLR_CS_TOUCH; + CLR_CS_TOUCH(); - rSPPRE = 0x1F; /* Baudrate ca. 514kHz */ - rSPPIN = 0x01; /* SPI-MOSI holds Level after last bit */ - rSPCON = 0x1A; /* Polling, Prescaler, Master, CPOL=0, CPHA=1 */ + spi->ch[0].SPPRE = 0x1F; /* Baudrate ca. 514kHz */ + spi->ch[0].SPPIN = 0x01; /* SPI-MOSI holds Level after last bit */ + spi->ch[0].SPCON = 0x1A; /* Polling, Prescaler, Master, CPOL=0, CPHA=1 */ /* Dummy byte ensures clock to be low. */ for (i = 0; i < 10; i++) { - rSPTDAT = 0xFF; + spi->ch[0].SPTDAT = 0xFF; } wait_transmit_done(); } static void wait_transmit_done(void) { - while (!(rSPSTA & 0x01)); /* wait until transfer is done */ + S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI(); + + while (!(spi->ch[0].SPSTA & 0x01)); /* wait until transfer is done */ } static void tsc2000_write(unsigned int page, unsigned int reg, unsigned int data) { + S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI(); unsigned int command; - SET_CS_TOUCH; + SET_CS_TOUCH(); command = 0x0000; command |= (page << 11); command |= (reg << 5); - rSPTDAT = (command & 0xFF00) >> 8; + spi->ch[0].SPTDAT = (command & 0xFF00) >> 8; wait_transmit_done(); - rSPTDAT = (command & 0x00FF); + spi->ch[0].SPTDAT = (command & 0x00FF); wait_transmit_done(); - rSPTDAT = (data & 0xFF00) >> 8; + spi->ch[0].SPTDAT = (data & 0xFF00) >> 8; wait_transmit_done(); - rSPTDAT = (data & 0x00FF); + spi->ch[0].SPTDAT = (data & 0x00FF); wait_transmit_done(); - CLR_CS_TOUCH; + CLR_CS_TOUCH(); } static void tsc2000_set_brightness(void) |