Clean-up of s3c24x0 drivers excluding nand driver

This patch re-formats the arm920t s3c24x0 driver files, excluding the nand
driver, in preparation for changes to add support for the Embest SBC2440-II Board.

The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
  non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports

It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4 and 2/4 of this series

Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

1 files changed, 6 insertions, 6 deletions

diff --git a/board/trab/rs485.c b/board/trab/rs485.c
index 97aea91..7d5c0a2 100644
--- a/board/trab/rs485.c
+++ b/board/trab/rs485.c
@@ -42,7 +42,7 @@ static void trab_rs485_disable_rx(void);
 
 static void rs485_setbrg (void)
 {
-	S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
+	struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
 	int i;
 	unsigned int reg = 0;
 
@@ -67,7 +67,7 @@ static void rs485_setbrg (void)
 
 static void rs485_cfgio (void)
 {
-	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
 
 	gpio->PFCON &= ~(0x3 << 2);
 	gpio->PFCON |=  (0x2 << 2); /* configure GPF1 as RXD1 */
@@ -101,7 +101,7 @@ int rs485_init (void)
  */
 int rs485_getc (void)
 {
-	S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
+	struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
 
 	/* wait for character to arrive */
 	while (!(uart->UTRSTAT & 0x1));
@@ -114,7 +114,7 @@ int rs485_getc (void)
  */
 void rs485_putc (const char c)
 {
-	S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
+	struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
 
 	/* wait for room in the tx FIFO */
 	while (!(uart->UTRSTAT & 0x2));
@@ -131,7 +131,7 @@ void rs485_putc (const char c)
  */
 int rs485_tstc (void)
 {
-	S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
+	struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
 
 	return uart->UTRSTAT & 0x1;
 }
@@ -168,7 +168,7 @@ static void set_rs485re(unsigned char rs485re_state)
 
 static void set_rs485de(unsigned char rs485de_state)
 {
-	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
 
 	/* This is on PORT A bit 11 */
 	if(rs485de_state)