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author | Stefan Roese <sr@denx.de> | 2007-12-29 09:23:11 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2007-12-29 09:23:11 +0100 |
commit | feaa43f3a8f465cbf01ffa1b23b6b52431819a52 (patch) | |
tree | 3ee393d421c72a882d27b1de5978a2a9befce062 /board/tqm8xx | |
parent | 8697e6a19b10f514511b6a9c86de88bd108c4f8d (diff) | |
parent | e174ac34adf5d5653df12bc3cf19c52063a71269 (diff) | |
download | u-boot-imx-feaa43f3a8f465cbf01ffa1b23b6b52431819a52.zip u-boot-imx-feaa43f3a8f465cbf01ffa1b23b6b52431819a52.tar.gz u-boot-imx-feaa43f3a8f465cbf01ffa1b23b6b52431819a52.tar.bz2 |
Merge branch 'for-1.3.2-ver2'
Conflicts:
cpu/ppc4xx/fdt.c
include/configs/kilauea.h
include/configs/sequoia.h
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/tqm8xx')
-rw-r--r-- | board/tqm8xx/flash.c | 4 | ||||
-rw-r--r-- | board/tqm8xx/tqm8xx.c | 15 |
2 files changed, 12 insertions, 7 deletions
diff --git a/board/tqm8xx/flash.c b/board/tqm8xx/flash.c index db0a7e5..4342ebc 100644 --- a/board/tqm8xx/flash.c +++ b/board/tqm8xx/flash.c @@ -33,6 +33,8 @@ DECLARE_GLOBAL_DATA_PTR; +#if !defined(CFG_FLASH_CFI_DRIVER) /* do not use if CFI driver is configured */ + #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ && !defined(CONFIG_TQM885D) # ifndef CFG_OR_TIMING_FLASH_AT_50MHZ @@ -828,3 +830,5 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) /*----------------------------------------------------------------------- */ + +#endif /* !defined(CFG_FLASH_CFI_DRIVER) */ diff --git a/board/tqm8xx/tqm8xx.c b/board/tqm8xx/tqm8xx.c index cebdcc0..fcd941e 100644 --- a/board/tqm8xx/tqm8xx.c +++ b/board/tqm8xx/tqm8xx.c @@ -37,6 +37,7 @@ static long int dram_size (long int, long int *, long int); #define _NOT_USED_ 0xFFFFFFFF +/* UPM initialization table for SDRAM: 40, 50, 66 MHz CLKOUT @ CAS latency 2, tWR=2 */ const uint sdram_table[] = { /* @@ -63,14 +64,14 @@ const uint sdram_table[] = /* * Single Write. (Offset 18 in UPMA RAM) */ - 0x1F0DFC04, 0xEEABBC00, 0x01B27C04, 0x1FF5FC47, /* last */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + 0x1F0DFC04, 0xEEABBC00, 0x11B77C04, 0xEFFAFC44, + 0x1FF5FC47, /* last */ + _NOT_USED_, _NOT_USED_, _NOT_USED_, /* * Burst Write. (Offset 20 in UPMA RAM) */ 0x1F0DFC04, 0xEEABBC00, 0x10A77C00, 0xF0AFFC00, - 0xF0AFFC00, 0xE1BAFC04, 0x1FF5FC47, /* last */ - _NOT_USED_, + 0xF0AFFC00, 0xF0AFFC04, 0xE1BAFC44, 0x1FF5FC47, /* last */ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, /* @@ -83,7 +84,7 @@ const uint sdram_table[] = /* * Exception. (Offset 3c in UPMA RAM) */ - 0x7FFFFC07, /* last */ + 0xFFFFFC07, /* last */ _NOT_USED_, _NOT_USED_, _NOT_USED_, }; @@ -183,7 +184,7 @@ long int initdram (int board_type) #ifndef CONFIG_CAN_DRIVER if ((board_type != 'L') && (board_type != 'M') && - (board_type != 'D') ) { /* "L" and "M" type boards have only one bank SDRAM */ + (board_type != 'D') ) { /* only one SDRAM bank on L, M and D modules */ memctl->memc_or3 = CFG_OR3_PRELIM; memctl->memc_br3 = CFG_BR3_PRELIM; } @@ -259,7 +260,7 @@ long int initdram (int board_type) #ifndef CONFIG_CAN_DRIVER if ((board_type != 'L') && (board_type != 'M') && - (board_type != 'D') ) { /* "L" and "M" type boards have only one bank SDRAM */ + (board_type != 'D') ) { /* only one SDRAM bank on L, M and D modules */ /* * Check Bank 1 Memory Size * use current column settings |