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authorWolfgang Denk <wd@denx.de>2007-12-27 02:01:15 +0100
committerWolfgang Denk <wd@denx.de>2007-12-27 02:01:15 +0100
commit0dcfe3a225a9436fc514f374a19242c672f1172b (patch)
tree7ac3f382538d8919e475c6eaed25abb1af71e005 /board/tqm8xx/tqm8xx.c
parent61fb15c516fef5631e305f1976d7b3a679725856 (diff)
parent33ed73bc0e38d0f2b5c183d4629d8f207e5b9994 (diff)
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Merge branch 'master' of /home/wd/git/u-boot/custodians
Diffstat (limited to 'board/tqm8xx/tqm8xx.c')
-rw-r--r--board/tqm8xx/tqm8xx.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/board/tqm8xx/tqm8xx.c b/board/tqm8xx/tqm8xx.c
index cebdcc0..fcd941e 100644
--- a/board/tqm8xx/tqm8xx.c
+++ b/board/tqm8xx/tqm8xx.c
@@ -37,6 +37,7 @@ static long int dram_size (long int, long int *, long int);
#define _NOT_USED_ 0xFFFFFFFF
+/* UPM initialization table for SDRAM: 40, 50, 66 MHz CLKOUT @ CAS latency 2, tWR=2 */
const uint sdram_table[] =
{
/*
@@ -63,14 +64,14 @@ const uint sdram_table[] =
/*
* Single Write. (Offset 18 in UPMA RAM)
*/
- 0x1F0DFC04, 0xEEABBC00, 0x01B27C04, 0x1FF5FC47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ 0x1F0DFC04, 0xEEABBC00, 0x11B77C04, 0xEFFAFC44,
+ 0x1FF5FC47, /* last */
+ _NOT_USED_, _NOT_USED_, _NOT_USED_,
/*
* Burst Write. (Offset 20 in UPMA RAM)
*/
0x1F0DFC04, 0xEEABBC00, 0x10A77C00, 0xF0AFFC00,
- 0xF0AFFC00, 0xE1BAFC04, 0x1FF5FC47, /* last */
- _NOT_USED_,
+ 0xF0AFFC00, 0xF0AFFC04, 0xE1BAFC44, 0x1FF5FC47, /* last */
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
/*
@@ -83,7 +84,7 @@ const uint sdram_table[] =
/*
* Exception. (Offset 3c in UPMA RAM)
*/
- 0x7FFFFC07, /* last */
+ 0xFFFFFC07, /* last */
_NOT_USED_, _NOT_USED_, _NOT_USED_,
};
@@ -183,7 +184,7 @@ long int initdram (int board_type)
#ifndef CONFIG_CAN_DRIVER
if ((board_type != 'L') &&
(board_type != 'M') &&
- (board_type != 'D') ) { /* "L" and "M" type boards have only one bank SDRAM */
+ (board_type != 'D') ) { /* only one SDRAM bank on L, M and D modules */
memctl->memc_or3 = CFG_OR3_PRELIM;
memctl->memc_br3 = CFG_BR3_PRELIM;
}
@@ -259,7 +260,7 @@ long int initdram (int board_type)
#ifndef CONFIG_CAN_DRIVER
if ((board_type != 'L') &&
(board_type != 'M') &&
- (board_type != 'D') ) { /* "L" and "M" type boards have only one bank SDRAM */
+ (board_type != 'D') ) { /* only one SDRAM bank on L, M and D modules */
/*
* Check Bank 1 Memory Size
* use current column settings