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authorStefan Roese <sr@denx.de>2007-12-27 19:37:26 +0100
committerStefan Roese <sr@denx.de>2007-12-27 19:37:26 +0100
commitbb701283a8dcb2521000fe437f19a83cadc98b02 (patch)
treec8fe6881bf3b607b18b098009a64650357e848f5 /board/tqm85xx
parentb568fd25574181a3b12ae3d66b2913903442cb83 (diff)
parent0dcfe3a225a9436fc514f374a19242c672f1172b (diff)
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Merge branch 'master' of /home/stefan/git/u-boot/u-boot into for-1.3.2-ver2
Diffstat (limited to 'board/tqm85xx')
-rw-r--r--board/tqm85xx/sdram.c6
-rw-r--r--board/tqm85xx/tqm85xx.c8
2 files changed, 5 insertions, 9 deletions
diff --git a/board/tqm85xx/sdram.c b/board/tqm85xx/sdram.c
index 9c1f087..2053ade 100644
--- a/board/tqm85xx/sdram.c
+++ b/board/tqm85xx/sdram.c
@@ -57,8 +57,7 @@ int cas_latency(void);
long int sdram_setup(int casl)
{
int i;
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile ccsr_ddr_t *ddr = &immap->im_ddr;
+ volatile ccsr_ddr_t *ddr = (void *)(CFG_MPC85xx_DDR_ADDR);
unsigned long cfg_ddr_timing1;
unsigned long cfg_ddr_mode;
@@ -150,8 +149,7 @@ long int initdram (int board_type)
* This DLL-Override only used on TQM8540 and TQM8560
*/
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile ccsr_gur_t *gur= &immap->im_gur;
+ volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
int i,x;
x = 10;
diff --git a/board/tqm85xx/tqm85xx.c b/board/tqm85xx/tqm85xx.c
index 256c076..5d5cb1b 100644
--- a/board/tqm85xx/tqm85xx.c
+++ b/board/tqm85xx/tqm85xx.c
@@ -262,8 +262,7 @@ int checkboard (void)
int misc_init_r (void)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_lbc_t *memctl = &immap->im_lbc;
+ volatile ccsr_lbc_t *memctl = (void *)(CFG_MPC85xx_LBC_ADDR);
/*
* Adjust flash start and offset to detected values
@@ -324,9 +323,8 @@ int misc_init_r (void)
*/
void local_bus_init (void)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+ volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
+ volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
uint clkdiv;
uint lbc_hz;