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authorWolfgang Grandegger <wg@grandegger.com>2008-06-05 13:12:04 +0200
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-06-10 23:58:58 -0500
commit518d5cfe72916323c746af1647764459914f555f (patch)
tree9a71fa3c62e497f481643de14ccb965c6dde4daa /board/tqc
parent45dee2e620ccec6ac7b3548fe8979a34fd030e5d (diff)
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TQM85xx: Bugfix in the SDRAM initialisation
The CS0_BNDS register is now set according to the detected memory size. Signed-off-by Martin Krause <martin.krause@tqs.de>
Diffstat (limited to 'board/tqc')
-rw-r--r--board/tqc/tqm85xx/sdram.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/board/tqc/tqm85xx/sdram.c b/board/tqc/tqm85xx/sdram.c
index 413567e..e005d84 100644
--- a/board/tqc/tqm85xx/sdram.c
+++ b/board/tqc/tqm85xx/sdram.c
@@ -104,8 +104,10 @@ long int sdram_setup (int casl)
if (get_ram_size (0, ddr_cs_conf[i].size) ==
ddr_cs_conf[i].size) {
/*
- * OK, size detected -> all done
+ * size detected -> set Chip Select Bounds Register
*/
+ ddr->cs0_bnds = (ddr_cs_conf[i].size - 1) >> 24;
+
return ddr_cs_conf[i].size;
}
}