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authorKumar Gala <galak@kernel.crashing.org>2010-12-17 10:23:45 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-01-14 01:32:20 -0600
commit48f27919aa85c6f545d42093f389bd1d312d5744 (patch)
treecc0f1eab7d27f85f41f651491aae41a21c180b67 /board/tqc/tqm85xx/tqm85xx.c
parent663570950d780f0dad543a6b2161e6bf75871886 (diff)
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powerpc/85xx: Rework TQM boards pci_init_board to use common FSL PCIe code
Remove duplicated code in TQM 85xx boards and utilize the common fsl_pcie_init_board(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> CC: wd@denx.de
Diffstat (limited to 'board/tqc/tqm85xx/tqm85xx.c')
-rw-r--r--board/tqc/tqm85xx/tqm85xx.c41
1 files changed, 12 insertions, 29 deletions
diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c
index 43c73e1..99b1331 100644
--- a/board/tqc/tqm85xx/tqm85xx.c
+++ b/board/tqc/tqm85xx/tqm85xx.c
@@ -541,31 +541,29 @@ void local_bus_init (void)
static struct pci_controller pci1_hose;
#endif /* CONFIG_PCI1 */
-#ifdef CONFIG_PCIE1
-static struct pci_controller pcie1_hose;
-#endif /* CONFIG_PCIE1 */
-
void pci_init_board (void)
{
- struct fsl_pci_info pci_info[2];
+ volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
int first_free_busno = 0;
- int num = 0;
+#ifdef CONFIG_PCI1
+ struct fsl_pci_info pci_info;
int pcie_ep;
- __maybe_unused int pcie_configured;
- volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
u32 devdisr = in_be32(&gur->devdisr);
- u32 pordevsr = in_be32(&gur->pordevsr);
-#ifdef CONFIG_PCI1
uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32;
uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB;
uint pci_speed = CONFIG_SYS_CLK_FREQ; /* PCI PSPEED in [4:5] */
uint pci_clk_sel = in_be32(&gur->porpllsr) & MPC85xx_PORDEVSR_PCI1_SPD;
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
- SET_STD_PCI_INFO(pci_info[num], 1);
- pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
+ SET_STD_PCI_INFO(pci_info, 1);
+ set_next_law(pci_info.mem_phys,
+ law_size_bits(pci_info.mem_size), pci_info.law);
+ set_next_law(pci_info.io_phys,
+ law_size_bits(pci_info.io_size), pci_info.law);
+
+ pcie_ep = fsl_setup_hose(&pci1_hose, pci_info.regs);
printf("PCI1: %d bit, %s MHz, %s, %s, %s\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333333) ? "33" :
@@ -573,7 +571,7 @@ void pci_init_board (void)
pci_clk_sel ? "sync" : "async",
pcie_ep ? "agent" : "host",
pci_arb ? "arbiter" : "external-arbiter");
- first_free_busno = fsl_pci_init_port(&pci_info[num++],
+ first_free_busno = fsl_pci_init_port(&pci_info,
&pci1_hose, first_free_busno);
#ifdef CONFIG_PCIX_CHECK
if (!(in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1)) {
@@ -596,22 +594,7 @@ void pci_init_board (void)
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1);
#endif
-#ifdef CONFIG_PCIE1
- pcie_configured = is_serdes_configured(PCIE1);
-
- if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) {
- SET_STD_PCIE_INFO(pci_info[num], 1);
- pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf("PCIE1: connected as %s\n",
- pcie_ep ? "Endpoint" : "Root Complex");
- first_free_busno = fsl_pci_init_port(&pci_info[num++],
- &pcie1_hose, first_free_busno);
- } else {
- printf("PCIE1: disabled\n");
- }
-#else
- setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE);
-#endif /* CONFIG_PCIE1 */
+ fsl_pcie_init_board(first_free_busno);
}
#ifdef CONFIG_OF_BOARD_SETUP