diff options
| author | Wolfgang Grandegger <wg@grandegger.com> | 2008-06-05 13:12:08 +0200 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-06-11 00:05:01 -0500 |
| commit | b9e8078bb3f3c48111a7081e27279938c3a445e1 (patch) | |
| tree | 3013fbb38a59c2c0590496485b57623317ce0b98 /board/tqc/tqm85xx/law.c | |
| parent | 1287e0c55a2ee2c575ac9ce8e4302cd4085be876 (diff) | |
| download | u-boot-imx-b9e8078bb3f3c48111a7081e27279938c3a445e1.zip u-boot-imx-b9e8078bb3f3c48111a7081e27279938c3a445e1.tar.gz u-boot-imx-b9e8078bb3f3c48111a7081e27279938c3a445e1.tar.bz2 | |
TQM8548: PCI express support
This patch adds support for PCI express cards. The board support
now uses common FSL PCI init code, for both, PCI and PCIe on all
TQM85xx modules.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Diffstat (limited to 'board/tqc/tqm85xx/law.c')
| -rw-r--r-- | board/tqc/tqm85xx/law.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/board/tqc/tqm85xx/law.c b/board/tqc/tqm85xx/law.c index ad35464..bec1ed5 100644 --- a/board/tqc/tqm85xx/law.c +++ b/board/tqc/tqm85xx/law.c @@ -32,11 +32,11 @@ * * 0x0000_0000 0x7fff_ffff DDR 2G * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M - * 0xc000_0000 0xdfff_ffff RapidIO 512M + * 0xc000_0000 0xdfff_ffff RapidIO or PCI express 512M * 0xe000_0000 0xe000_ffff CCSR 1M * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M * 0xe300_0000 0xe3ff_ffff CAN 16M - * 0xf800_0000 0xf80f_ffff BCSR 1M + * 0xef00_0000 0xefff_ffff PCI express IO 16M * 0xfe00_0000 0xffff_ffff FLASH (boot bank) 32M * * Notes: @@ -49,10 +49,17 @@ struct law_entry law_table[] = { SET_LAW_ENTRY (2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), SET_LAW_ENTRY (3, CFG_LBC_FLASH_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), SET_LAW_ENTRY (4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY (5, CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), +#ifdef CONFIG_PCIE1 + SET_LAW_ENTRY (5, CFG_PCIE1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1), +#else /* !CONFIG_PCIE1 */ + SET_LAW_ENTRY (5, CFG_RIO_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_RIO), +#endif /* CONFIG_PCIE1 */ #ifdef CONFIG_CAN_DRIVER - SET_LAW_ENTRY (6, CFG_CAN_BASE, LAWAR_SIZE_16M, LAW_TRGT_IF_LBC), + SET_LAW_ENTRY (6, CFG_CAN_BASE, LAW_SIZE_16M, LAW_TRGT_IF_LBC), #endif /* CONFIG_CAN_DRIVER */ +#ifdef CONFIG_PCIE1 + SET_LAW_ENTRY (7, CFG_PCIE1_IO_BASE, LAW_SIZE_16M, LAW_TRGT_IF_PCIE_1), +#endif /* CONFIG_PCIE */ }; int num_law_entries = ARRAY_SIZE (law_table); |