diff options
author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/tqc/tqm834x | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/tqc/tqm834x')
-rw-r--r-- | board/tqc/tqm834x/pci.c | 34 | ||||
-rw-r--r-- | board/tqc/tqm834x/tqm834x.c | 22 |
2 files changed, 28 insertions, 28 deletions
diff --git a/board/tqc/tqm834x/pci.c b/board/tqc/tqm834x/pci.c index e3d0309..0eedf4a 100644 --- a/board/tqc/tqm834x/pci.c +++ b/board/tqc/tqm834x/pci.c @@ -29,8 +29,8 @@ #ifdef CONFIG_PCI /* System RAM mapped to PCI space */ -#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE -#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE +#define CONFIG_PCI_SYS_MEM_BUS CONFIG_SYS_SDRAM_BASE +#define CONFIG_PCI_SYS_MEM_PHYS CONFIG_SYS_SDRAM_BASE #define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024) #ifndef CONFIG_PCI_PNP @@ -78,7 +78,7 @@ pci_init_board(void) u32 reg32; struct pci_controller * hose; - immr = (immap_t *)CFG_IMMR; + immr = (immap_t *)CONFIG_SYS_IMMR; clk = (clk83xx_t *)&immr->clk; pci_law = immr->sysconf.pcilaw; pci_pot = immr->ios.pot; @@ -128,10 +128,10 @@ pci_init_board(void) /* * Configure PCI Local Access Windows */ - pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR; + pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M; - pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR; + pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_16M; /* @@ -139,13 +139,13 @@ pci_init_board(void) */ /* PCI1 mem space */ - pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK; - pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[0].potar = (CONFIG_SYS_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK; + pci_pot[0].pobar = (CONFIG_SYS_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK; pci_pot[0].pocmr = POCMR_EN | (POCMR_CM_512M & POCMR_CM_MASK); /* PCI1 IO space */ - pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK; - pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[1].potar = (CONFIG_SYS_PCI1_IO_BASE >> 12) & POTAR_TA_MASK; + pci_pot[1].pobar = (CONFIG_SYS_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK; pci_pot[1].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_16M & POCMR_CM_MASK); /* @@ -164,16 +164,16 @@ pci_init_board(void) /* PCI memory space */ pci_set_region(hose->regions + 0, - CFG_PCI1_MEM_BASE, - CFG_PCI1_MEM_PHYS, - CFG_PCI1_MEM_SIZE, + CONFIG_SYS_PCI1_MEM_BASE, + CONFIG_SYS_PCI1_MEM_PHYS, + CONFIG_SYS_PCI1_MEM_SIZE, PCI_REGION_MEM); /* PCI IO space */ pci_set_region(hose->regions + 1, - CFG_PCI1_IO_BASE, - CFG_PCI1_IO_PHYS, - CFG_PCI1_IO_SIZE, + CONFIG_SYS_PCI1_IO_BASE, + CONFIG_SYS_PCI1_IO_PHYS, + CONFIG_SYS_PCI1_IO_SIZE, PCI_REGION_IO); /* System memory space */ @@ -186,8 +186,8 @@ pci_init_board(void) hose->region_count = 3; pci_setup_indirect(hose, - (CFG_IMMR+0x8300), - (CFG_IMMR+0x8304)); + (CONFIG_SYS_IMMR+0x8300), + (CONFIG_SYS_IMMR+0x8304)); pci_register_hose(hose); diff --git a/board/tqc/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c index 278780d..106cac2 100644 --- a/board/tqc/tqm834x/tqm834x.c +++ b/board/tqc/tqm834x/tqm834x.c @@ -67,7 +67,7 @@ static void set_cs_config(short cs, long config); static void set_ddr_config(void); /* Local variable */ -static volatile immap_t *im = (immap_t *)CFG_IMMR; +static volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; /************************************************************************** * Board initialzation after relocation to RAM. Used to detect the number @@ -92,13 +92,13 @@ phys_size_t initdram (int board_type) int cs; /* during size detection, set up the max DDRLAW size */ - im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE; + im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE; im->sysconf.ddrlaw[0].ar = (LAWAR_EN | LAWAR_SIZE_2G); /* set CS bounds to maximum size */ for(cs = 0; cs < 4; ++cs) { set_cs_bounds(cs, - CFG_DDR_BASE + (cs * DDR_MAX_SIZE_PER_CS), + CONFIG_SYS_DDR_BASE + (cs * DDR_MAX_SIZE_PER_CS), DDR_MAX_SIZE_PER_CS); set_cs_config(cs, INITIAL_CS_CONFIG); @@ -122,7 +122,7 @@ phys_size_t initdram (int board_type) debug("\nDetecting Bank%d\n", cs); bank_size = get_ddr_bank_size(cs, - (volatile long*)(CFG_DDR_BASE + size)); + (volatile long*)(CONFIG_SYS_DDR_BASE + size)); size += bank_size; debug("DDR Bank%d size: %d MiB\n\n", cs, bank_size >> 20); @@ -145,7 +145,7 @@ int checkboard (void) volatile immap_t * immr; u32 w, f; - immr = (immap_t *)CFG_IMMR; + immr = (immap_t *)CONFIG_SYS_IMMR; if (!(immr->reset.rcwh & HRCWH_PCI_HOST)) { printf("PCI: NOT in host mode..?!\n"); return 0; @@ -193,9 +193,9 @@ static int detect_num_flash_banks(void) tqm834x_num_flash_banks = 2; /* assume two banks */ /* Get bank 1 and 2 information */ - bank1_size = flash_get_size(CFG_FLASH_BASE, 0); + bank1_size = flash_get_size(CONFIG_SYS_FLASH_BASE, 0); debug("Bank1 size: %lu\n", bank1_size); - bank2_size = flash_get_size(CFG_FLASH_BASE + bank1_size, 1); + bank2_size = flash_get_size(CONFIG_SYS_FLASH_BASE + bank1_size, 1); debug("Bank2 size: %lu\n", bank2_size); total_size = bank1_size + bank2_size; @@ -203,8 +203,8 @@ static int detect_num_flash_banks(void) /* Seems like we've got bank 2, but maybe it's mirrored 1 */ /* Set the base addresses */ - bank1_base = (FPWV *) (CFG_FLASH_BASE); - bank2_base = (FPWV *) (CFG_FLASH_BASE + bank1_size); + bank1_base = (FPWV *) (CONFIG_SYS_FLASH_BASE); + bank2_base = (FPWV *) (CONFIG_SYS_FLASH_BASE + bank1_size); /* Put bank 2 into CFI command mode and read */ bank2_base[0x55] = 0x00980098; @@ -253,9 +253,9 @@ static int detect_num_flash_banks(void) debug("Number of flash banks detected: %d\n", tqm834x_num_flash_banks); /* set OR0 and BR0 */ - im->lbus.bank[0].or = CFG_OR_TIMING_FLASH | + im->lbus.bank[0].or = CONFIG_SYS_OR_TIMING_FLASH | (-(total_size) & OR_GPCM_AM); - im->lbus.bank[0].br = (CFG_FLASH_BASE & BR_BA) | + im->lbus.bank[0].br = (CONFIG_SYS_FLASH_BASE & BR_BA) | (BR_MS_GPCM | BR_PS_32 | BR_V); return (0); |