summaryrefslogtreecommitdiff
path: root/board/total5200/mt48lc32m16a2-75.h
diff options
context:
space:
mode:
authorwdenk <wdenk>2004-07-11 19:17:20 +0000
committerwdenk <wdenk>2004-07-11 19:17:20 +0000
commit6c7a14084ae5f7dde3819e4ab43fd78ea82805fe (patch)
tree74714dc85f5b74ed34b2f742fa3de6d52e5446b4 /board/total5200/mt48lc32m16a2-75.h
parentbc54f309a1f274226ed0f938e2a09fc2fd9f9701 (diff)
downloadu-boot-imx-6c7a14084ae5f7dde3819e4ab43fd78ea82805fe.zip
u-boot-imx-6c7a14084ae5f7dde3819e4ab43fd78ea82805fe.tar.gz
u-boot-imx-6c7a14084ae5f7dde3819e4ab43fd78ea82805fe.tar.bz2
Patch by Mark Jonas, 01 Jul 2004:
Added support for Total5100 and Total5200 (Rev.1 and Rev.2) MGT5100 and MPC5200 based Freescale platforms.
Diffstat (limited to 'board/total5200/mt48lc32m16a2-75.h')
-rw-r--r--board/total5200/mt48lc32m16a2-75.h40
1 files changed, 40 insertions, 0 deletions
diff --git a/board/total5200/mt48lc32m16a2-75.h b/board/total5200/mt48lc32m16a2-75.h
new file mode 100644
index 0000000..4b5ac80
--- /dev/null
+++ b/board/total5200/mt48lc32m16a2-75.h
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Micron MT48LC32M16A2-75 is compatible to:
+ * - Infineon HYB39S512160AT-75
+ */
+
+#define SDRAM_DDR 0 /* is SDR */
+
+#if defined(CONFIG_MPC5200)
+/* Settings for XLB = 132 MHz */
+#define SDRAM_MODE 0x00CD0000
+#define SDRAM_CONTROL 0x514F0000
+#define SDRAM_CONFIG1 0xD2322800
+#define SDRAM_CONFIG2 0x8AD70000
+
+#else
+#error CONFIG_MPC5200 is not defined
+#endif