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author | Tom Rini <trini@konsulko.com> | 2016-12-18 13:54:25 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2016-12-18 17:43:20 -0500 |
commit | 8ea05705a70135a94419b0d243666c1b51fe1f8d (patch) | |
tree | 495da728ccebe411445c144fb88ba35041db2096 /board/toradex/colibri_imx6/800mhz_4x64mx16.cfg | |
parent | 0b4bc1b3ab1850fccbade3e6103f2036f6bdb364 (diff) | |
parent | 854bb75be98ad792ff64c26ae38a1392ea185cd6 (diff) | |
download | u-boot-imx-8ea05705a70135a94419b0d243666c1b51fe1f8d.zip u-boot-imx-8ea05705a70135a94419b0d243666c1b51fe1f8d.tar.gz u-boot-imx-8ea05705a70135a94419b0d243666c1b51fe1f8d.tar.bz2 |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Migrate CONFIG_ARCH_USE_MEMSET/MEMCPY with this merge.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/toradex/colibri_imx6/800mhz_4x64mx16.cfg')
-rw-r--r-- | board/toradex/colibri_imx6/800mhz_4x64mx16.cfg | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/board/toradex/colibri_imx6/800mhz_4x64mx16.cfg b/board/toradex/colibri_imx6/800mhz_4x64mx16.cfg new file mode 100644 index 0000000..3bd8576 --- /dev/null +++ b/board/toradex/colibri_imx6/800mhz_4x64mx16.cfg @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2013 Boundary Devices + * Copyright (C) 2014-2016, Toradex AG + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D +DATA 4, MX6_MMDC_P0_MDCFG0, 0x2C305503 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66D8D63 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x00301023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030 +DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D +/* CS0 End: 7MSB of ((0x10000000 + 512M) -1) >> 25 */ +DATA 4, MX6_MMDC_P0_MDASP, 0x00000017 +/* DDR3 DATA BUS SIZE: 64BIT */ +DATA 4, MX6_MMDC_P0_MDCTL, 0x821A0000 +/* DDR3 DATA BUS SIZE: 32BIT */ +/* DATA 4, MX6_MMDC_P0_MDCTL, 0x82190000 */ + +/* Write commands to DDR */ +/* Load Mode Registers */ +/* TODO Use Auto Self-Refresh mode (Extended Temperature)*/ +/* DATA 4, MX6_MMDC_P0_MDSCR, 0x04408032 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030 +/* ZQ calibration */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 + +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 + +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00000000 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000000 + +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42360232 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021F022A +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x421E0224 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02110218 + +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x41434344 +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4345423E +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x39383339 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3E363930 + +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x00340039 +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x002C002D +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00120019 +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0012002D + +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 |