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authorMarcel Ziswiler <marcel@ziswiler.com>2014-09-05 10:18:38 +0200
committerTom Warren <twarren@nvidia.com>2014-10-22 09:30:54 -0700
commitbf78b2717d3279e8dc74fa3bb69096ced7d8afda (patch)
tree99d39f7674b4b265d723de5a85da700a20847dba /board/toradex/apalis_t30/apalis_t30.c
parent606f5bc812bea30427e03deafca4771c9eb7396c (diff)
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arm: tegra: initial support for apalis t30
This patch adds board support for the Toradex Apalis T30 a computer on module which can be used on different carrier boards. For the sake of ease of use we do not distinguish between different carrier boards for now as the base module features are deemed sufficient enough for regular booting. The following functionality is working so far: - eMMC boot and environment storage - Gigabit Ethernet (once Thierry's PCIe as well as my E1000 resp. i210 fixes hit mainline) - MMC/SD cards (both 8-bit as well as 4-bit slot) - USB client/host (dual role port as client e.g. for DFU/UMS, other two ports as host) Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/toradex/apalis_t30/apalis_t30.c')
-rw-r--r--board/toradex/apalis_t30/apalis_t30.c92
1 files changed, 92 insertions, 0 deletions
diff --git a/board/toradex/apalis_t30/apalis_t30.c b/board/toradex/apalis_t30/apalis_t30.c
new file mode 100644
index 0000000..b9d694a
--- /dev/null
+++ b/board/toradex/apalis_t30/apalis_t30.c
@@ -0,0 +1,92 @@
+/*
+ * (C) Copyright 2014
+ * Marcel Ziswiler <marcel@ziswiler.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+#include <asm/arch/gp_padctrl.h>
+#include <asm/arch/pinmux.h>
+#include <asm/gpio.h>
+#include <i2c.h>
+#include <netdev.h>
+
+#include "pinmux-config-apalis_t30.h"
+
+#define PMU_I2C_ADDRESS 0x2D
+#define MAX_I2C_RETRY 3
+
+/*
+ * Routine: pinmux_init
+ * Description: Do individual peripheral pinmux configs
+ */
+void pinmux_init(void)
+{
+ pinmux_config_pingrp_table(tegra3_pinmux_common,
+ ARRAY_SIZE(tegra3_pinmux_common));
+
+ pinmux_config_pingrp_table(unused_pins_lowpower,
+ ARRAY_SIZE(unused_pins_lowpower));
+
+ /* Initialize any non-default pad configs (APB_MISC_GP regs) */
+ pinmux_config_drvgrp_table(apalis_t30_padctrl,
+ ARRAY_SIZE(apalis_t30_padctrl));
+}
+
+#ifdef CONFIG_PCI_TEGRA
+int tegra_pcie_board_init(void)
+{
+ unsigned int old_bus;
+ u8 addr, data[1];
+ int err;
+
+ old_bus = i2c_get_bus_num();
+
+ err = i2c_set_bus_num(0);
+ if (err) {
+ debug("failed to set I2C bus\n");
+ return err;
+ }
+
+ /* TPS659110: VDD2_OP_REG = 1.05V */
+ data[0] = 0x27;
+ addr = 0x25;
+
+ err = i2c_write(PMU_I2C_ADDRESS, addr, 1, data, 1);
+ if (err) {
+ debug("failed to set VDD supply\n");
+ return err;
+ }
+
+ /* TPS659110: VDD2_REG 7.5 mV/us, ACTIVE */
+ data[0] = 0x0D;
+ addr = 0x24;
+
+ err = i2c_write(PMU_I2C_ADDRESS, addr, 1, data, 1);
+ if (err) {
+ debug("failed to enable VDD supply\n");
+ return err;
+ }
+
+ /* TPS659110: LDO6_REG = 1.1V, ACTIVE */
+ data[0] = 0x0D;
+ addr = 0x35;
+
+ err = i2c_write(PMU_I2C_ADDRESS, addr, 1, data, 1);
+ if (err) {
+ debug("failed to set AVDD supply\n");
+ return err;
+ }
+
+ i2c_set_bus_num(old_bus);
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ return pci_eth_init(bis);
+}
+#endif /* CONFIG_PCI_TEGRA */