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authorVladimir Zapolskiy <vz@mleia.com>2015-10-04 23:18:24 +0100
committerTom Rini <trini@konsulko.com>2015-10-11 17:12:13 -0400
commitf0aa26f006339969d5e712c50fdb6838333be3b8 (patch)
tree41507f8fbf4fbb385a85f8b1c64cddc88bdae284 /board/timll
parentd1d0167663ada7c8fdb4d9d50d3fe132ac5a8b5e (diff)
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lpc32xx: remove surplus clock cycle in PL175 WAIT_OEN config
According to ARM PrimeCell PL175 documentation WAIT_OEN config value is defined without any additional clocks added to the value set by a client, the change fixes the wrong interface to WAIT_OEN config. The change also touches a single user of LPC32xx EMC and corrects configured "output enable delay" value on its side according to the changed interface. No functional change intended. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Diffstat (limited to 'board/timll')
-rw-r--r--board/timll/devkit3250/devkit3250.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/timll/devkit3250/devkit3250.c b/board/timll/devkit3250/devkit3250.c
index 4b3c94e..386d0cd 100644
--- a/board/timll/devkit3250/devkit3250.c
+++ b/board/timll/devkit3250/devkit3250.c
@@ -62,7 +62,7 @@ int board_init(void)
/* Change the NOR timings to optimum value to get maximum bandwidth */
emc->stat[0].waitwen = EMC_STAT_WAITWEN(1);
- emc->stat[0].waitoen = EMC_STAT_WAITOEN(1);
+ emc->stat[0].waitoen = EMC_STAT_WAITOEN(0);
emc->stat[0].waitrd = EMC_STAT_WAITRD(12);
emc->stat[0].waitpage = EMC_STAT_WAITPAGE(12);
emc->stat[0].waitwr = EMC_STAT_WAITWR(5);