Merge branch 'next' of git://git.denx.de/u-boot

* 'next' of git://git.denx.de/u-boot:
  MPC8xx: Fixup warning in arch/powerpc/cpu/mpc8xx/cpu.c
  doc: cleanup - move board READMEs into respective board directories
  net: sh_eth: add support for SH7757's GETHER
  net: sh_eth: modify the definitions of regsiter
  net: sh_eth: add SH_ETH_TYPE_ condition
  net: sh_eth: clean up for the SH7757's code
  net: fec_mxc: Fix MDC for xMII
  net: fec_mxc: Fix setting of RCR for xMII
  net: nfs: make NFS_TIMEOUT configurable
  net: Inline the new eth_setenv_enetaddr_by_index function
  net: allow setting env enetaddr from net device setting
  net/designware: Consecutive writes to the same register to be avoided
  CACHE: net: asix: Fix asix driver to work with data cache on
  net: phy: micrel: make ksz9021 phy accessible
  net: abort network initialization if the PHY driver fails
  phylib: phy_startup() should return an error code on failure
  net: tftp: fix type of block arg to store_block

Signed-off-by: Wolfgang Denk <wd@denx.de>

1 files changed, 91 insertions, 0 deletions

diff --git a/board/ti/omap730p2/README.omap730p2 b/board/ti/omap730p2/README.omap730p2
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+
+		     u-boot for the TI OMAP730 Perseus2
+
+		      Dave Peverley, MPC-Data Limited
+			 http://www.mpc-data.co.uk
+
+
+Overview :
+
+ As the OMAP730 is similar to the OMAP1610 in many ways, this port was based
+on the u-boot port to the OMAP1610 Innovator. Supported features are :
+
+  - Serial terminal support
+  - Onboard NOR Flash
+  - Ethernet via the seperate debug board
+  - Tested on Rev4 and Rev5 boards
+
+ It has also been tested to work correctly when built with a 'standard' GCC
+3.2.1 cross-compiler as well as Montavista Linux CEE 3.1's toolchain.
+
+
+Hardware Configuration :
+
+ The main dips on the P2 board should be set to 2,3,7 and 9 on with all
+others off. On the debug board, dips 1 and 7 should be on with the rest off.
+The serial console has been set up to run from the DB9 connector on the
+P2 board at 115200 baud, 8 data bits, no stop bits, 1 parity bit.
+
+ It should be noted that the P2 board has NOR flash that is addressable via
+either CS0 or CS3. This mode can be changed via DIP9 on the P2 board.
+
+
+Installing u-boot for the P2 :
+
+ You can simply build u-boot for the Perseus by following the instructions
+in the main readme file. The target configuration is "omap730p2_config".
+Once u-boot has been built, you should strip the executable so it can be
+loaded via CCS (which cant cope with the symbols in the ELF binary) :
+  $ cp u-boot u-boot.out
+  $ arm-linux-strip u-boot.out
+
+ The method we've used for installing u-boot the first time on a P2 is
+as follows :
+
+1) Configure TI Code Composer Studio to connect to the P2 board via JTAG
+   as described in the Users Guide.
+
+2) Set up the P2 to boot from CS3, and connect with CCS. Reset the CPU
+   and run the "init_mmu" GEL script.
+
+3) Use the "Load Program" option to send the u-boot.out file to the P2 and
+   run.
+
+ At this point, u-boot should run and you will see the boot menu on your
+serial terminal. You can then load the u-boot image to memory :
+
+  # loadb 0x10000000
+
+ Send the "u-boot.bin" binary via the serial using Kermit. Once loaded
+you can self-flash u-boot :
+
+  # protect off 1:0
+  # erase 1:0
+  # cp.b 0x10000000 0x0 0x20000
+
+ You should now be able to reset the board and run u-boot from flash.
+
+
+Alternative flash option :
+
+ Sometimes, if you've been silly, you can get the board into a state where
+whats in flash has upset the board so much that you can no longer connect
+to the P2 via JTAG. However, you can set DIP9 to off to swap the boot mode
+of the P2 so that you boot from RAM instead of NOR flash. This moves NOR
+flash up to 0x0C000000. You can build a special version of u-boot to
+utilise this by the following config :
+
+  $ make omap730p2_cs0boot_config
+
+ If you load this up via CCS it will detect flash at its alternate location
+and allow you to programme your u-boot image (which, remember must be built
+for CS3 boot!) Once you do this, you can revert to CS3 boot and it will work
+fine again.
+
+
+Errata :
+
+1) It's been observed that sometimes the tftp transfer of kernels to the
+   board can have checksum errors or stall. This appears to be an issue
+   with the lan91c96.c driver, and can normally be worked around by
+   resetting the board and trying again.