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author | Heiko Schocher <hs@denx.de> | 2013-06-05 07:47:56 +0200 |
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committer | Tom Rini <trini@ti.com> | 2013-06-18 09:12:38 -0400 |
commit | 49f783650020c62fdba4a78d4d272dca22d33662 (patch) | |
tree | a9b97016b29298b4b6becca98514f9b8e5462a72 /board/ti | |
parent | 847e6693ccb529bf8346db62876f38f0c4e04ade (diff) | |
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arm, am33xx: move rtc32k_enable() to common place
move rtc32k_enable() to common place so all am33xx boards can use it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Matt Porter <mporter@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Tom Rini <trini@ti.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Diffstat (limited to 'board/ti')
-rw-r--r-- | board/ti/am335x/board.c | 16 | ||||
-rw-r--r-- | board/ti/ti814x/evm.c | 16 |
2 files changed, 0 insertions, 32 deletions
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 06e8f07..75f129e 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -132,22 +132,6 @@ static int read_eeprom(void) #define UART_CLK_RUNNING_MASK 0x1 #define UART_SMART_IDLE_EN (0x1 << 0x3) -static void rtc32k_enable(void) -{ - struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE; - - /* - * Unlock the RTC's registers. For more details please see the - * RTC_SS section of the TRM. In order to unlock we need to - * write these specific values (keys) in this order. - */ - writel(0x83e70b13, &rtc->kick0r); - writel(0x95a4f1e0, &rtc->kick1r); - - /* Enable the RTC 32K OSC by setting bits 3 and 6. */ - writel((1 << 3) | (1 << 6), &rtc->osc); -} - static const struct ddr_data ddr2_data = { .datardsratio0 = ((MT47H128M16RT25E_RD_DQS<<30) | (MT47H128M16RT25E_RD_DQS<<20) | diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c index 4759b16..38a6ced 100644 --- a/board/ti/ti814x/evm.c +++ b/board/ti/ti814x/evm.c @@ -48,22 +48,6 @@ static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; #define UART_CLK_RUNNING_MASK 0x1 #define UART_SMART_IDLE_EN (0x1 << 0x3) -static void rtc32k_enable(void) -{ - struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE; - - /* - * Unlock the RTC's registers. For more details please see the - * RTC_SS section of the TRM. In order to unlock we need to - * write these specific values (keys) in this order. - */ - writel(0x83e70b13, &rtc->kick0r); - writel(0x95a4f1e0, &rtc->kick1r); - - /* Enable the RTC 32K OSC by setting bits 3 and 6. */ - writel((1 << 3) | (1 << 6), &rtc->osc); -} - static void uart_enable(void) { u32 regVal; |