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authorMugunthan V N <mugunthanvnm@ti.com>2013-07-08 16:04:42 +0530
committerTom Rini <trini@ti.com>2013-07-26 16:39:11 -0400
commitdec7f748356735efd3e2af269d8d0a21a44cf984 (patch)
tree1694f7c0969dda358ec04bd69b754fb018770de5 /board/ti
parentb1e26e3bfb1d53d4fd713a2a5f11b7ddf2bcaeec (diff)
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ARM: DRA7xx: Add CPSW and MDIO pinmux support
Adding CPSW Slave 0 and MDIO pinmux support for DRA7xx EVM Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Diffstat (limited to 'board/ti')
-rw-r--r--board/ti/dra7xx/mux_data.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h
index ec83422..0a86594 100644
--- a/board/ti/dra7xx/mux_data.h
+++ b/board/ti/dra7xx/mux_data.h
@@ -37,5 +37,19 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
{UART1_RTSN, (IEN | PTU | PDIS | M3)}, /* UART1_RTSN */
{I2C1_SDA, (IEN | PTU | PDIS | M0)}, /* I2C1_SDA */
{I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */
+ {MDIO_MCLK, (PTU | PEN | M0)}, /* MDIO_MCLK */
+ {MDIO_D, (IEN | PTU | PEN | M0)}, /* MDIO_D */
+ {RGMII0_TXC, (M0) },
+ {RGMII0_TXCTL, (M0) },
+ {RGMII0_TXD3, (M0) },
+ {RGMII0_TXD2, (M0) },
+ {RGMII0_TXD1, (M0) },
+ {RGMII0_TXD0, (M0) },
+ {RGMII0_RXC, (IEN | M0) },
+ {RGMII0_RXCTL, (IEN | M0) },
+ {RGMII0_RXD3, (IEN | M0) },
+ {RGMII0_RXD2, (IEN | M0) },
+ {RGMII0_RXD1, (IEN | M0) },
+ {RGMII0_RXD0, (IEN | M0) },
};
#endif /* _MUX_DATA_DRA7XX_H_ */