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authorShiraz Hashim <shiraz.hashim@st.com>2012-05-07 13:07:00 +0530
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-07-07 14:07:42 +0200
commitf28e5c946d6c88b1c8639896863c7ad7d8889bf4 (patch)
tree532ae86ae7cf78b9b60e73444e296c57b21ee59c /board/ti
parent7c885a0e5532abcd6bc802d21a7858420e5c127b (diff)
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SPEAr: Correct SoC ID offset in misc configuration space
SoC Core ID offset is 0x30 in miscellaneous configuration address space. It was wrongly mentioned as periph2 clk enable. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
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