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| author | Dan Murphy <dmurphy@ti.com> | 2013-08-01 14:05:59 -0500 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2013-08-26 21:56:31 +0200 |
| commit | 5e5cfaf9977e5ca563889e0689ff52ae07883745 (patch) | |
| tree | 8c1b18270e9a94e8a83e5d406cb636e41034d7e0 /board/ti/omap5_uevm/evm.c | |
| parent | 120503f32e1dcad3069633d6319d5d6c37e65c08 (diff) | |
| download | u-boot-imx-5e5cfaf9977e5ca563889e0689ff52ae07883745.zip u-boot-imx-5e5cfaf9977e5ca563889e0689ff52ae07883745.tar.gz u-boot-imx-5e5cfaf9977e5ca563889e0689ff52ae07883745.tar.bz2 | |
ARM: OMAP5-uevm: Add USB ehci support for the uEVM
Add the USB ehci support for the OMAP5 uEVM.
Configure the uEVM mux data
Add the flags to build the appropriate modules
Add the usb call backs to initialize the EHCI controller
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Diffstat (limited to 'board/ti/omap5_uevm/evm.c')
| -rw-r--r-- | board/ti/omap5_uevm/evm.c | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c index 81209b3..d0c5241 100644 --- a/board/ti/omap5_uevm/evm.c +++ b/board/ti/omap5_uevm/evm.c @@ -14,6 +14,13 @@ #include "mux_data.h" +#ifdef CONFIG_USB_EHCI +#include <usb.h> +#include <asm/arch/clock.h> +#include <asm/arch/ehci.h> +#include <asm/ehci-omap.h> +#endif + DECLARE_GLOBAL_DATA_PTR; const struct omap_sysinfo sysinfo = { @@ -109,3 +116,56 @@ int board_mmc_init(bd_t *bis) return 0; } #endif + +#ifdef CONFIG_USB_EHCI +static struct omap_usbhs_board_data usbhs_bdata = { + .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, + .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC, + .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC, +}; + +static void enable_host_clocks(void) +{ + int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK | + OPTFCLKEN_HSIC480M_P3_CLK | + OPTFCLKEN_HSIC60M_P2_CLK | + OPTFCLKEN_HSIC480M_P2_CLK | + OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK); + + /* Enable port 2 and 3 clocks*/ + setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val); + + /* Enable port 2 and 3 usb host ports tll clocks*/ + setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, + (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE)); +} + +int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) +{ + int ret; + int auxclk; + + enable_host_clocks(); + + auxclk = readl((*prcm)->scrm_auxclk1); + /* Request auxilary clock */ + auxclk |= AUXCLK_ENABLE_MASK; + writel(auxclk, (*prcm)->scrm_auxclk1); + + ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor); + if (ret < 0) { + puts("Failed to initialize ehci\n"); + return ret; + } + + return 0; +} + +int ehci_hcd_stop(void) +{ + int ret; + + ret = omap_ehci_hcd_stop(); + return ret; +} +#endif |