Merge branch 'master' of git://git.denx.de/u-boot-arm

* 'master' of git://git.denx.de/u-boot-arm: (146 commits)
  arm: Use common .lds file where possible
  arm: add a common .lds link script
  arm: Remove unneeded setting of LDCSRIPT
  Define CPUDIR for the .lds link script
  arm: Remove zipitz2 link script
  Allow arch directory to contain .lds without requiring Makefile
  OMAP: Remove omap1610inn-based boards
  arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix build warnings
  board/ti/beagle/beagle.c: Fix build warnings
  sdrc.c: Fix typo in do_sdrc_init() for SPL
  tegra: i2c: Add I2C driver
  tegra: fdt: i2c: Add extra I2C bindings for U-Boot
  tegra: i2c: Select I2C ordering for Seaboard
  tegra: i2c: Enable I2C on Seaboard
  tegra: i2c: Select number of controllers for Tegra2 boards
  tegra: i2c: Initialise I2C on Nvidia boards
  tegra: Enhance clock support to handle 16-bit clock divisors
  fdt: Add function to allow aliases to refer to multiple nodes
  tegra: Rename NV_PA_PMC_BASE to TEGRA2_PMC_BASE
  tegra: fdt: Enable FDT support for Ventana
  tegra: fdt: Enable FDT support for Seaboard
  tegra: usb: Enable USB on Seaboard
  tegra: usb: Add common USB defines for tegra2 boards
  tegra: usb: Add USB support to nvidia boards
  arm: Check for valid FDT after console is up
  fdt: Avoid early panic() when there is no FDT present
  tegra: usb: Add support for Tegra USB peripheral
  tegra: fdt: Add function to return peripheral/clock ID
  usb: Add support for txfifo threshold
  tegra: usb: fdt: Add USB definitions for Tegra2 Seaboard
  tegra: usb: fdt: Add additional device tree definitions for USB ports
  tegra: fdt: Add clock bindings for Tegra2 Seaboard
  tegra: fdt: Add clock bindings
  tegra: fdt: Add additional USB binding
  fdt: Add tegra-usb bindings file from linux
  fdt: Add staging area for device tree binding documentation
  tegra: fdt: Add device tree file for Tegra2 Seaboard from kernel
  tegra: fdt: Add Tegra2x device tree file from kernel
  arm: fdt: Add skeleton device tree file from kernel
  fdt: Add basic support for decoding GPIO definitions
  fdt: Add functions to access phandles, arrays and bools
  fdt: Tidy up a few fdtdec problems
  fdt: Add tests for fdtdec
  fdt: Add fdtdec_find_aliases() to deal with alias nodes
  arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load
  net: fec_mxc: allow use with cache enabled
  net: force PKTALIGN to ARCH_DMA_MINALIGN
  i.MX28: Enable caches by default
  i.MX28: Make use of the bounce buffer
  i.MX28: Do data transfers via DMA in MMC driver
  MMC: Implement generic bounce buffer
  i.MX28: Add cache support to MXS NAND driver
  i.MX28: Add cache support into the APBH DMA driver
  ARM926EJS: Implement cache operations
  board/vpac270/onenand.c: Fix build errors
  nhk8815: fix build errors
  atmel-boards: add missing atmel_mci.h
  ARM: highbank: setup env from boot source register
  ARM: highbank: change env config to use nvram
  ARM: highbank: add reset support
  ARM: highbank: Add boot counter support
  ARM: highbank: change TEXT_BASE to 0x8000
  ARM: highbank: fix us_to_tick calculation
  ARM: highbank: add missing get_tbclk
  ARM: highbank: fix warning for calxedaxgmac_initialize
  net: calxedaxgmac: fix build due to missing __aligned definition
  EXYNOS: Add structure for Exynos4 DMC
  EXYNOS: SMDK5250: Support all 4 UARTs
  ARM: fix s3c2410 timer code
  ARM: davinci: fixes for cam_enc_4xx board
  omap3_spi: receive transmit mode
  calimain, enbw_cmc: Fix typo in comments
  Davinci: ea20: use gpio framework to access gpios
  OMAP3: mt_ventoux: sets its own mtdparts
  OMAP3: mt_ventoux: updated timing for FPGA
  twl4030: fix potential power supply handling issues
  NAND: TI: fix warnings in omap_gpmc.c
  cam_enc_4xx: Rename 'images' to 'imgs'
  arm: Add Prep subcommand support to bootm
  OMAP3: twister: add support to boot Linux from SPL
  SPL: call cleanup_before_linux() before booting Linux
  OMAP3: SPL: do not call I2C init if no I2C is set.
  Add cache functions to SPL for armv7
  devkit8000: Implement and activate direct OS boot
  omap/spl: change output of spl_parse_image_header
  omap-common/spl: Add linux boot to SPL
  devkit8000/spl: init GPMC for dm9000 in SPL
  omap-common: Add NAND SPL linux booting
  devkit8000: add config for spl command
  Add cmd_spl command
  mx53ard: Initialize return code with error
  mx53: Make PLL2 to be the parent of UART clock
  configs: imx: Use CONFIG_SF_DEFAULT_CS
  mx28evk: Provide default values for SPI bus and chip select
  USB: ehci-mx6: Add proper IO accessors
  mx6: Read silicon revision from register
  i.MX28: Drop __naked function from spl_mem_init
  mxs_spi: Return proper timeout error
  i.MX28: Make the stabilization delays shorter
  pmic_i2c: Return error in case of invalid pmic_i2c_tx_num
  mx6: Remove duplicate definition of ANATOP_BASE_ADDR
  mx6: Fix reset cause for Power On Reset case
  i.MX6: mx6qsabrelite: add MACH_TYPE_MX6Q_SABRELITE
  i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAG
  i.MX28: Enable additional DRAM address bits
  mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use for environment
  mx31: add "ARM11P power gating" to get_reset_cause
  mx31pdk: Fix CONFIG_SYS_MEMTEST_END
  efikamx: Fix CONFIG_SYS_MEMTEST_END
  mx53smd: Fix CONFIG_SYS_MEMTEST_END
  mx53evk: Fix CONFIG_SYS_MEMTEST_END
  mx51evk: Fix CONFIG_SYS_MEMTEST_END
  i.MX6: mx6qsabrelite: add ext2 support
  imximage: Remove overwriting of flash_offset
  IXP: Fix GPIO_INT_ACT_LOW_SET()
  IXP: Fix NAND build warning on PDNB3 and SCPU
  IXP: Move PDNB3 and SCPU from Makefile to boards.cfg
  IXP: Squash warnings in IXP NPE
  IXP: Fix missing MACH_TYPE_{ACTUX?,PNB3,DVLHOST}
  IXP: Make IXP buildable with arm-linux- toolchains
  Examples: Properly append LDFLAGS to LD command
  SPL: Enable YMODEM support on BeagleBone and AM335x EVM
  SPL: Add YMODEM over UART load support
  SPL: Add README.omap3
  README: document more SPL config options
  spl.c: Use __noreturn decorator
  config.mk: Check for -fstack-usage support
  config.mk: Make cc-option create a file under include/generated
  ...

1 files changed, 0 insertions, 309 deletions

diff --git a/board/ti/omap1610inn/omap1610innovator.c b/board/ti/omap1610inn/omap1610innovator.c
deleted file mode 100644
index 16e8237..0000000
--- a/board/ti/omap1610inn/omap1610innovator.c
+++ /dev/null
@@ -1,309 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <netdev.h>
-#if defined(CONFIG_OMAP1610)
-#include <./configs/omap1510.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_CS_AUTOBOOT
-unsigned long omap_flash_base;
-#endif
-
-void flash__init (void);
-void ether__init (void);
-void set_muxconf_regs (void);
-void peripheral_power_enable (void);
-
-#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
-
-static inline void delay (unsigned long loops)
-{
-	__asm__ volatile ("1:\n"
-		"subs %0, %1, #1\n"
-		"bne 1b":"=r" (loops):"0" (loops));
-}
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
-	/* adress of boot parameters */
-	gd->bd->bi_boot_params = 0x10000100;
-
-	/* Configure MUX settings */
-	set_muxconf_regs ();
-	peripheral_power_enable ();
-
-/* this speeds up your boot a quite a bit.  However to make it
- *  work, you need make sure your kernel startup flush bug is fixed.
- *  ... rkw ...
- */
-	icache_enable ();
-
-	flash__init ();
-	ether__init ();
-	return 0;
-}
-
-
-int misc_init_r (void)
-{
-	/* currently empty */
-	return (0);
-}
-
-/******************************
- Routine:
- Description:
-******************************/
-void flash__init (void)
-{
-#define EMIFS_GlB_Config_REG 0xfffecc0c
-	unsigned int regval;
-
-#ifdef CONFIG_CS_AUTOBOOT
-	 /* Check swapping of CS0 and CS3, set flash base accordingly */
-	omap_flash_base = ((*((u32 *)OMAP_EMIFS_CONFIG_REG) & 0x02) == 0) ?
-					PHYS_FLASH_1_BM0 : PHYS_FLASH_1_BM1;
-#endif
-	regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
-	/* Turn off write protection for flash devices. */
-	regval = regval | 0x0001;
-	*((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
-}
-/*************************************************************
- Routine:ether__init
- Description: take the Ethernet controller out of reset and wait
-			   for the EEPROM load to complete.
-*************************************************************/
-void ether__init (void)
-{
-#define ETH_CONTROL_REG 0x0400030b
-
-#ifdef CONFIG_H2_OMAP1610
-	#define LAN_RESET_REGISTER 0x0400001c
-
-	/* The debug board on which the lan chip resides may not be powered
-	 * ON at the same time as the OMAP chip. So wait in a loop until the
-	 * lan reset register (on the debug board) is available (powered on)
-	 * and reset the lan chip.
-	 */
-
-	*((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
-	do {
-		*((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
-		udelay (3);
-	} while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
-
-	do {
-		*((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
-		udelay (3);
-	} while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
-#endif
-
-	*((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
-	udelay (3);
-}
-
-/******************************
- Routine:
- Description:
-******************************/
-int dram_init (void)
-{
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-	return 0;
-}
-
-/******************************************************
- Routine: set_muxconf_regs
- Description: Setting up the configuration Mux registers
-			  specific to the hardware
-*******************************************************/
-void set_muxconf_regs (void)
-{
-	volatile unsigned int *MuxConfReg;
-	/* set each registers to its reset value; */
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
-	/* setup for UART1 */
-	*MuxConfReg &= ~(0x02000000);	/* bit 25 */
-	/* setup for UART2 */
-	*MuxConfReg &= ~(0x01000000);	/* bit 24 */
-	/* Disable Uwire CS Hi-Z */
-	*MuxConfReg |= 0x08000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
-	/*setup mux for UART3 */
-	*MuxConfReg |= 0x00000001;	/* bit3, 1, 0 (mux0 5,5,26) */
-	*MuxConfReg &= ~0x0000003e;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
-	/* Disable Uwire CS Hi-Z */
-	*MuxConfReg |= 0x00001200;	/*bit 9 for CS0 12 for CS3 */
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
-	/*  Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the  */
-	/*  hardware will actually use TX and RTS based on bit 25 in  */
-	/*  FUNC_MUX_CTRL_0.  I told you this thing was screwy!  */
-	*MuxConfReg |= 0x00201000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
-	/* setup for UART2 */
-	/*  Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the  */
-	/*  hardware will actually use TX and RTS based on bit 24 in  */
-	/*  FUNC_MUX_CTRL_0. */
-	*MuxConfReg |= 0x09000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
-	*MuxConfReg = 0x00000000;
-	/* mux setup for SD/MMC driver */
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
-	*MuxConfReg &= 0xFFFE0FFF;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
-	/* bit 13 for MMC2 XOR_CLK */
-	*MuxConfReg &= ~(0x00002000);
-	/* bit 29 for UART 1 */
-	*MuxConfReg &= ~(0x00002000);
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
-	/* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
-	*MuxConfReg |= 0x000C0000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
-	*MuxConfReg &= ~(0x00000070);
-	*MuxConfReg &= ~(0x00000008);
-	*MuxConfReg |= 0x00000003;
-	*MuxConfReg |= 0x00000180;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
-	/* bit 17, software controls VBUS */
-	*MuxConfReg &= ~(0x00020000);
-	/* Enable USB 48 and 12M clocks */
-	*MuxConfReg |= 0x00000200;
-	*MuxConfReg &= ~(0x00000180);
-	/*2.75V for MMCSDIO1 */
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
-	*MuxConfReg = 0x00001FE7;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
-	*MuxConfReg = 0x00000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
-	*MuxConfReg = 0x00000000;
-	/* Turn on UART2 48 MHZ clock */
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
-	*MuxConfReg |= 0x40000000;
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
-	/* setup for USB VBus detection OMAP161x */
-	*MuxConfReg |= 0x00040000;	/* bit 18 */
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
-	/* PullUps for SD/MMC driver */
-	*MuxConfReg |= ~(0xFFFE0FFF);
-	MuxConfReg =
-		(volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
-	*MuxConfReg = COMP_MODE_ENABLE;
-}
-
-/******************************************************
- Routine: peripheral_power_enable
- Description: Enable the power for UART1
-*******************************************************/
-void peripheral_power_enable (void)
-{
-#define UART1_48MHZ_ENABLE	((unsigned short)0x0200)
-#define SW_CLOCK_REQUEST	((volatile unsigned short *)0xFFFE0834)
-
-	*SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
-	int rc = 0;
-#ifdef CONFIG_LAN91C96
-	rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
-#endif
-	return rc;
-}
-#endif