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| author | Hao Zhang <hzhang@ti.com> | 2014-07-16 00:59:27 +0300 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-07-25 16:26:11 -0400 |
| commit | a906847966fd097835712b2ad3b5bac340793d43 (patch) | |
| tree | 67afa93f1dc41bbc70515613bc3e890490ec0cbe /board/ti/ks2_evm/ddr3_k2e.c | |
| parent | 1284246eb97769b0da5483fb92a8c0940b46b739 (diff) | |
| download | u-boot-imx-a906847966fd097835712b2ad3b5bac340793d43.zip u-boot-imx-a906847966fd097835712b2ad3b5bac340793d43.tar.gz u-boot-imx-a906847966fd097835712b2ad3b5bac340793d43.tar.bz2 | |
board: k2e-evm: add board support
This patch adds Keystone2 k2e_evm evaluation board support.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Diffstat (limited to 'board/ti/ks2_evm/ddr3_k2e.c')
| -rw-r--r-- | board/ti/ks2_evm/ddr3_k2e.c | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/board/ti/ks2_evm/ddr3_k2e.c b/board/ti/ks2_evm/ddr3_k2e.c new file mode 100644 index 0000000..40fd966 --- /dev/null +++ b/board/ti/ks2_evm/ddr3_k2e.c @@ -0,0 +1,55 @@ +/* + * Keystone2: DDR3 initialization + * + * (C) Copyright 2014 + * Texas Instruments Incorporated, <www.ti.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include "ddr3_cfg.h" +#include <asm/arch/ddr3.h> + +static int ddr3_size; +static struct pll_init_data ddr3_400 = DDR3_PLL_400; + +void ddr3_init(void) +{ + char dimm_name[32]; + + if (~(readl(KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE) & 0x1)) + init_pll(&ddr3_400); + + ddr3_get_dimm_params(dimm_name); + + printf("Detected SO-DIMM [%s]\n", dimm_name); + + /* Reset DDR3 PHY after PLL enabled */ + ddr3_reset_ddrphy(); + + if (!strcmp(dimm_name, "18KSF1G72HZ-1G6E2 ")) { + /* 8G SO-DIMM */ + ddr3_size = 8; + printf("DRAM: 8 GiB\n"); + ddr3phy_1600_8g.zq0cr1 |= 0x10000; + ddr3phy_1600_8g.zq1cr1 |= 0x10000; + ddr3phy_1600_8g.zq2cr1 |= 0x10000; + ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_8g); + ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_8g); + } else if (!strcmp(dimm_name, "18KSF51272HZ-1G6K2")) { + /* 4G SO-DIMM */ + ddr3_size = 4; + printf("DRAM: 4 GiB\n"); + ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_4g); + ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_4g); + } +} + +/** + * ddr3_get_size - return ddr3 size in GiB + */ +int ddr3_get_size(void) +{ + return ddr3_size; +} |