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author | pekon gupta <pekon@ti.com> | 2014-07-22 16:03:22 +0530 |
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committer | Tom Rini <trini@ti.com> | 2014-08-25 10:48:12 -0400 |
commit | e53ad4b445464327aebd1c5ea6260b7bb9b80ae7 (patch) | |
tree | fe5edc497d51831f96b3abdccae854033889e3c1 /board/ti/am43xx/board.c | |
parent | 3df3bc1e1dc4c38de93d66fb589565f36d9749c7 (diff) | |
download | u-boot-imx-e53ad4b445464327aebd1c5ea6260b7bb9b80ae7.zip u-boot-imx-e53ad4b445464327aebd1c5ea6260b7bb9b80ae7.tar.gz u-boot-imx-e53ad4b445464327aebd1c5ea6260b7bb9b80ae7.tar.bz2 |
board/ti/am43xx: add support for parallel NAND
This patch adds support for NAND device connected to GPMC chip-select on
following AM43xx EVM boards.
am437x-gp-evm: On this board, NAND Flash signals are muxed with eMMC, thus at a
time either eMMC or NAND can be enabled. Selection between eMMC and NAND is
controlled by:
(a) Statically using Jumper on connecter (J89) present on board.
(a) If Jumper on J89 is NOT used, then selection can be dynamically controlled
by driving SPI2_CS0[MUX_MODE=GPIO] pin via software:
SPI2_CS0 == 0: NAND (default)
SPI2_CS0 == 1: eMMC
am43x-epos-evm: On this board, NAND Flash control lines are muxed with QSPI,
Thus only one of the two can be used at a time. Selection is controlled by:
(a) Dynamically driving following GPIO pin from software
GPMC_A0(GPIO) == 0 NAND is selected (default)
NAND device (MT29F4G08AB) on these boards has:
- data-width=8bits
- blocksize=256KB
- pagesize=4KB
- oobsize=224 bytes
For above NAND device, ROM code expects the boot-loader to be flashed in BCH16
ECC scheme for NAND boot, So by default BCH16 ECC is enabled for AM43xx EVMs.
Signed-off-by: Pekon Gupta <pekon@ti.com>
Diffstat (limited to 'board/ti/am43xx/board.c')
-rw-r--r-- | board/ti/am43xx/board.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c index 51fa9e0..a1c3c17 100644 --- a/board/ti/am43xx/board.c +++ b/board/ti/am43xx/board.c @@ -626,6 +626,7 @@ int board_init(void) modena_init0_bw_integer, modena_init0_watermark_0; gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gpmc_init(); /* Clear all important bits for DSS errata that may need to be tweaked*/ mreqprio_0 = readl(&cdev->mreqprio_0) & MREQPRIO_0_SAB_INIT1_MASK & |