summaryrefslogtreecommitdiff
path: root/board/sunxi
diff options
context:
space:
mode:
authorPaul Kocialkowski <contact@paulk.fr>2015-03-22 18:12:22 +0100
committerHans de Goede <hdegoede@redhat.com>2015-04-15 16:17:17 +0200
commit487b3277d4f70bcb2e4a1930beb6438565f25910 (patch)
treecc74dd0cd05c1be8af48cd1ca95c4b6f949b8712 /board/sunxi
parent81f11872f3315a767940820e46d1a15b42d9b60c (diff)
downloadu-boot-imx-487b3277d4f70bcb2e4a1930beb6438565f25910.zip
u-boot-imx-487b3277d4f70bcb2e4a1930beb6438565f25910.tar.gz
u-boot-imx-487b3277d4f70bcb2e4a1930beb6438565f25910.tar.bz2
sunxi: GPIO pin mux hardware-feature-specific function index defines
Each hardware feature exposed through the GPIO pin mux is usually using the same function index (for a given port), so there is no need to define one value per pin: one value per hardware feature per port is sufficient, avoids duplication and makes everything easier to understand. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'board/sunxi')
-rw-r--r--board/sunxi/board.c12
-rw-r--r--board/sunxi/gmac.c22
2 files changed, 17 insertions, 17 deletions
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 3b419b3..af8cf11 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -76,7 +76,7 @@ static void mmc_pinmux_setup(int sdc)
case 0:
/* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */
for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPF0_SDC0);
+ sunxi_gpio_set_cfgpin(pin, SUNXI_GPF_SDC0);
sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
sunxi_gpio_set_drv(pin, 2);
}
@@ -85,7 +85,7 @@ static void mmc_pinmux_setup(int sdc)
case 1:
/* CMD-PG3, CLK-PG4, D0~D3-PG5-8 */
for (pin = SUNXI_GPG(3); pin <= SUNXI_GPG(8); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN5I_GPG3_SDC1);
+ sunxi_gpio_set_cfgpin(pin, SUN5I_GPG_SDC1);
sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
sunxi_gpio_set_drv(pin, 2);
}
@@ -94,7 +94,7 @@ static void mmc_pinmux_setup(int sdc)
case 2:
/* CMD-PC6, CLK-PC7, D0-PC8, D1-PC9, D2-PC10, D3-PC11 */
for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPC6_SDC2);
+ sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
sunxi_gpio_set_drv(pin, 2);
}
@@ -103,7 +103,7 @@ static void mmc_pinmux_setup(int sdc)
case 3:
/* CMD-PI4, CLK-PI5, D0~D3-PI6~9 : 2 */
for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN4I_GPI4_SDC3);
+ sunxi_gpio_set_cfgpin(pin, SUN4I_GPI_SDC3);
sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
sunxi_gpio_set_drv(pin, 2);
}
@@ -155,8 +155,8 @@ int board_mmc_init(bd_t *bis)
void i2c_init_board(void)
{
- sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB0_TWI0);
- sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB0_TWI0);
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB_TWI0);
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB_TWI0);
clock_twi_onoff(0, 1);
#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
soft_i2c_gpio_sda = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SDA);
diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c
index 8849132..63a7360 100644
--- a/board/sunxi/gmac.c
+++ b/board/sunxi/gmac.c
@@ -39,45 +39,45 @@ int sunxi_gmac_initialize(bd_t *bis)
if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14))
continue;
#endif
- sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC);
+ sunxi_gpio_set_cfgpin(pin, SUN7I_GPA_GMAC);
sunxi_gpio_set_drv(pin, 3);
}
#elif defined CONFIG_RGMII
/* Configure sun6i RGMII mode pin mux settings */
for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(3); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+ sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
sunxi_gpio_set_drv(pin, 3);
}
for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+ sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
sunxi_gpio_set_drv(pin, 3);
}
for (pin = SUNXI_GPA(19); pin <= SUNXI_GPA(20); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+ sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
sunxi_gpio_set_drv(pin, 3);
}
for (pin = SUNXI_GPA(25); pin <= SUNXI_GPA(27); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+ sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
sunxi_gpio_set_drv(pin, 3);
}
#elif defined CONFIG_GMII
/* Configure sun6i GMII mode pin mux settings */
for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(27); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+ sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
sunxi_gpio_set_drv(pin, 2);
}
#else
/* Configure sun6i MII mode pin mux settings */
for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(3); pin++)
- sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+ sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
for (pin = SUNXI_GPA(8); pin <= SUNXI_GPA(9); pin++)
- sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+ sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
for (pin = SUNXI_GPA(11); pin <= SUNXI_GPA(14); pin++)
- sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+ sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
for (pin = SUNXI_GPA(19); pin <= SUNXI_GPA(24); pin++)
- sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+ sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
for (pin = SUNXI_GPA(26); pin <= SUNXI_GPA(27); pin++)
- sunxi_gpio_set_cfgpin(pin, SUN6I_GPA0_GMAC);
+ sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
#endif
#ifdef CONFIG_RGMII