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authorHans de Goede <hdegoede@redhat.com>2015-04-06 20:33:34 +0200
committerHans de Goede <hdegoede@redhat.com>2015-05-04 16:51:51 +0200
commit44d8ae5b6903a796b9868fc2b546b75e5ced2bfd (patch)
tree7bd36316b7832ec4bc6bd88eb6acff17cb669c91 /board/sunxi
parent929b2622ebdc5ff3903ce0f06fe18808307a723e (diff)
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sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool
sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'board/sunxi')
-rw-r--r--board/sunxi/Kconfig21
-rw-r--r--board/sunxi/gmac.c6
2 files changed, 24 insertions, 3 deletions
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 88e3358..b716a8b 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -1,21 +1,40 @@
if ARCH_SUNXI
+# Note only one of these may be selected at a time! But hidden choices are
+# not supported by Kconfig
+config SUNXI_GEN_SUN4I
+ bool
+ ---help---
+ Select this for sunxi SoCs which have resets and clocks set up
+ as the original A10 (mach-sun4i).
+
+config SUNXI_GEN_SUN6I
+ bool
+ ---help---
+ Select this for sunxi SoCs which have sun6i like periphery, like
+ separate ahb reset control registers, custom pmic bus, new style
+ watchdog, etc.
+
+
choice
prompt "Sunxi SoC Variant"
config MACH_SUN4I
bool "sun4i (Allwinner A10)"
select CPU_V7
+ select SUNXI_GEN_SUN4I
select SUPPORT_SPL
config MACH_SUN5I
bool "sun5i (Allwinner A13)"
select CPU_V7
+ select SUNXI_GEN_SUN4I
select SUPPORT_SPL
config MACH_SUN6I
bool "sun6i (Allwinner A31)"
select CPU_V7
+ select SUNXI_GEN_SUN6I
select SUPPORT_SPL
config MACH_SUN7I
@@ -23,12 +42,14 @@ config MACH_SUN7I
select CPU_V7
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
+ select SUNXI_GEN_SUN4I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
config MACH_SUN8I
bool "sun8i (Allwinner A23)"
select CPU_V7
+ select SUNXI_GEN_SUN6I
select SUPPORT_SPL
endchoice
diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c
index d90eed4..4e222d8 100644
--- a/board/sunxi/gmac.c
+++ b/board/sunxi/gmac.c
@@ -13,11 +13,11 @@ int sunxi_gmac_initialize(bd_t *bis)
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
/* Set up clock gating */
-#ifndef CONFIG_MACH_SUN6I
- setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
-#else
+#ifdef CONFIG_SUNXI_GEN_SUN6I
setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_RESET_OFFSET_GMAC);
setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_GMAC);
+#else
+ setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
#endif
/* Set MII clock */