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| author | Andy Fleming <afleming@freescale.com> | 2008-07-07 18:02:08 -0500 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-07-14 11:21:33 -0500 |
| commit | ab5cda9f88c3eaf9cf599adc3a3375906c4ed904 (patch) | |
| tree | a0a7f06b009be7401123cae043939722cc666f68 /board/stxssa/law.c | |
| parent | d5996dd555edf52721b7691a4c59de016251ed39 (diff) | |
| download | u-boot-imx-ab5cda9f88c3eaf9cf599adc3a3375906c4ed904.zip u-boot-imx-ab5cda9f88c3eaf9cf599adc3a3375906c4ed904.tar.gz u-boot-imx-ab5cda9f88c3eaf9cf599adc3a3375906c4ed904.tar.bz2 | |
Remove LBC_CACHE_BASE from 8544 DS
The 8544 DS doesn't have any cacheable Local Bus memories set up. By mapping
space for some anyway, we were allowing speculative loads into unmapped space,
which would cause an exception (annoying, even if ultimately harmless).
Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the
problem.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board/stxssa/law.c')
0 files changed, 0 insertions, 0 deletions