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| author | Marian Balakowicz <m8@semihalf.com> | 2005-10-28 22:30:33 +0200 |
|---|---|---|
| committer | Marian Balakowicz <m8@semihalf.com> | 2005-10-28 22:30:33 +0200 |
| commit | 63ff004c4fcad9f690bf44dbd15d568bb47aac2d (patch) | |
| tree | 7b64074a85da8118b6c862f14de1171b36ade0f7 /board/stxgp3 | |
| parent | fe93483a0ab9dcbf7794ffbf0b029ba138380e81 (diff) | |
| download | u-boot-imx-63ff004c4fcad9f690bf44dbd15d568bb47aac2d.zip u-boot-imx-63ff004c4fcad9f690bf44dbd15d568bb47aac2d.tar.gz u-boot-imx-63ff004c4fcad9f690bf44dbd15d568bb47aac2d.tar.bz2 | |
Add support for multiple PHYs.
Diffstat (limited to 'board/stxgp3')
| -rw-r--r-- | board/stxgp3/stxgp3.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/board/stxgp3/stxgp3.c b/board/stxgp3/stxgp3.c index 1dd9b2f..2b3949c 100644 --- a/board/stxgp3/stxgp3.c +++ b/board/stxgp3/stxgp3.c @@ -239,9 +239,14 @@ reset_phy(void) udelay(1000); #endif #if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC) - miiphy_reset(0x0); /* reset PHY */ - miiphy_write(0, PHY_MIPSCR, 0xf028); /* change PHY address to 0x02 */ - miiphy_write(0x02, PHY_BMCR, PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + /* reset PHY */ + miiphy_reset("FCC1 ETHERNET", 0x0); + + /* change PHY address to 0x02 */ + bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028); + + bb_miiphy_write(NULL, 0x02, PHY_BMCR, + PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); #endif /* CONFIG_MII */ #endif } |