ENGR00113941 MX233: Make UBOOT v2009.01 work on EVK board

Porting MX233 UBOOT from 1.3.3 to V2009.01. Clear old cfg macro, such as
CFG_HZ. Change MAC address getting source from initial configuration to
On-Chip OTP.

Signed-off-by: Lionel Xu <r63889@freescale.com>

5 files changed, 300 insertions, 0 deletions

diff --git a/board/stmp378x_dev/Makefile b/board/stmp378x_dev/Makefile
new file mode 100644
index 0000000..3c3eabd
--- /dev/null
+++ b/board/stmp378x_dev/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= stmp378x_dev.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
+
diff --git a/board/stmp378x_dev/config.mk b/board/stmp378x_dev/config.mk
new file mode 100644
index 0000000..cfd24d1
--- /dev/null
+++ b/board/stmp378x_dev/config.mk
@@ -0,0 +1,5 @@
+#
+# image should be loaded at 0x41008000
+#
+
+TEXT_BASE = 0x41008000
diff --git a/board/stmp378x_dev/lowlevel_init.S b/board/stmp378x_dev/lowlevel_init.S
new file mode 100644
index 0000000..e874e4f
--- /dev/null
+++ b/board/stmp378x_dev/lowlevel_init.S
@@ -0,0 +1,34 @@
+/*
+ * Board specific setup info
+ *
+ * (C) Copyright 2003, ARM Ltd.
+ * Philippe Robin, <philippe.robin@arm.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+
+/* Set up the platform, once the cpu has been initialized */
+.globl lowlevel_init
+lowlevel_init:
+
+	/* All SDRAM settings are done by sdram_prep */
+	mov pc, lr
diff --git a/board/stmp378x_dev/stmp378x_dev.c b/board/stmp378x_dev/stmp378x_dev.c
new file mode 100644
index 0000000..95f5d5b
--- /dev/null
+++ b/board/stmp378x_dev/stmp378x_dev.c
@@ -0,0 +1,158 @@
+/*
+ *
+ * (c) 2008 Embedded Alley Solutions, Inc.
+ *
+ * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <common.h>
+#include <asm/arch/stmp378x.h>
+#include <asm/arch/clkctrl.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/spi.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define KHz	1000
+#define MHz	(1000 * KHz)
+
+static void set_pinmux(void)
+{
+
+#if defined(CONFIG_SPI_SSP1)
+
+	/* Configure SSP1 pins for ENC28j60: 8maA */
+	REG_CLR(PINCTRL_BASE + PINCTRL_MUXSEL(4), 0x00003fff);
+
+	REG_CLR(PINCTRL_BASE + PINCTRL_DRIVE(8), 0X03333333);
+	REG_SET(PINCTRL_BASE + PINCTRL_DRIVE(8), 0x01111111);
+
+	REG_CLR(PINCTRL_BASE + PINCTRL_PULL(2), 0x0000003f);
+#endif
+
+#if defined(CONFIG_SPI_SSP2)
+
+	/* Configure SSP2 pins for ENC28j60: 8maA */
+	REG_CLR(PINCTRL_BASE + PINCTRL_MUXSEL(0), 0x00000fc3);
+	REG_SET(PINCTRL_BASE + PINCTRL_MUXSEL(0), 0x00000a82);
+
+	REG_CLR(PINCTRL_BASE + PINCTRL_MUXSEL(1), 0x00030300);
+	REG_SET(PINCTRL_BASE + PINCTRL_MUXSEL(1), 0x00020200);
+
+	REG_CLR(PINCTRL_BASE + PINCTRL_DRIVE(0), 0X00333003);
+	REG_SET(PINCTRL_BASE + PINCTRL_DRIVE(0), 0x00111001);
+
+	REG_CLR(PINCTRL_BASE + PINCTRL_DRIVE(2), 0x00030000);
+	REG_SET(PINCTRL_BASE + PINCTRL_DRIVE(2), 0x00010000);
+
+	REG_CLR(PINCTRL_BASE + PINCTRL_DRIVE(3), 0x00000003);
+	REG_SET(PINCTRL_BASE + PINCTRL_DRIVE(3), 0x00000001);
+
+	REG_CLR(PINCTRL_BASE + PINCTRL_PULL(0), 0x00100039);
+#endif
+
+}
+
+#define IO_DIVIDER	18
+static void set_clocks(void)
+{
+	u32 ssp_source_clk, ssp_clk;
+	u32 ssp_div = 1;
+	u32 val = 0;
+
+	/*
+	 * Configure 480Mhz IO clock
+	 */
+
+	/* Ungate IO_CLK and set divider */
+	REG_CLR(CLKCTRL_BASE + CLKCTRL_FRAC, FRAC_CLKGATEIO);
+	REG_CLR(CLKCTRL_BASE + CLKCTRL_FRAC, 0x3f << FRAC_IOFRAC);
+	REG_SET(CLKCTRL_BASE + CLKCTRL_FRAC, IO_DIVIDER << FRAC_IOFRAC);
+
+	/*
+	 * Set SSP CLK to desired value
+	 */
+
+	/* Calculate SSP_CLK divider relatively to 480Mhz IO_CLK*/
+	ssp_source_clk = 480 * MHz;
+	ssp_clk = CONFIG_SSP_CLK;
+	ssp_div = (ssp_source_clk + ssp_clk - 1) / ssp_clk;
+
+	/* Enable SSP clock */
+	val = REG_RD(CLKCTRL_BASE + CLKCTRL_SSP);
+	val &= ~SSP_CLKGATE;
+	REG_WR(CLKCTRL_BASE + CLKCTRL_SSP, val);
+
+	/* Wait while clock is gated */
+	while (REG_RD(CLKCTRL_BASE + CLKCTRL_SSP) & SSP_CLKGATE)
+		;
+
+	/* Set SSP clock divider */
+	val &= ~(0x1ff << SSP_DIV);
+	val |= ssp_div << SSP_DIV;
+	REG_WR(CLKCTRL_BASE + CLKCTRL_SSP, val);
+
+	/* Wait until new divider value is set */
+	while (REG_RD(CLKCTRL_BASE + CLKCTRL_SSP) & SSP_BUSY)
+		;
+
+	/* Set SSP clock source to IO_CLK */
+	REG_SET(CLKCTRL_BASE + CLKCTRL_CLKSEQ, CLKSEQ_BYPASS_SSP);
+	REG_CLR(CLKCTRL_BASE + CLKCTRL_CLKSEQ, CLKSEQ_BYPASS_SSP);
+}
+
+int dram_init(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* arch number of Freescale STMP 378x development board */
+	gd->bd->bi_arch_number = MACH_TYPE_STMP378X;
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+	set_clocks();
+
+	set_pinmux();
+
+	/* Configure SPI on SSP1 or SSP2 */
+	spi_init();
+
+	return 0;
+}
+
+int misc_init_r(void)
+{
+	return 0;
+}
+
+int checkboard(void)
+{
+	printf("Board: STMP378x dev. \n");
+	return 0;
+}
diff --git a/board/stmp378x_dev/u-boot.lds b/board/stmp378x_dev/u-boot.lds
new file mode 100644
index 0000000..82cb8e3
--- /dev/null
+++ b/board/stmp378x_dev/u-boot.lds
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+	. = ALIGN(4);
+	.text	:
+	{
+	  cpu/arm926ejs/start.o	(.text)
+	  *(.text)
+	}
+	.rodata : { *(.rodata) }
+	. = ALIGN(4);
+	.data : { *(.data) }
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss (NOLOAD) : { *(.bss) }
+	_end = .;
+}