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authorwdenk <wdenk>2003-06-27 21:31:46 +0000
committerwdenk <wdenk>2003-06-27 21:31:46 +0000
commit8bde7f776c77b343aca29b8c7b58464d915ac245 (patch)
tree20f1fd99975215e7c658454a15cdb4ed4694e2d4 /board/spd8xx/spd8xx.c
parent993cad9364c6b87ae429d1ed1130d8153f6f027e (diff)
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* Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen)
Diffstat (limited to 'board/spd8xx/spd8xx.c')
-rw-r--r--board/spd8xx/spd8xx.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/board/spd8xx/spd8xx.c b/board/spd8xx/spd8xx.c
index 6428896..61201d7 100644
--- a/board/spd8xx/spd8xx.c
+++ b/board/spd8xx/spd8xx.c
@@ -41,7 +41,7 @@ const uint sharc_table[] =
*/
0x0FF3FC04, 0x0FF3EC00, 0x7FFFEC04, 0xFFFFEC04,
0xFFFFEC05, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_,
/*
* Burst Read. (Offset 8 in UPM RAM)
*/
@@ -55,7 +55,7 @@ const uint sharc_table[] =
*/
0x0FAFFC04, 0x0FAFEC00, 0x7FFFEC04, 0xFFFFEC04,
0xFFFFEC05, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_,
/*
* Burst Write. (Offset 20 in UPM RAM)
*/
@@ -89,9 +89,9 @@ const uint sdram_table[] =
/*
* SDRAM Initialization (offset 5 in UPM RAM)
*
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
+ * This is no UPM entry point. The following definition uses
+ * the remaining space to establish an initialization
+ * sequence, which is executed by a RUN command.
*
*/
0x1FF77C35, 0xEFEABC34, 0x1FB57C35, /* last */
@@ -282,8 +282,8 @@ void reset_phy(void)
immr->im_ioport.iop_padat &= ~(PA_ENET_MDC); /* set MDC = 0 */
/*
- * RESET in implemented by a positive pulse of at least 1 us
- * at the reset pin.
+ * RESET in implemented by a positive pulse of at least 1 us
+ * at the reset pin.
*
* Configure RESET pins for NS DP83843 PHY, and RESET chip.
*