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authorTom Rini <trini@ti.com>2014-01-16 13:50:16 -0500
committerTom Rini <trini@ti.com>2014-01-16 13:50:16 -0500
commit4913fc23f0b19a82e2e9cc56f7ee0087839855c4 (patch)
treeb3229e94d952021236a6ec29e6bfe1d6fd050dee /board/solidrun/mx6-microsom/clocks.cfg
parentb5c068f3f8be5c2f73fc6699885aec0d342099bb (diff)
parentc71b4dd2da0dcddabd7c29e6c3dc8a495d4bd928 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'board/solidrun/mx6-microsom/clocks.cfg')
-rw-r--r--board/solidrun/mx6-microsom/clocks.cfg33
1 files changed, 33 insertions, 0 deletions
diff --git a/board/solidrun/mx6-microsom/clocks.cfg b/board/solidrun/mx6-microsom/clocks.cfg
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+/*
+ * Copyright (C) 2013 Boundary Devices
+ * Copyright (C) 2013 SolidRun ltd.
+ * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* set the default clock gate to save power */
+DATA 4, CCM_CCGR0, 0x00C03F3F
+DATA 4, CCM_CCGR1, 0x0030FC03
+DATA 4, CCM_CCGR2, 0x0FFFC000
+DATA 4, CCM_CCGR3, 0x3FF00000
+DATA 4, CCM_CCGR4, 0x00FFF300
+DATA 4, CCM_CCGR5, 0x0F0000C3
+DATA 4, CCM_CCGR6, 0x000003FF
+
+/* enable AXI cache for VDOA/VPU/IPU */
+DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF
+/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+DATA 4, MX6_IOMUXC_GPR6, 0x007F007F
+DATA 4, MX6_IOMUXC_GPR7, 0x007F007F
+
+/*
+ * Setup CCM_CCOSR register as follows:
+ *
+ * cko1_en = 1 --> CKO1 enabled
+ * cko1_div = 111 --> divide by 8
+ * cko1_sel = 1011 --> ahb_clk_root
+ *
+ * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
+ */
+DATA 4, CCM_CCOSR, 0x000000fb