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| author | Wolfgang Denk <wd@denx.de> | 2008-06-11 21:33:16 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-06-11 21:33:16 +0200 |
| commit | 5ea67393b8b554b8165c38912d753a8df043020d (patch) | |
| tree | 080077826cffcfebbaa0a950c663e7d165cf6b7d /board/socrates/law.c | |
| parent | 2395db48869e759c4422efa3d3c25161601aa17b (diff) | |
| parent | ba04f7010958e88a8910f2a123fee53fdc72e013 (diff) | |
| download | u-boot-imx-5ea67393b8b554b8165c38912d753a8df043020d.zip u-boot-imx-5ea67393b8b554b8165c38912d753a8df043020d.tar.gz u-boot-imx-5ea67393b8b554b8165c38912d753a8df043020d.tar.bz2 | |
Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx
Conflicts:
include/asm-ppc/fsl_lbc.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/socrates/law.c')
| -rw-r--r-- | board/socrates/law.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/board/socrates/law.c b/board/socrates/law.c index 5f4b8ca..35c4a90 100644 --- a/board/socrates/law.c +++ b/board/socrates/law.c @@ -33,13 +33,12 @@ /* * LAW(Local Access Window) configuration: * - * 0x0000_0000 0x7fff_ffff DDR 2G + * 0x0000_0000 0x2fff_ffff DDR 512M * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M - * 0xc000_0000 0xdfff_ffff RapidIO 512M - * 0xe000_0000 0xe000_ffff CCSR 1M + * 0xc000_0000 0xc00f_ffff FPGA 1M + * 0xe000_0000 0xe00f_ffff CCSR 1M (mapped by CCSRBAR) * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M - * 0xf800_0000 0xf80f_ffff BCSR 1M - * 0xfe00_0000 0xffff_ffff FLASH (boot bank) 32M + * 0xfc00_0000 0xffff_ffff FLASH 64M * * Notes: * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. @@ -47,11 +46,13 @@ */ struct law_entry law_table[] = { - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_LBC_FLASH_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(5, CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_LBC_FLASH_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), +#if defined(CFG_FPGA_BASE) + SET_LAW(CFG_FPGA_BASE, LAWAR_SIZE_1M, LAW_TRGT_IF_LBC), +#endif }; int num_law_entries = ARRAY_SIZE(law_table); |