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authorAnatolij Gustschin <agust@denx.de>2008-08-15 15:42:13 +0200
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-09-08 19:47:00 -0500
commit36241ca29d4804a1006fb3f26069effda5202581 (patch)
treec36372cb04703309c574d0dc831250907b55953b /board/socrates/law.c
parent7a47753ddcaebbf2142809842f70c5f723bd9ddb (diff)
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85xx: socrates: Enable Lime support.
This patch adds Lime GDC support together with support for the PWM backlight control through the w83782d chip. The reset pin of the latter is attached to GPIO, so we need to reset it in early_board_init_r. Signed-off-by: Anatolij Gustschin <agust@denx.de>
Diffstat (limited to 'board/socrates/law.c')
-rw-r--r--board/socrates/law.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/board/socrates/law.c b/board/socrates/law.c
index 35c4a90..89b446f 100644
--- a/board/socrates/law.c
+++ b/board/socrates/law.c
@@ -36,6 +36,7 @@
* 0x0000_0000 0x2fff_ffff DDR 512M
* 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
* 0xc000_0000 0xc00f_ffff FPGA 1M
+ * 0xc800_0000 0xcbff_ffff LIME 64M
* 0xe000_0000 0xe00f_ffff CCSR 1M (mapped by CCSRBAR)
* 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
* 0xfc00_0000 0xffff_ffff FLASH 64M
@@ -48,11 +49,12 @@
struct law_entry law_table[] = {
SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR),
SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
- SET_LAW(CFG_LBC_FLASH_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC),
+ SET_LAW(CFG_LBC_FLASH_BASE, LAW_SIZE_64M, LAW_TRGT_IF_LBC),
SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI),
#if defined(CFG_FPGA_BASE)
SET_LAW(CFG_FPGA_BASE, LAWAR_SIZE_1M, LAW_TRGT_IF_LBC),
#endif
+ SET_LAW(CFG_LIME_BASE, LAWAR_SIZE_64M, LAW_TRGT_IF_LBC),
};
int num_law_entries = ARRAY_SIZE(law_table);