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| author | wdenk <wdenk> | 2003-07-17 23:16:40 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2003-07-17 23:16:40 +0000 |
| commit | 2535d60277cc295adf75cd5721dcecd840c69a63 (patch) | |
| tree | a4a7c42580ded1e631658cec4f7a26d8e677a342 /board/siemens | |
| parent | 945af8d723a29e9b6289d84250745ed0dc16fc81 (diff) | |
| download | u-boot-imx-2535d60277cc295adf75cd5721dcecd840c69a63.zip u-boot-imx-2535d60277cc295adf75cd5721dcecd840c69a63.tar.gz u-boot-imx-2535d60277cc295adf75cd5721dcecd840c69a63.tar.bz2 | |
* Patch by Martin Krause, 17 Jul 2003:
add delay to get I2C working with "imm" command and s3c24x0_i2c.c
* Patch by Richard Woodruff, 17 July 03:
- Fixed bug in OMAP1510 baud rate divisor settings.
* Patch by Nye Liu, 16 July 2003:
MPC860FADS fixes:
- add MPC86xADS support (uses MPC86xADS.h)
- add 866P/T core support (also MPC859T/MPC859DSL/MPC852T)
o PLPRCR changes
o BRG changes (EXTAL/XTAL restricted to 10MHz)
o don't trust gclk() software measurement by default, depend on
CONFIG_8xx_GCLK_FREQ
- add DRAM SIMM not installed detection
- use more "correct" SDRAM initialization sequence
- allow different SDRAM sizes (8xxADS has 8M)
- default DER is 0
- remove unused MAMR defines from FADS860T.h (all done in fads.c)
- rename MAMR/MBMR defines to be more consistent. Should eventually
be merged into MxMR to better reflect the PowerQUICC datasheet.
* Patch by Yuli Barcohen, 16 Jul 2003:
support new Motorola PQ2FADS-ZU evaluation board which replaced
MPC8260ADS and MPC8266ADS
Diffstat (limited to 'board/siemens')
| -rw-r--r-- | board/siemens/CCM/ccm.c | 2 | ||||
| -rw-r--r-- | board/siemens/pcu_e/pcu_e.c | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/board/siemens/CCM/ccm.c b/board/siemens/CCM/ccm.c index 079f38f..f2283b7 100644 --- a/board/siemens/CCM/ccm.c +++ b/board/siemens/CCM/ccm.c @@ -267,7 +267,7 @@ void can_driver_enable (void) volatile memctl8xx_t *memctl = &immap->im_memctl; /* Initialize MBMR */ - memctl->memc_mbmr = MAMR_GPL_B4DIS; /* GPL_B4 ouput line Disable */ + memctl->memc_mbmr = MBMR_GPL_B4DIS; /* GPL_B4 ouput line Disable */ /* Initialize UPMB for CAN: single read */ memctl->memc_mdr = 0xFFFFC004; diff --git a/board/siemens/pcu_e/pcu_e.c b/board/siemens/pcu_e/pcu_e.c index b211189..08dd975 100644 --- a/board/siemens/pcu_e/pcu_e.c +++ b/board/siemens/pcu_e/pcu_e.c @@ -217,9 +217,9 @@ initdram (int board_type) #endif /* XXX */ reg = memctl->memc_mamr; - reg &= ~MAMR_TLFB_MSK; /* switch timer loop ... */ - reg |= MAMR_TLFB_4X; /* ... to 4x */ - reg |= MAMR_PTBE; /* enable refresh */ + reg &= ~MAMR_TLFA_MSK; /* switch timer loop ... */ + reg |= MAMR_TLFA_4X; /* ... to 4x */ + reg |= MAMR_PTAE; /* enable refresh */ memctl->memc_mamr = reg; udelay(200); @@ -246,7 +246,7 @@ initdram (int board_type) size_b0 = dram_size (CFG_MAMR, (ulong *)SDRAM_BASE2_PRELIM, SDRAM_MAX_SIZE); #endif /* XXX */ - memctl->memc_mamr = CFG_MAMR | MAMR_PTBE; + memctl->memc_mamr = CFG_MAMR | MAMR_PTAE; /* * Final mapping: |