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| author | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2008-08-31 22:45:08 +0900 |
|---|---|---|
| committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2008-08-31 22:45:08 +0900 |
| commit | 0d53a47dc0737b6aa3a39caee21410c169441ae5 (patch) | |
| tree | a07bdb7e27e644f2d78ff683bc1674458d662f5b /board/sh7785lcr/rtl8169.h | |
| parent | b0b6218929bc7de9a6bdb8e564fa8ec2efa71b4e (diff) | |
| download | u-boot-imx-0d53a47dc0737b6aa3a39caee21410c169441ae5.zip u-boot-imx-0d53a47dc0737b6aa3a39caee21410c169441ae5.tar.gz u-boot-imx-0d53a47dc0737b6aa3a39caee21410c169441ae5.tar.bz2 | |
sh: Renesas R0P7785LC0011RL board support
This board has SH7785, 512MB DDR2-SDRAM, NOR Flash,
Graphic, Ethernet, USB, SD, RTC, and I2C controller.
This patch supports the following functions:
- 128MB DDR2-SDRAM (29-bit address mode only)
- NOR Flash
- USB host
- Ethernet
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'board/sh7785lcr/rtl8169.h')
| -rw-r--r-- | board/sh7785lcr/rtl8169.h | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/board/sh7785lcr/rtl8169.h b/board/sh7785lcr/rtl8169.h new file mode 100644 index 0000000..d1c0d64 --- /dev/null +++ b/board/sh7785lcr/rtl8169.h @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define PCIREG_8(_adr) (*(volatile unsigned char *)(_adr)) +#define PCIREG_32(_adr) (*(volatile unsigned long *)(_adr)) +#define PCI_PAR PCIREG_32(0xfe0401c0) +#define PCI_PDR PCIREG_32(0xfe040220) +#define PCI_CR PCIREG_32(0xfe040100) +#define PCI_CONF1 PCIREG_32(0xfe040004) + +#define HIGH 1 +#define LOW 0 + +#define PCI_PROG 0x80 +#define PCI_EEP_ADDRESS (unsigned short)0x0007 +#define PCI_MAC_ADDRESS_SIZE 3 + +#define TIME1 100 +#define TIME2 20000 + +#define BIT_DUMMY 0 +#define MAC_EEP_READ 1 +#define MAC_EEP_WRITE 2 +#define MAC_EEP_ERACE 3 +#define MAC_EEP_EWEN 4 +#define MAC_EEP_EWDS 5 + +/* RTL8169 */ +const unsigned short EEPROM_W_Data_8169_A[] = { + 0x8129, 0x10ec, 0x8169, 0x1154, 0x032b, + 0x4020, 0xa101 +}; +const unsigned short EEPROM_W_Data_8169_B[] = { + 0x4d15, 0xf7c2, 0x8000, 0x0000, 0x0000, 0x1300, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x2000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 +}; + |