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| author | Ilya Yanok <yanok@emcraft.com> | 2011-11-28 06:37:33 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-12-06 23:59:35 +0100 |
| commit | 2aa8720257beadde8f798bd30096ca4c9007c8e0 (patch) | |
| tree | 2d8f3122b943d882dc07227463b5829f61376373 /board/scb9328/lowlevel_init.S | |
| parent | 2f3427ccb915c6f6774f0bcebb67c648dc25dcfd (diff) | |
| download | u-boot-imx-2aa8720257beadde8f798bd30096ca4c9007c8e0.zip u-boot-imx-2aa8720257beadde8f798bd30096ca4c9007c8e0.tar.gz u-boot-imx-2aa8720257beadde8f798bd30096ca4c9007c8e0.tar.bz2 | |
davinci_emac: fix for running with dcache enabled
DaVinci EMAC is present on TI AM35xx SoCs (ARMv7) which run with D-Cache
enabled by default. So we have to take care and flush/invalidate the
cache before/after the DMA operations.
Please note that the receive buffer alignment to 32 byte boundary comes
from the old driver version I don't know if it is really needed or
alignment to cache line size is enough.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Diffstat (limited to 'board/scb9328/lowlevel_init.S')
0 files changed, 0 insertions, 0 deletions