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| author | Wolfgang Denk <wd@denx.de> | 2009-07-23 00:52:25 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-07-23 00:52:25 +0200 |
| commit | 5a625149dbe14d381df454c459c6aaf27d59af20 (patch) | |
| tree | 52570b954668965789bacc9bb488312b58f7cc3e /board/sbc8641d | |
| parent | 46edbc545d1d0ae166271488e89c9967fb54393f (diff) | |
| parent | 048e7efe91f66094f868281c12e488ce2bae8976 (diff) | |
| download | u-boot-imx-5a625149dbe14d381df454c459c6aaf27d59af20.zip u-boot-imx-5a625149dbe14d381df454c459c6aaf27d59af20.tar.gz u-boot-imx-5a625149dbe14d381df454c459c6aaf27d59af20.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'board/sbc8641d')
| -rw-r--r-- | board/sbc8641d/sbc8641d.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index c39d2c0..f118a6e 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -127,9 +127,9 @@ long int fixed_sdram (void) ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; - ddr->sdram_cfg_1 = CONFIG_SYS_DDR_CFG_1A; + ddr->sdram_cfg = CONFIG_SYS_DDR_CFG_1A; ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CFG_2; - ddr->sdram_mode_1 = CONFIG_SYS_DDR_MODE_1; + ddr->sdram_mode = CONFIG_SYS_DDR_MODE_1; ddr->sdram_mode_2 = CONFIG_SYS_DDR_MODE_2; ddr->sdram_mode_cntl = CONFIG_SYS_DDR_MODE_CTL; ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL; @@ -140,7 +140,7 @@ long int fixed_sdram (void) udelay (500); - ddr->sdram_cfg_1 = CONFIG_SYS_DDR_CFG_1B; + ddr->sdram_cfg = CONFIG_SYS_DDR_CFG_1B; asm ("sync; isync"); udelay (500); @@ -158,9 +158,9 @@ long int fixed_sdram (void) ddr->timing_cfg_0 = CONFIG_SYS_DDR2_TIMING_0; ddr->timing_cfg_1 = CONFIG_SYS_DDR2_TIMING_1; ddr->timing_cfg_2 = CONFIG_SYS_DDR2_TIMING_2; - ddr->sdram_cfg_1 = CONFIG_SYS_DDR2_CFG_1A; + ddr->sdram_cfg = CONFIG_SYS_DDR2_CFG_1A; ddr->sdram_cfg_2 = CONFIG_SYS_DDR2_CFG_2; - ddr->sdram_mode_1 = CONFIG_SYS_DDR2_MODE_1; + ddr->sdram_mode = CONFIG_SYS_DDR2_MODE_1; ddr->sdram_mode_2 = CONFIG_SYS_DDR2_MODE_2; ddr->sdram_mode_cntl = CONFIG_SYS_DDR2_MODE_CTL; ddr->sdram_interval = CONFIG_SYS_DDR2_INTERVAL; @@ -171,7 +171,7 @@ long int fixed_sdram (void) udelay (500); - ddr->sdram_cfg_1 = CONFIG_SYS_DDR2_CFG_1B; + ddr->sdram_cfg = CONFIG_SYS_DDR2_CFG_1B; asm ("sync; isync"); udelay (500); |